]> sigrok.org Git - libsigrok.git/blame_incremental - src/hardware/rigol-ds/api.c
projects / libsigrok.git / blame_incremental
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (non-incremental) | history | HEAD
Drop unneeded std_session_send_df_header() comments.
[libsigrok.git] / src / hardware / rigol-ds / api.c
... / ...
CommitLineData
1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <config.h>
23#include <fcntl.h>
24#include <unistd.h>
25#include <stdlib.h>
26#include <string.h>
27#include <strings.h>
28#include <math.h>
29#include <glib.h>
30#include <libsigrok/libsigrok.h>
31#include "libsigrok-internal.h"
32#include "scpi.h"
33#include "protocol.h"
34
35static const uint32_t scanopts[] = {
36 SR_CONF_CONN,
37 SR_CONF_SERIALCOMM
38};
39
40static const uint32_t devopts[] = {
41 SR_CONF_OSCILLOSCOPE,
42 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
43 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
44 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
45 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
46 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
47 SR_CONF_NUM_HDIV | SR_CONF_GET,
48 SR_CONF_SAMPLERATE | SR_CONF_GET,
49 SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
50};
51
52static const uint32_t analog_devopts[] = {
53 SR_CONF_NUM_VDIV | SR_CONF_GET,
54 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
55 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
56};
57
58static const uint64_t timebases[][2] = {
59 /* nanoseconds */
60 { 1, 1000000000 },
61 { 2, 1000000000 },
62 { 5, 1000000000 },
63 { 10, 1000000000 },
64 { 20, 1000000000 },
65 { 50, 1000000000 },
66 { 100, 1000000000 },
67 { 500, 1000000000 },
68 /* microseconds */
69 { 1, 1000000 },
70 { 2, 1000000 },
71 { 5, 1000000 },
72 { 10, 1000000 },
73 { 20, 1000000 },
74 { 50, 1000000 },
75 { 100, 1000000 },
76 { 200, 1000000 },
77 { 500, 1000000 },
78 /* milliseconds */
79 { 1, 1000 },
80 { 2, 1000 },
81 { 5, 1000 },
82 { 10, 1000 },
83 { 20, 1000 },
84 { 50, 1000 },
85 { 100, 1000 },
86 { 200, 1000 },
87 { 500, 1000 },
88 /* seconds */
89 { 1, 1 },
90 { 2, 1 },
91 { 5, 1 },
92 { 10, 1 },
93 { 20, 1 },
94 { 50, 1 },
95 { 100, 1 },
96 { 200, 1 },
97 { 500, 1 },
98 { 1000, 1 },
99};
100
101static const uint64_t vdivs[][2] = {
102 /* microvolts */
103 { 500, 1000000 },
104 /* millivolts */
105 { 1, 1000 },
106 { 2, 1000 },
107 { 5, 1000 },
108 { 10, 1000 },
109 { 20, 1000 },
110 { 50, 1000 },
111 { 100, 1000 },
112 { 200, 1000 },
113 { 500, 1000 },
114 /* volts */
115 { 1, 1 },
116 { 2, 1 },
117 { 5, 1 },
118 { 10, 1 },
119 { 20, 1 },
120 { 50, 1 },
121 { 100, 1 },
122};
123
124#define NUM_TIMEBASE ARRAY_SIZE(timebases)
125#define NUM_VDIV ARRAY_SIZE(vdivs)
126
127static const char *trigger_sources[] = {
128 "CH1",
129 "CH2",
130 "CH3",
131 "CH4",
132 "EXT",
133 "AC Line",
134 "D0",
135 "D1",
136 "D2",
137 "D3",
138 "D4",
139 "D5",
140 "D6",
141 "D7",
142 "D8",
143 "D9",
144 "D10",
145 "D11",
146 "D12",
147 "D13",
148 "D14",
149 "D15",
150};
151
152static const char *trigger_slopes[] = {
153 "r",
154 "f",
155};
156
157static const char *coupling[] = {
158 "AC",
159 "DC",
160 "GND",
161};
162
163/* Do not change the order of entries */
164static const char *data_sources[] = {
165 "Live",
166 "Memory",
167 "Segmented",
168};
169
170enum vendor {
171 RIGOL,
172 AGILENT,
173};
174
175enum series {
176 VS5000,
177 DS1000,
178 DS2000,
179 DS2000A,
180 DSO1000,
181 DS1000Z,
182};
183
184/* short name, full name */
185static const struct rigol_ds_vendor supported_vendors[] = {
186 [RIGOL] = {"Rigol", "Rigol Technologies"},
187 [AGILENT] = {"Agilent", "Agilent Technologies"},
188};
189
190#define VENDOR(x) &supported_vendors[x]
191/* vendor, series, protocol, max timebase, min vdiv, number of horizontal divs,
192 * live waveform samples, memory buffer samples */
193static const struct rigol_ds_series supported_series[] = {
194 [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
195 {50, 1}, {2, 1000}, 14, 2048, 0},
196 [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
197 {50, 1}, {2, 1000}, 12, 600, 1048576},
198 [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
199 {500, 1}, {500, 1000000}, 14, 1400, 14000},
200 [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
201 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
202 [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
203 {50, 1}, {2, 1000}, 12, 600, 20480},
204 [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
205 {50, 1}, {1, 1000}, 12, 1200, 12000000},
206};
207
208#define SERIES(x) &supported_series[x]
209/* series, model, min timebase, analog channels, digital */
210static const struct rigol_ds_model supported_models[] = {
211 {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false},
212 {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false},
213 {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false},
214 {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false},
215 {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false},
216 {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true},
217 {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true},
218 {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true},
219 {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true},
220 {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true},
221 {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false},
222 {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false},
223 {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false},
224 {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true},
225 {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true},
226 {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true},
227 {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false},
228 {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false},
229 {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false},
230 {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false},
231 {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false},
232 {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false},
233 {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false},
234 {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false},
235 {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false},
236 {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false},
237 {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false},
238 {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false},
239 {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false},
240 {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false},
241 {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, 4, false},
242 {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, 4, false},
243 {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, 4, false},
244 {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, 4, false},
245 {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, 4, false},
246 {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, 4, true},
247 {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, 4, true},
248 {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, 4, true},
249 {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, 4, true},
250};
251
252SR_PRIV struct sr_dev_driver rigol_ds_driver_info;
253
254static void clear_helper(void *priv)
255{
256 struct dev_context *devc;
257 unsigned int i;
258
259 devc = priv;
260 g_free(devc->data);
261 g_free(devc->buffer);
262 for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
263 g_free(devc->coupling[i]);
264 g_free(devc->trigger_source);
265 g_free(devc->trigger_slope);
266 g_free(devc->analog_groups);
267 g_free(devc);
268}
269
270static int dev_clear(const struct sr_dev_driver *di)
271{
272 return std_dev_clear(di, clear_helper);
273}
274
275static int init(struct sr_dev_driver *di, struct sr_context *sr_ctx)
276{
277 return std_init(sr_ctx, di, LOG_PREFIX);
278}
279
280static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
281{
282 struct dev_context *devc;
283 struct sr_dev_inst *sdi;
284 struct sr_scpi_hw_info *hw_info;
285 struct sr_channel *ch;
286 long n[3];
287 unsigned int i;
288 const struct rigol_ds_model *model = NULL;
289 gchar *channel_name, **version;
290
291 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
292 sr_info("Couldn't get IDN response, retrying.");
293 sr_scpi_close(scpi);
294 sr_scpi_open(scpi);
295 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
296 sr_info("Couldn't get IDN response.");
297 return NULL;
298 }
299 }
300
301 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
302 if (!g_ascii_strcasecmp(hw_info->manufacturer,
303 supported_models[i].series->vendor->full_name) &&
304 !strcmp(hw_info->model, supported_models[i].name)) {
305 model = &supported_models[i];
306 break;
307 }
308 }
309
310 if (!model) {
311 sr_scpi_hw_info_free(hw_info);
312 return NULL;
313 }
314
315 sdi = g_malloc0(sizeof(struct sr_dev_inst));
316 sdi->vendor = g_strdup(model->series->vendor->name);
317 sdi->model = g_strdup(model->name);
318 sdi->version = g_strdup(hw_info->firmware_version);
319 sdi->conn = scpi;
320 sdi->driver = &rigol_ds_driver_info;
321 sdi->inst_type = SR_INST_SCPI;
322 sdi->serial_num = g_strdup(hw_info->serial_number);
323 devc = g_malloc0(sizeof(struct dev_context));
324 devc->limit_frames = 0;
325 devc->model = model;
326 devc->format = model->series->format;
327
328 /* DS1000 models with firmware before 0.2.4 used the old data format. */
329 if (model->series == SERIES(DS1000)) {
330 version = g_strsplit(hw_info->firmware_version, ".", 0);
331 do {
332 if (!version[0] || !version[1] || !version[2])
333 break;
334 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
335 break;
336 for (i = 0; i < 3; i++) {
337 if (sr_atol(version[i], &n[i]) != SR_OK)
338 break;
339 }
340 if (i != 3)
341 break;
342 scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2];
343 if (scpi->firmware_version < 24) {
344 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
345 devc->format = FORMAT_RAW;
346 }
347 break;
348 } while (0);
349 g_strfreev(version);
350 }
351
352 sr_scpi_hw_info_free(hw_info);
353
354 devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
355 model->analog_channels);
356
357 for (i = 0; i < model->analog_channels; i++) {
358 channel_name = g_strdup_printf("CH%d", i + 1);
359 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
360
361 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
362
363 devc->analog_groups[i]->name = channel_name;
364 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
365 sdi->channel_groups = g_slist_append(sdi->channel_groups,
366 devc->analog_groups[i]);
367 }
368
369 if (devc->model->has_digital) {
370 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
371
372 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
373 channel_name = g_strdup_printf("D%d", i);
374 ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
375 g_free(channel_name);
376 devc->digital_group->channels = g_slist_append(
377 devc->digital_group->channels, ch);
378 }
379 devc->digital_group->name = g_strdup("LA");
380 sdi->channel_groups = g_slist_append(sdi->channel_groups,
381 devc->digital_group);
382 }
383
384 for (i = 0; i < NUM_TIMEBASE; i++) {
385 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
386 devc->timebases = &timebases[i];
387 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
388 devc->num_timebases = &timebases[i] - devc->timebases + 1;
389 }
390
391 for (i = 0; i < NUM_VDIV; i++) {
392 if (!memcmp(&devc->model->series->min_vdiv,
393 &vdivs[i], sizeof(uint64_t[2]))) {
394 devc->vdivs = &vdivs[i];
395 devc->num_vdivs = NUM_VDIV - i;
396 }
397 }
398
399 devc->buffer = g_malloc(ACQ_BUFFER_SIZE);
400 devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float));
401
402 devc->data_source = DATA_SOURCE_LIVE;
403
404 sdi->priv = devc;
405
406 return sdi;
407}
408
409static GSList *scan(struct sr_dev_driver *di, GSList *options)
410{
411 return sr_scpi_scan(di->context, options, probe_device);
412}
413
414static GSList *dev_list(const struct sr_dev_driver *di)
415{
416 return ((struct drv_context *)(di->context))->instances;
417}
418
419static int dev_open(struct sr_dev_inst *sdi)
420{
421 int ret;
422 struct sr_scpi_dev_inst *scpi = sdi->conn;
423
424 if ((ret = sr_scpi_open(scpi)) < 0) {
425 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
426 return SR_ERR;
427 }
428
429 if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
430 sr_err("Failed to get device config: %s.", sr_strerror(ret));
431 return SR_ERR;
432 }
433
434 sdi->status = SR_ST_ACTIVE;
435
436 return SR_OK;
437}
438
439static int dev_close(struct sr_dev_inst *sdi)
440{
441 struct sr_scpi_dev_inst *scpi;
442 struct dev_context *devc;
443
444 if (sdi->status != SR_ST_ACTIVE)
445 return SR_ERR_DEV_CLOSED;
446
447 scpi = sdi->conn;
448 devc = sdi->priv;
449
450 if (devc->model->series->protocol == PROTOCOL_V2)
451 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
452
453 if (scpi) {
454 if (sr_scpi_close(scpi) < 0)
455 return SR_ERR;
456 sdi->status = SR_ST_INACTIVE;
457 }
458
459 return SR_OK;
460}
461
462static int cleanup(const struct sr_dev_driver *di)
463{
464 return dev_clear(di);
465}
466
467static int analog_frame_size(const struct sr_dev_inst *sdi)
468{
469 struct dev_context *devc = sdi->priv;
470 struct sr_channel *ch;
471 int analog_channels = 0;
472 GSList *l;
473
474 for (l = sdi->channels; l; l = l->next) {
475 ch = l->data;
476 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
477 analog_channels++;
478 }
479
480 if (analog_channels == 0)
481 return 0;
482
483 switch (devc->data_source) {
484 case DATA_SOURCE_LIVE:
485 return devc->model->series->live_samples;
486 case DATA_SOURCE_MEMORY:
487 return devc->model->series->buffer_samples / analog_channels;
488 default:
489 return 0;
490 }
491}
492
493static int digital_frame_size(const struct sr_dev_inst *sdi)
494{
495 struct dev_context *devc = sdi->priv;
496
497 switch (devc->data_source) {
498 case DATA_SOURCE_LIVE:
499 return devc->model->series->live_samples * 2;
500 case DATA_SOURCE_MEMORY:
501 return devc->model->series->buffer_samples * 2;
502 default:
503 return 0;
504 }
505}
506
507static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
508 const struct sr_channel_group *cg)
509{
510 struct dev_context *devc;
511 struct sr_channel *ch;
512 const char *tmp_str;
513 uint64_t samplerate;
514 int analog_channel = -1;
515 float smallest_diff = INFINITY;
516 int idx = -1;
517 unsigned i;
518
519 if (!sdi || !(devc = sdi->priv))
520 return SR_ERR_ARG;
521
522 /* If a channel group is specified, it must be a valid one. */
523 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
524 sr_err("Invalid channel group specified.");
525 return SR_ERR;
526 }
527
528 if (cg) {
529 ch = g_slist_nth_data(cg->channels, 0);
530 if (!ch)
531 return SR_ERR;
532 if (ch->type == SR_CHANNEL_ANALOG) {
533 if (ch->name[2] < '1' || ch->name[2] > '4')
534 return SR_ERR;
535 analog_channel = ch->name[2] - '1';
536 }
537 }
538
539 switch (key) {
540 case SR_CONF_NUM_HDIV:
541 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
542 break;
543 case SR_CONF_NUM_VDIV:
544 *data = g_variant_new_int32(devc->num_vdivs);
545 break;
546 case SR_CONF_DATA_SOURCE:
547 if (devc->data_source == DATA_SOURCE_LIVE)
548 *data = g_variant_new_string("Live");
549 else if (devc->data_source == DATA_SOURCE_MEMORY)
550 *data = g_variant_new_string("Memory");
551 else
552 *data = g_variant_new_string("Segmented");
553 break;
554 case SR_CONF_SAMPLERATE:
555 if (devc->data_source == DATA_SOURCE_LIVE) {
556 samplerate = analog_frame_size(sdi) /
557 (devc->timebase * devc->model->series->num_horizontal_divs);
558 *data = g_variant_new_uint64(samplerate);
559 } else {
560 sr_dbg("Unknown data source: %d.", devc->data_source);
561 return SR_ERR_NA;
562 }
563 break;
564 case SR_CONF_TRIGGER_SOURCE:
565 if (!strcmp(devc->trigger_source, "ACL"))
566 tmp_str = "AC Line";
567 else if (!strcmp(devc->trigger_source, "CHAN1"))
568 tmp_str = "CH1";
569 else if (!strcmp(devc->trigger_source, "CHAN2"))
570 tmp_str = "CH2";
571 else if (!strcmp(devc->trigger_source, "CHAN3"))
572 tmp_str = "CH3";
573 else if (!strcmp(devc->trigger_source, "CHAN4"))
574 tmp_str = "CH4";
575 else
576 tmp_str = devc->trigger_source;
577 *data = g_variant_new_string(tmp_str);
578 break;
579 case SR_CONF_TRIGGER_SLOPE:
580 if (!strncmp(devc->trigger_slope, "POS", 3)) {
581 tmp_str = "r";
582 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
583 tmp_str = "f";
584 } else {
585 sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
586 return SR_ERR_NA;
587 }
588 *data = g_variant_new_string(tmp_str);
589 break;
590 case SR_CONF_TIMEBASE:
591 for (i = 0; i < devc->num_timebases; i++) {
592 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
593 float diff = fabs(devc->timebase - tb);
594 if (diff < smallest_diff) {
595 smallest_diff = diff;
596 idx = i;
597 }
598 }
599 if (idx < 0) {
600 sr_dbg("Negative timebase index: %d.", idx);
601 return SR_ERR_NA;
602 }
603 *data = g_variant_new("(tt)", devc->timebases[idx][0],
604 devc->timebases[idx][1]);
605 break;
606 case SR_CONF_VDIV:
607 if (analog_channel < 0) {
608 sr_dbg("Negative analog channel: %d.", analog_channel);
609 return SR_ERR_NA;
610 }
611 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
612 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
613 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
614 if (diff < smallest_diff) {
615 smallest_diff = diff;
616 idx = i;
617 }
618 }
619 if (idx < 0) {
620 sr_dbg("Negative vdiv index: %d.", idx);
621 return SR_ERR_NA;
622 }
623 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
624 break;
625 case SR_CONF_COUPLING:
626 if (analog_channel < 0) {
627 sr_dbg("Negative analog channel: %d.", analog_channel);
628 return SR_ERR_NA;
629 }
630 *data = g_variant_new_string(devc->coupling[analog_channel]);
631 break;
632 default:
633 return SR_ERR_NA;
634 }
635
636 return SR_OK;
637}
638
639static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
640 const struct sr_channel_group *cg)
641{
642 struct dev_context *devc;
643 uint64_t p, q;
644 double t_dbl;
645 unsigned int i, j;
646 int ret;
647 const char *tmp_str;
648 char buffer[16];
649
650 if (!(devc = sdi->priv))
651 return SR_ERR_ARG;
652
653 if (sdi->status != SR_ST_ACTIVE)
654 return SR_ERR_DEV_CLOSED;
655
656 /* If a channel group is specified, it must be a valid one. */
657 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
658 sr_err("Invalid channel group specified.");
659 return SR_ERR;
660 }
661
662 ret = SR_OK;
663 switch (key) {
664 case SR_CONF_LIMIT_FRAMES:
665 devc->limit_frames = g_variant_get_uint64(data);
666 break;
667 case SR_CONF_TRIGGER_SLOPE:
668 tmp_str = g_variant_get_string(data, NULL);
669
670 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r')) {
671 sr_err("Unknown trigger slope: '%s'.",
672 (tmp_str) ? tmp_str : "NULL");
673 return SR_ERR_ARG;
674 }
675
676 g_free(devc->trigger_slope);
677 devc->trigger_slope = g_strdup((tmp_str[0] == 'r') ? "POS" : "NEG");
678 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
679 break;
680 case SR_CONF_HORIZ_TRIGGERPOS:
681 t_dbl = g_variant_get_double(data);
682 if (t_dbl < 0.0 || t_dbl > 1.0) {
683 sr_err("Invalid horiz. trigger position: %g.", t_dbl);
684 return SR_ERR;
685 }
686 devc->horiz_triggerpos = t_dbl;
687 /* We have the trigger offset as a percentage of the frame, but
688 * need to express this in seconds. */
689 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
690 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
691 ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
692 break;
693 case SR_CONF_TIMEBASE:
694 g_variant_get(data, "(tt)", &p, &q);
695 for (i = 0; i < devc->num_timebases; i++) {
696 if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
697 devc->timebase = (float)p / q;
698 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
699 devc->timebase);
700 ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
701 break;
702 }
703 }
704 if (i == devc->num_timebases) {
705 sr_err("Invalid timebase index: %d.", i);
706 ret = SR_ERR_ARG;
707 }
708 break;
709 case SR_CONF_TRIGGER_SOURCE:
710 tmp_str = g_variant_get_string(data, NULL);
711 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
712 if (!strcmp(trigger_sources[i], tmp_str)) {
713 g_free(devc->trigger_source);
714 devc->trigger_source = g_strdup(trigger_sources[i]);
715 if (!strcmp(devc->trigger_source, "AC Line"))
716 tmp_str = "ACL";
717 else if (!strcmp(devc->trigger_source, "CH1"))
718 tmp_str = "CHAN1";
719 else if (!strcmp(devc->trigger_source, "CH2"))
720 tmp_str = "CHAN2";
721 else if (!strcmp(devc->trigger_source, "CH3"))
722 tmp_str = "CHAN3";
723 else if (!strcmp(devc->trigger_source, "CH4"))
724 tmp_str = "CHAN4";
725 else
726 tmp_str = (char *)devc->trigger_source;
727 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
728 break;
729 }
730 }
731 if (i == ARRAY_SIZE(trigger_sources)) {
732 sr_err("Invalid trigger source index: %d.", i);
733 ret = SR_ERR_ARG;
734 }
735 break;
736 case SR_CONF_VDIV:
737 if (!cg) {
738 sr_err("No channel group specified.");
739 return SR_ERR_CHANNEL_GROUP;
740 }
741 g_variant_get(data, "(tt)", &p, &q);
742 for (i = 0; i < devc->model->analog_channels; i++) {
743 if (cg == devc->analog_groups[i]) {
744 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
745 if (vdivs[j][0] != p || vdivs[j][1] != q)
746 continue;
747 devc->vdiv[i] = (float)p / q;
748 g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
749 devc->vdiv[i]);
750 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1,
751 buffer);
752 }
753 sr_err("Invalid vdiv index: %d.", j);
754 return SR_ERR_ARG;
755 }
756 }
757 sr_dbg("Didn't set vdiv, unknown channel(group).");
758 return SR_ERR_NA;
759 case SR_CONF_COUPLING:
760 if (!cg) {
761 sr_err("No channel group specified.");
762 return SR_ERR_CHANNEL_GROUP;
763 }
764 tmp_str = g_variant_get_string(data, NULL);
765 for (i = 0; i < devc->model->analog_channels; i++) {
766 if (cg == devc->analog_groups[i]) {
767 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
768 if (!strcmp(tmp_str, coupling[j])) {
769 g_free(devc->coupling[i]);
770 devc->coupling[i] = g_strdup(coupling[j]);
771 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1,
772 devc->coupling[i]);
773 }
774 }
775 sr_err("Invalid coupling index: %d.", j);
776 return SR_ERR_ARG;
777 }
778 }
779 sr_dbg("Didn't set coupling, unknown channel(group).");
780 return SR_ERR_NA;
781 case SR_CONF_DATA_SOURCE:
782 tmp_str = g_variant_get_string(data, NULL);
783 if (!strcmp(tmp_str, "Live"))
784 devc->data_source = DATA_SOURCE_LIVE;
785 else if (devc->model->series->protocol >= PROTOCOL_V2
786 && !strcmp(tmp_str, "Memory"))
787 devc->data_source = DATA_SOURCE_MEMORY;
788 else if (devc->model->series->protocol >= PROTOCOL_V3
789 && !strcmp(tmp_str, "Segmented"))
790 devc->data_source = DATA_SOURCE_SEGMENTED;
791 else {
792 sr_err("Unknown data source: '%s'.", tmp_str);
793 return SR_ERR;
794 }
795 break;
796 default:
797 return SR_ERR_NA;
798 }
799
800 return ret;
801}
802
803static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
804 const struct sr_channel_group *cg)
805{
806 GVariant *tuple, *rational[2];
807 GVariantBuilder gvb;
808 unsigned int i;
809 struct dev_context *devc = NULL;
810
811 if (key == SR_CONF_SCAN_OPTIONS) {
812 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
813 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
814 return SR_OK;
815 } else if (key == SR_CONF_DEVICE_OPTIONS && !cg) {
816 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
817 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
818 return SR_OK;
819 }
820
821 /* Every other option requires a valid device instance. */
822 if (!sdi || !(devc = sdi->priv))
823 return SR_ERR_ARG;
824
825 /* If a channel group is specified, it must be a valid one. */
826 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
827 sr_err("Invalid channel group specified.");
828 return SR_ERR;
829 }
830
831 switch (key) {
832 case SR_CONF_DEVICE_OPTIONS:
833 if (!cg) {
834 sr_err("No channel group specified.");
835 return SR_ERR_CHANNEL_GROUP;
836 }
837 if (cg == devc->digital_group) {
838 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
839 NULL, 0, sizeof(uint32_t));
840 return SR_OK;
841 } else {
842 for (i = 0; i < devc->model->analog_channels; i++) {
843 if (cg == devc->analog_groups[i]) {
844 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
845 analog_devopts, ARRAY_SIZE(analog_devopts), sizeof(uint32_t));
846 return SR_OK;
847 }
848 }
849 return SR_ERR_NA;
850 }
851 break;
852 case SR_CONF_COUPLING:
853 if (!cg) {
854 sr_err("No channel group specified.");
855 return SR_ERR_CHANNEL_GROUP;
856 }
857 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
858 break;
859 case SR_CONF_VDIV:
860 if (!devc)
861 /* Can't know this until we have the exact model. */
862 return SR_ERR_ARG;
863 if (!cg) {
864 sr_err("No channel group specified.");
865 return SR_ERR_CHANNEL_GROUP;
866 }
867 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
868 for (i = 0; i < devc->num_vdivs; i++) {
869 rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
870 rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
871 tuple = g_variant_new_tuple(rational, 2);
872 g_variant_builder_add_value(&gvb, tuple);
873 }
874 *data = g_variant_builder_end(&gvb);
875 break;
876 case SR_CONF_TIMEBASE:
877 if (!devc)
878 /* Can't know this until we have the exact model. */
879 return SR_ERR_ARG;
880 if (devc->num_timebases <= 0)
881 return SR_ERR_NA;
882 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
883 for (i = 0; i < devc->num_timebases; i++) {
884 rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
885 rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
886 tuple = g_variant_new_tuple(rational, 2);
887 g_variant_builder_add_value(&gvb, tuple);
888 }
889 *data = g_variant_builder_end(&gvb);
890 break;
891 case SR_CONF_TRIGGER_SOURCE:
892 if (!devc)
893 /* Can't know this until we have the exact model. */
894 return SR_ERR_ARG;
895 *data = g_variant_new_strv(trigger_sources,
896 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
897 break;
898 case SR_CONF_TRIGGER_SLOPE:
899 *data = g_variant_new_strv(trigger_slopes, ARRAY_SIZE(trigger_slopes));
900 break;
901 case SR_CONF_DATA_SOURCE:
902 if (!devc)
903 /* Can't know this until we have the exact model. */
904 return SR_ERR_ARG;
905 switch (devc->model->series->protocol) {
906 case PROTOCOL_V1:
907 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
908 break;
909 case PROTOCOL_V2:
910 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
911 break;
912 default:
913 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
914 break;
915 }
916 break;
917 default:
918 return SR_ERR_NA;
919 }
920
921 return SR_OK;
922}
923
924static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
925{
926 struct sr_scpi_dev_inst *scpi;
927 struct dev_context *devc;
928 struct sr_channel *ch;
929 struct sr_datafeed_packet packet;
930 gboolean some_digital;
931 GSList *l;
932
933 if (sdi->status != SR_ST_ACTIVE)
934 return SR_ERR_DEV_CLOSED;
935
936 scpi = sdi->conn;
937 devc = sdi->priv;
938
939 devc->num_frames = 0;
940
941 some_digital = FALSE;
942 for (l = sdi->channels; l; l = l->next) {
943 ch = l->data;
944 sr_dbg("handling channel %s", ch->name);
945 if (ch->type == SR_CHANNEL_ANALOG) {
946 if (ch->enabled)
947 devc->enabled_channels = g_slist_append(
948 devc->enabled_channels, ch);
949 if (ch->enabled != devc->analog_channels[ch->index]) {
950 /* Enabled channel is currently disabled, or vice versa. */
951 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
952 ch->enabled ? "ON" : "OFF") != SR_OK)
953 return SR_ERR;
954 devc->analog_channels[ch->index] = ch->enabled;
955 }
956 } else if (ch->type == SR_CHANNEL_LOGIC) {
957 /* Only one list entry for DS1000D series. All channels are retrieved
958 * together when this entry is processed. */
959 if (ch->enabled && (
960 devc->model->series->protocol > PROTOCOL_V2 ||
961 !some_digital))
962 devc->enabled_channels = g_slist_append(
963 devc->enabled_channels, ch);
964 if (ch->enabled) {
965 some_digital = TRUE;
966 /* Turn on LA module if currently off. */
967 if (!devc->la_enabled) {
968 if (rigol_ds_config_set(sdi,
969 devc->model->series->protocol >= PROTOCOL_V4 ?
970 ":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
971 return SR_ERR;
972 devc->la_enabled = TRUE;
973 }
974 }
975 if (ch->enabled != devc->digital_channels[ch->index]) {
976 /* Enabled channel is currently disabled, or vice versa. */
977 if (rigol_ds_config_set(sdi,
978 devc->model->series->protocol >= PROTOCOL_V4 ?
979 ":LA:DIG%d:DISP %s" : ":DIG%d:TURN %s", ch->index,
980 ch->enabled ? "ON" : "OFF") != SR_OK)
981 return SR_ERR;
982 devc->digital_channels[ch->index] = ch->enabled;
983 }
984 }
985 }
986
987 if (!devc->enabled_channels)
988 return SR_ERR;
989
990 /* Turn off LA module if on and no digital channels selected. */
991 if (devc->la_enabled && !some_digital)
992 if (rigol_ds_config_set(sdi,
993 devc->model->series->protocol >= PROTOCOL_V4 ?
994 ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK)
995 return SR_ERR;
996
997 /* Set memory mode. */
998 if (devc->data_source == DATA_SOURCE_SEGMENTED) {
999 sr_err("Data source 'Segmented' not yet supported");
1000 return SR_ERR;
1001 }
1002
1003 devc->analog_frame_size = analog_frame_size(sdi);
1004 devc->digital_frame_size = digital_frame_size(sdi);
1005
1006 switch (devc->model->series->protocol) {
1007 case PROTOCOL_V2:
1008 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
1009 return SR_ERR;
1010 break;
1011 case PROTOCOL_V3:
1012 /* Apparently for the DS2000 the memory
1013 * depth can only be set in Running state -
1014 * this matches the behaviour of the UI. */
1015 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1016 return SR_ERR;
1017 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
1018 devc->analog_frame_size) != SR_OK)
1019 return SR_ERR;
1020 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
1021 return SR_ERR;
1022 break;
1023 default:
1024 break;
1025 }
1026
1027 if (devc->data_source == DATA_SOURCE_LIVE)
1028 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1029 return SR_ERR;
1030
1031 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
1032 rigol_ds_receive, (void *)sdi);
1033
1034 std_session_send_df_header(cb_data, LOG_PREFIX);
1035
1036 devc->channel_entry = devc->enabled_channels;
1037
1038 if (rigol_ds_capture_start(sdi) != SR_OK)
1039 return SR_ERR;
1040
1041 /* Start of first frame. */
1042 packet.type = SR_DF_FRAME_BEGIN;
1043 sr_session_send(cb_data, &packet);
1044
1045 return SR_OK;
1046}
1047
1048static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
1049{
1050 struct dev_context *devc;
1051 struct sr_scpi_dev_inst *scpi;
1052
1053 (void)cb_data;
1054
1055 devc = sdi->priv;
1056
1057 if (sdi->status != SR_ST_ACTIVE) {
1058 sr_err("Device inactive, can't stop acquisition.");
1059 return SR_ERR;
1060 }
1061
1062 std_session_send_df_end(sdi, LOG_PREFIX);
1063
1064 g_slist_free(devc->enabled_channels);
1065 devc->enabled_channels = NULL;
1066 scpi = sdi->conn;
1067 sr_scpi_source_remove(sdi->session, scpi);
1068
1069 return SR_OK;
1070}
1071
1072SR_PRIV struct sr_dev_driver rigol_ds_driver_info = {
1073 .name = "rigol-ds",
1074 .longname = "Rigol DS",
1075 .api_version = 1,
1076 .init = init,
1077 .cleanup = cleanup,
1078 .scan = scan,
1079 .dev_list = dev_list,
1080 .dev_clear = dev_clear,
1081 .config_get = config_get,
1082 .config_set = config_set,
1083 .config_list = config_list,
1084 .dev_open = dev_open,
1085 .dev_close = dev_close,
1086 .dev_acquisition_start = dev_acquisition_start,
1087 .dev_acquisition_stop = dev_acquisition_stop,
1088 .context = NULL,
1089};
Hardware access and backend lib