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sr_dev_close(): Factor out SR_ERR_DEV_CLOSED check.
[libsigrok.git] / src / hardware / rigol-ds / api.c
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <config.h>
23#include <fcntl.h>
24#include <unistd.h>
25#include <stdlib.h>
26#include <string.h>
27#include <strings.h>
28#include <math.h>
29#include <glib.h>
30#include <libsigrok/libsigrok.h>
31#include "libsigrok-internal.h"
32#include "scpi.h"
33#include "protocol.h"
34
35static const uint32_t scanopts[] = {
36 SR_CONF_CONN,
37 SR_CONF_SERIALCOMM
38};
39
40static const uint32_t drvopts[] = {
41 SR_CONF_OSCILLOSCOPE,
42};
43
44static const uint32_t devopts[] = {
45 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
46 SR_CONF_SAMPLERATE | SR_CONF_GET,
47 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
48 SR_CONF_NUM_HDIV | SR_CONF_GET,
49 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
50 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
51 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52 SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET,
53 SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
54};
55
56static const uint32_t analog_devopts[] = {
57 SR_CONF_NUM_VDIV | SR_CONF_GET,
58 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
59 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
60 SR_CONF_PROBE_FACTOR | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
61};
62
63static const uint64_t timebases[][2] = {
64 /* nanoseconds */
65 { 1, 1000000000 },
66 { 2, 1000000000 },
67 { 5, 1000000000 },
68 { 10, 1000000000 },
69 { 20, 1000000000 },
70 { 50, 1000000000 },
71 { 100, 1000000000 },
72 { 500, 1000000000 },
73 /* microseconds */
74 { 1, 1000000 },
75 { 2, 1000000 },
76 { 5, 1000000 },
77 { 10, 1000000 },
78 { 20, 1000000 },
79 { 50, 1000000 },
80 { 100, 1000000 },
81 { 200, 1000000 },
82 { 500, 1000000 },
83 /* milliseconds */
84 { 1, 1000 },
85 { 2, 1000 },
86 { 5, 1000 },
87 { 10, 1000 },
88 { 20, 1000 },
89 { 50, 1000 },
90 { 100, 1000 },
91 { 200, 1000 },
92 { 500, 1000 },
93 /* seconds */
94 { 1, 1 },
95 { 2, 1 },
96 { 5, 1 },
97 { 10, 1 },
98 { 20, 1 },
99 { 50, 1 },
100 { 100, 1 },
101 { 200, 1 },
102 { 500, 1 },
103 { 1000, 1 },
104};
105
106static const uint64_t vdivs[][2] = {
107 /* microvolts */
108 { 500, 1000000 },
109 /* millivolts */
110 { 1, 1000 },
111 { 2, 1000 },
112 { 5, 1000 },
113 { 10, 1000 },
114 { 20, 1000 },
115 { 50, 1000 },
116 { 100, 1000 },
117 { 200, 1000 },
118 { 500, 1000 },
119 /* volts */
120 { 1, 1 },
121 { 2, 1 },
122 { 5, 1 },
123 { 10, 1 },
124 { 20, 1 },
125 { 50, 1 },
126 { 100, 1 },
127};
128
129#define NUM_TIMEBASE ARRAY_SIZE(timebases)
130#define NUM_VDIV ARRAY_SIZE(vdivs)
131
132static const char *trigger_sources[] = {
133 "CH1",
134 "CH2",
135 "CH3",
136 "CH4",
137 "EXT",
138 "AC Line",
139 "D0",
140 "D1",
141 "D2",
142 "D3",
143 "D4",
144 "D5",
145 "D6",
146 "D7",
147 "D8",
148 "D9",
149 "D10",
150 "D11",
151 "D12",
152 "D13",
153 "D14",
154 "D15",
155};
156
157static const char *trigger_slopes[] = {
158 "r",
159 "f",
160};
161
162static const char *coupling[] = {
163 "AC",
164 "DC",
165 "GND",
166};
167
168static const uint64_t probe_factor[] = {
169 1,
170 2,
171 5,
172 10,
173 20,
174 50,
175 100,
176 200,
177 500,
178 1000,
179};
180
181/* Do not change the order of entries */
182static const char *data_sources[] = {
183 "Live",
184 "Memory",
185 "Segmented",
186};
187
188enum vendor {
189 RIGOL,
190 AGILENT,
191};
192
193enum series {
194 VS5000,
195 DS1000,
196 DS2000,
197 DS2000A,
198 DSO1000,
199 DS1000Z,
200};
201
202/* short name, full name */
203static const struct rigol_ds_vendor supported_vendors[] = {
204 [RIGOL] = {"Rigol", "Rigol Technologies"},
205 [AGILENT] = {"Agilent", "Agilent Technologies"},
206};
207
208#define VENDOR(x) &supported_vendors[x]
209/* vendor, series, protocol, max timebase, min vdiv, number of horizontal divs,
210 * live waveform samples, memory buffer samples */
211static const struct rigol_ds_series supported_series[] = {
212 [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
213 {50, 1}, {2, 1000}, 14, 2048, 0},
214 [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
215 {50, 1}, {2, 1000}, 12, 600, 1048576},
216 [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
217 {500, 1}, {500, 1000000}, 14, 1400, 14000},
218 [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
219 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
220 [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
221 {50, 1}, {2, 1000}, 12, 600, 20480},
222 [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
223 {50, 1}, {1, 1000}, 12, 1200, 12000000},
224};
225
226#define SERIES(x) &supported_series[x]
227/* series, model, min timebase, analog channels, digital */
228static const struct rigol_ds_model supported_models[] = {
229 {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false},
230 {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false},
231 {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false},
232 {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false},
233 {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false},
234 {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true},
235 {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true},
236 {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true},
237 {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true},
238 {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true},
239 {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false},
240 {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false},
241 {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false},
242 {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true},
243 {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true},
244 {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true},
245 {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false},
246 {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false},
247 {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false},
248 {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false},
249 {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false},
250 {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false},
251 {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false},
252 {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false},
253 {SERIES(DS2000A), "MSO2072A", {5, 1000000000}, 2, true},
254 {SERIES(DS2000A), "MSO2102A", {5, 1000000000}, 2, true},
255 {SERIES(DS2000A), "MSO2202A", {2, 1000000000}, 2, true},
256 {SERIES(DS2000A), "MSO2302A", {1, 1000000000}, 2, true},
257 {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false},
258 {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false},
259 {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false},
260 {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false},
261 {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false},
262 {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false},
263 {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, 4, false},
264 {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, 4, false},
265 {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, 4, false},
266 {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, 4, false},
267 {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, 4, false},
268 {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, 4, false},
269 {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, 4, false},
270 {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, 4, true},
271 {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, 4, true},
272 {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, 4, true},
273 {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, 4, true},
274};
275
276static struct sr_dev_driver rigol_ds_driver_info;
277
278static void clear_helper(void *priv)
279{
280 struct dev_context *devc;
281 unsigned int i;
282
283 devc = priv;
284 g_free(devc->data);
285 g_free(devc->buffer);
286 for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
287 g_free(devc->coupling[i]);
288 g_free(devc->trigger_source);
289 g_free(devc->trigger_slope);
290 g_free(devc->analog_groups);
291 g_free(devc);
292}
293
294static int dev_clear(const struct sr_dev_driver *di)
295{
296 return std_dev_clear(di, clear_helper);
297}
298
299static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
300{
301 struct dev_context *devc;
302 struct sr_dev_inst *sdi;
303 struct sr_scpi_hw_info *hw_info;
304 struct sr_channel *ch;
305 long n[3];
306 unsigned int i;
307 const struct rigol_ds_model *model = NULL;
308 gchar *channel_name, **version;
309
310 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
311 sr_info("Couldn't get IDN response, retrying.");
312 sr_scpi_close(scpi);
313 sr_scpi_open(scpi);
314 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
315 sr_info("Couldn't get IDN response.");
316 return NULL;
317 }
318 }
319
320 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
321 if (!g_ascii_strcasecmp(hw_info->manufacturer,
322 supported_models[i].series->vendor->full_name) &&
323 !strcmp(hw_info->model, supported_models[i].name)) {
324 model = &supported_models[i];
325 break;
326 }
327 }
328
329 if (!model) {
330 sr_scpi_hw_info_free(hw_info);
331 return NULL;
332 }
333
334 sdi = g_malloc0(sizeof(struct sr_dev_inst));
335 sdi->vendor = g_strdup(model->series->vendor->name);
336 sdi->model = g_strdup(model->name);
337 sdi->version = g_strdup(hw_info->firmware_version);
338 sdi->conn = scpi;
339 sdi->driver = &rigol_ds_driver_info;
340 sdi->inst_type = SR_INST_SCPI;
341 sdi->serial_num = g_strdup(hw_info->serial_number);
342 devc = g_malloc0(sizeof(struct dev_context));
343 devc->limit_frames = 0;
344 devc->model = model;
345 devc->format = model->series->format;
346
347 /* DS1000 models with firmware before 0.2.4 used the old data format. */
348 if (model->series == SERIES(DS1000)) {
349 version = g_strsplit(hw_info->firmware_version, ".", 0);
350 do {
351 if (!version[0] || !version[1] || !version[2])
352 break;
353 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
354 break;
355 for (i = 0; i < 3; i++) {
356 if (sr_atol(version[i], &n[i]) != SR_OK)
357 break;
358 }
359 if (i != 3)
360 break;
361 scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2];
362 if (scpi->firmware_version < 24) {
363 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
364 devc->format = FORMAT_RAW;
365 }
366 break;
367 } while (0);
368 g_strfreev(version);
369 }
370
371 sr_scpi_hw_info_free(hw_info);
372
373 devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
374 model->analog_channels);
375
376 for (i = 0; i < model->analog_channels; i++) {
377 channel_name = g_strdup_printf("CH%d", i + 1);
378 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
379
380 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
381
382 devc->analog_groups[i]->name = channel_name;
383 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
384 sdi->channel_groups = g_slist_append(sdi->channel_groups,
385 devc->analog_groups[i]);
386 }
387
388 if (devc->model->has_digital) {
389 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
390
391 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
392 channel_name = g_strdup_printf("D%d", i);
393 ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
394 g_free(channel_name);
395 devc->digital_group->channels = g_slist_append(
396 devc->digital_group->channels, ch);
397 }
398 devc->digital_group->name = g_strdup("LA");
399 sdi->channel_groups = g_slist_append(sdi->channel_groups,
400 devc->digital_group);
401 }
402
403 for (i = 0; i < NUM_TIMEBASE; i++) {
404 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
405 devc->timebases = &timebases[i];
406 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
407 devc->num_timebases = &timebases[i] - devc->timebases + 1;
408 }
409
410 for (i = 0; i < NUM_VDIV; i++) {
411 if (!memcmp(&devc->model->series->min_vdiv,
412 &vdivs[i], sizeof(uint64_t[2]))) {
413 devc->vdivs = &vdivs[i];
414 devc->num_vdivs = NUM_VDIV - i;
415 }
416 }
417
418 devc->buffer = g_malloc(ACQ_BUFFER_SIZE);
419 devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float));
420
421 devc->data_source = DATA_SOURCE_LIVE;
422
423 sdi->priv = devc;
424
425 return sdi;
426}
427
428static GSList *scan(struct sr_dev_driver *di, GSList *options)
429{
430 return sr_scpi_scan(di->context, options, probe_device);
431}
432
433static int dev_open(struct sr_dev_inst *sdi)
434{
435 int ret;
436 struct sr_scpi_dev_inst *scpi = sdi->conn;
437
438 if ((ret = sr_scpi_open(scpi)) < 0) {
439 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
440 return SR_ERR;
441 }
442
443 if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
444 sr_err("Failed to get device config: %s.", sr_strerror(ret));
445 return SR_ERR;
446 }
447
448 sdi->status = SR_ST_ACTIVE;
449
450 return SR_OK;
451}
452
453static int dev_close(struct sr_dev_inst *sdi)
454{
455 struct sr_scpi_dev_inst *scpi;
456 struct dev_context *devc;
457
458 scpi = sdi->conn;
459 devc = sdi->priv;
460
461 if (devc->model->series->protocol == PROTOCOL_V2)
462 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
463
464 if (scpi) {
465 if (sr_scpi_close(scpi) < 0)
466 return SR_ERR;
467 sdi->status = SR_ST_INACTIVE;
468 }
469
470 return SR_OK;
471}
472
473static int analog_frame_size(const struct sr_dev_inst *sdi)
474{
475 struct dev_context *devc = sdi->priv;
476 struct sr_channel *ch;
477 int analog_channels = 0;
478 GSList *l;
479
480 for (l = sdi->channels; l; l = l->next) {
481 ch = l->data;
482 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
483 analog_channels++;
484 }
485
486 if (analog_channels == 0)
487 return 0;
488
489 switch (devc->data_source) {
490 case DATA_SOURCE_LIVE:
491 return devc->model->series->live_samples;
492 case DATA_SOURCE_MEMORY:
493 return devc->model->series->buffer_samples / analog_channels;
494 default:
495 return 0;
496 }
497}
498
499static int digital_frame_size(const struct sr_dev_inst *sdi)
500{
501 struct dev_context *devc = sdi->priv;
502
503 switch (devc->data_source) {
504 case DATA_SOURCE_LIVE:
505 return devc->model->series->live_samples * 2;
506 case DATA_SOURCE_MEMORY:
507 return devc->model->series->buffer_samples * 2;
508 default:
509 return 0;
510 }
511}
512
513static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
514 const struct sr_channel_group *cg)
515{
516 struct dev_context *devc;
517 struct sr_channel *ch;
518 const char *tmp_str;
519 uint64_t samplerate;
520 int analog_channel = -1;
521 float smallest_diff = INFINITY;
522 int idx = -1;
523 unsigned i;
524
525 if (!sdi)
526 return SR_ERR_ARG;
527
528 devc = sdi->priv;
529
530 /* If a channel group is specified, it must be a valid one. */
531 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
532 sr_err("Invalid channel group specified.");
533 return SR_ERR;
534 }
535
536 if (cg) {
537 ch = g_slist_nth_data(cg->channels, 0);
538 if (!ch)
539 return SR_ERR;
540 if (ch->type == SR_CHANNEL_ANALOG) {
541 if (ch->name[2] < '1' || ch->name[2] > '4')
542 return SR_ERR;
543 analog_channel = ch->name[2] - '1';
544 }
545 }
546
547 switch (key) {
548 case SR_CONF_NUM_HDIV:
549 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
550 break;
551 case SR_CONF_NUM_VDIV:
552 *data = g_variant_new_int32(devc->num_vdivs);
553 break;
554 case SR_CONF_DATA_SOURCE:
555 if (devc->data_source == DATA_SOURCE_LIVE)
556 *data = g_variant_new_string("Live");
557 else if (devc->data_source == DATA_SOURCE_MEMORY)
558 *data = g_variant_new_string("Memory");
559 else
560 *data = g_variant_new_string("Segmented");
561 break;
562 case SR_CONF_SAMPLERATE:
563 if (devc->data_source == DATA_SOURCE_LIVE) {
564 samplerate = analog_frame_size(sdi) /
565 (devc->timebase * devc->model->series->num_horizontal_divs);
566 *data = g_variant_new_uint64(samplerate);
567 } else {
568 sr_dbg("Unknown data source: %d.", devc->data_source);
569 return SR_ERR_NA;
570 }
571 break;
572 case SR_CONF_TRIGGER_SOURCE:
573 if (!strcmp(devc->trigger_source, "ACL"))
574 tmp_str = "AC Line";
575 else if (!strcmp(devc->trigger_source, "CHAN1"))
576 tmp_str = "CH1";
577 else if (!strcmp(devc->trigger_source, "CHAN2"))
578 tmp_str = "CH2";
579 else if (!strcmp(devc->trigger_source, "CHAN3"))
580 tmp_str = "CH3";
581 else if (!strcmp(devc->trigger_source, "CHAN4"))
582 tmp_str = "CH4";
583 else
584 tmp_str = devc->trigger_source;
585 *data = g_variant_new_string(tmp_str);
586 break;
587 case SR_CONF_TRIGGER_SLOPE:
588 if (!strncmp(devc->trigger_slope, "POS", 3)) {
589 tmp_str = "r";
590 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
591 tmp_str = "f";
592 } else {
593 sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
594 return SR_ERR_NA;
595 }
596 *data = g_variant_new_string(tmp_str);
597 break;
598 case SR_CONF_TRIGGER_LEVEL:
599 *data = g_variant_new_double(devc->trigger_level);
600 break;
601 case SR_CONF_TIMEBASE:
602 for (i = 0; i < devc->num_timebases; i++) {
603 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
604 float diff = fabs(devc->timebase - tb);
605 if (diff < smallest_diff) {
606 smallest_diff = diff;
607 idx = i;
608 }
609 }
610 if (idx < 0) {
611 sr_dbg("Negative timebase index: %d.", idx);
612 return SR_ERR_NA;
613 }
614 *data = g_variant_new("(tt)", devc->timebases[idx][0],
615 devc->timebases[idx][1]);
616 break;
617 case SR_CONF_VDIV:
618 if (analog_channel < 0) {
619 sr_dbg("Negative analog channel: %d.", analog_channel);
620 return SR_ERR_NA;
621 }
622 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
623 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
624 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
625 if (diff < smallest_diff) {
626 smallest_diff = diff;
627 idx = i;
628 }
629 }
630 if (idx < 0) {
631 sr_dbg("Negative vdiv index: %d.", idx);
632 return SR_ERR_NA;
633 }
634 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
635 break;
636 case SR_CONF_COUPLING:
637 if (analog_channel < 0) {
638 sr_dbg("Negative analog channel: %d.", analog_channel);
639 return SR_ERR_NA;
640 }
641 *data = g_variant_new_string(devc->coupling[analog_channel]);
642 break;
643 case SR_CONF_PROBE_FACTOR:
644 if (analog_channel < 0) {
645 sr_dbg("Negative analog channel: %d.", analog_channel);
646 return SR_ERR_NA;
647 }
648 *data = g_variant_new_uint64(devc->attenuation[analog_channel]);
649 break;
650 default:
651 return SR_ERR_NA;
652 }
653
654 return SR_OK;
655}
656
657static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
658 const struct sr_channel_group *cg)
659{
660 struct dev_context *devc;
661 uint64_t p, q;
662 double t_dbl;
663 unsigned int i, j;
664 int ret;
665 const char *tmp_str;
666 char buffer[16];
667
668 devc = sdi->priv;
669
670 /* If a channel group is specified, it must be a valid one. */
671 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
672 sr_err("Invalid channel group specified.");
673 return SR_ERR;
674 }
675
676 ret = SR_OK;
677 switch (key) {
678 case SR_CONF_LIMIT_FRAMES:
679 devc->limit_frames = g_variant_get_uint64(data);
680 break;
681 case SR_CONF_TRIGGER_SLOPE:
682 tmp_str = g_variant_get_string(data, NULL);
683
684 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r')) {
685 sr_err("Unknown trigger slope: '%s'.",
686 (tmp_str) ? tmp_str : "NULL");
687 return SR_ERR_ARG;
688 }
689
690 g_free(devc->trigger_slope);
691 devc->trigger_slope = g_strdup((tmp_str[0] == 'r') ? "POS" : "NEG");
692 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
693 break;
694 case SR_CONF_HORIZ_TRIGGERPOS:
695 t_dbl = g_variant_get_double(data);
696 if (t_dbl < 0.0 || t_dbl > 1.0) {
697 sr_err("Invalid horiz. trigger position: %g.", t_dbl);
698 return SR_ERR;
699 }
700 devc->horiz_triggerpos = t_dbl;
701 /* We have the trigger offset as a percentage of the frame, but
702 * need to express this in seconds. */
703 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
704 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
705 ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
706 break;
707 case SR_CONF_TRIGGER_LEVEL:
708 t_dbl = g_variant_get_double(data);
709 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", t_dbl);
710 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:LEV %s", buffer);
711 if (ret == SR_OK)
712 devc->trigger_level = t_dbl;
713 break;
714 case SR_CONF_TIMEBASE:
715 g_variant_get(data, "(tt)", &p, &q);
716 for (i = 0; i < devc->num_timebases; i++) {
717 if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
718 devc->timebase = (float)p / q;
719 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
720 devc->timebase);
721 ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
722 break;
723 }
724 }
725 if (i == devc->num_timebases) {
726 sr_err("Invalid timebase index: %d.", i);
727 ret = SR_ERR_ARG;
728 }
729 break;
730 case SR_CONF_TRIGGER_SOURCE:
731 tmp_str = g_variant_get_string(data, NULL);
732 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
733 if (!strcmp(trigger_sources[i], tmp_str)) {
734 g_free(devc->trigger_source);
735 devc->trigger_source = g_strdup(trigger_sources[i]);
736 if (!strcmp(devc->trigger_source, "AC Line"))
737 tmp_str = "ACL";
738 else if (!strcmp(devc->trigger_source, "CH1"))
739 tmp_str = "CHAN1";
740 else if (!strcmp(devc->trigger_source, "CH2"))
741 tmp_str = "CHAN2";
742 else if (!strcmp(devc->trigger_source, "CH3"))
743 tmp_str = "CHAN3";
744 else if (!strcmp(devc->trigger_source, "CH4"))
745 tmp_str = "CHAN4";
746 else
747 tmp_str = (char *)devc->trigger_source;
748 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
749 break;
750 }
751 }
752 if (i == ARRAY_SIZE(trigger_sources)) {
753 sr_err("Invalid trigger source index: %d.", i);
754 ret = SR_ERR_ARG;
755 }
756 break;
757 case SR_CONF_VDIV:
758 if (!cg) {
759 sr_err("No channel group specified.");
760 return SR_ERR_CHANNEL_GROUP;
761 }
762 g_variant_get(data, "(tt)", &p, &q);
763 for (i = 0; i < devc->model->analog_channels; i++) {
764 if (cg == devc->analog_groups[i]) {
765 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
766 if (vdivs[j][0] != p || vdivs[j][1] != q)
767 continue;
768 devc->vdiv[i] = (float)p / q;
769 g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
770 devc->vdiv[i]);
771 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1,
772 buffer);
773 }
774 sr_err("Invalid vdiv index: %d.", j);
775 return SR_ERR_ARG;
776 }
777 }
778 sr_dbg("Didn't set vdiv, unknown channel(group).");
779 return SR_ERR_NA;
780 case SR_CONF_COUPLING:
781 if (!cg) {
782 sr_err("No channel group specified.");
783 return SR_ERR_CHANNEL_GROUP;
784 }
785 tmp_str = g_variant_get_string(data, NULL);
786 for (i = 0; i < devc->model->analog_channels; i++) {
787 if (cg == devc->analog_groups[i]) {
788 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
789 if (!strcmp(tmp_str, coupling[j])) {
790 g_free(devc->coupling[i]);
791 devc->coupling[i] = g_strdup(coupling[j]);
792 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1,
793 devc->coupling[i]);
794 }
795 }
796 sr_err("Invalid coupling index: %d.", j);
797 return SR_ERR_ARG;
798 }
799 }
800 sr_dbg("Didn't set coupling, unknown channel(group).");
801 return SR_ERR_NA;
802 case SR_CONF_PROBE_FACTOR:
803 if (!cg) {
804 sr_err("No channel group specified.");
805 return SR_ERR_CHANNEL_GROUP;
806 }
807 p = g_variant_get_uint64(data);
808 for (i = 0; i < devc->model->analog_channels; i++) {
809 if (cg == devc->analog_groups[i]) {
810 for (j = 0; j < ARRAY_SIZE(probe_factor); j++) {
811 if (p == probe_factor[j]) {
812 devc->attenuation[i] = p;
813 ret = rigol_ds_config_set(sdi, ":CHAN%d:PROB %"PRIu64,
814 i + 1, p);
815 if (ret == SR_OK)
816 rigol_ds_get_dev_cfg_vertical(sdi);
817 return ret;
818 }
819 }
820 sr_err("Invalid probe factor: %"PRIu64".", p);
821 return SR_ERR_ARG;
822 }
823 }
824 sr_dbg("Didn't set probe factor, unknown channel(group).");
825 return SR_ERR_NA;
826 case SR_CONF_DATA_SOURCE:
827 tmp_str = g_variant_get_string(data, NULL);
828 if (!strcmp(tmp_str, "Live"))
829 devc->data_source = DATA_SOURCE_LIVE;
830 else if (devc->model->series->protocol >= PROTOCOL_V2
831 && !strcmp(tmp_str, "Memory"))
832 devc->data_source = DATA_SOURCE_MEMORY;
833 else if (devc->model->series->protocol >= PROTOCOL_V3
834 && !strcmp(tmp_str, "Segmented"))
835 devc->data_source = DATA_SOURCE_SEGMENTED;
836 else {
837 sr_err("Unknown data source: '%s'.", tmp_str);
838 return SR_ERR;
839 }
840 break;
841 default:
842 return SR_ERR_NA;
843 }
844
845 return ret;
846}
847
848static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
849 const struct sr_channel_group *cg)
850{
851 GVariant *tuple, *rational[2];
852 GVariantBuilder gvb;
853 unsigned int i;
854 struct dev_context *devc = NULL;
855
856 /* SR_CONF_SCAN_OPTIONS is always valid, regardless of sdi or channel group. */
857 if (key == SR_CONF_SCAN_OPTIONS) {
858 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
859 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
860 return SR_OK;
861 }
862
863 /* If sdi is NULL, nothing except SR_CONF_DEVICE_OPTIONS can be provided. */
864 if (key == SR_CONF_DEVICE_OPTIONS && !sdi) {
865 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
866 drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
867 return SR_OK;
868 }
869
870 /* Every other option requires a valid device instance. */
871 if (!sdi)
872 return SR_ERR_ARG;
873 devc = sdi->priv;
874
875 /* If a channel group is specified, it must be a valid one. */
876 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
877 sr_err("Invalid channel group specified.");
878 return SR_ERR;
879 }
880
881 switch (key) {
882 case SR_CONF_DEVICE_OPTIONS:
883 if (!cg) {
884 /* If cg is NULL, only the SR_CONF_DEVICE_OPTIONS that are not
885 * specific to a channel group must be returned. */
886 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
887 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
888 return SR_OK;
889 }
890 if (cg == devc->digital_group) {
891 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
892 NULL, 0, sizeof(uint32_t));
893 return SR_OK;
894 } else {
895 for (i = 0; i < devc->model->analog_channels; i++) {
896 if (cg == devc->analog_groups[i]) {
897 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
898 analog_devopts, ARRAY_SIZE(analog_devopts), sizeof(uint32_t));
899 return SR_OK;
900 }
901 }
902 return SR_ERR_NA;
903 }
904 break;
905 case SR_CONF_COUPLING:
906 if (!cg) {
907 sr_err("No channel group specified.");
908 return SR_ERR_CHANNEL_GROUP;
909 }
910 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
911 break;
912 case SR_CONF_PROBE_FACTOR:
913 if (!cg) {
914 sr_err("No channel group specified.");
915 return SR_ERR_CHANNEL_GROUP;
916 }
917 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT64,
918 probe_factor, ARRAY_SIZE(probe_factor), sizeof(uint64_t));
919 break;
920 case SR_CONF_VDIV:
921 if (!devc)
922 /* Can't know this until we have the exact model. */
923 return SR_ERR_ARG;
924 if (!cg) {
925 sr_err("No channel group specified.");
926 return SR_ERR_CHANNEL_GROUP;
927 }
928 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
929 for (i = 0; i < devc->num_vdivs; i++) {
930 rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
931 rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
932 tuple = g_variant_new_tuple(rational, 2);
933 g_variant_builder_add_value(&gvb, tuple);
934 }
935 *data = g_variant_builder_end(&gvb);
936 break;
937 case SR_CONF_TIMEBASE:
938 if (!devc)
939 /* Can't know this until we have the exact model. */
940 return SR_ERR_ARG;
941 if (devc->num_timebases <= 0)
942 return SR_ERR_NA;
943 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
944 for (i = 0; i < devc->num_timebases; i++) {
945 rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
946 rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
947 tuple = g_variant_new_tuple(rational, 2);
948 g_variant_builder_add_value(&gvb, tuple);
949 }
950 *data = g_variant_builder_end(&gvb);
951 break;
952 case SR_CONF_TRIGGER_SOURCE:
953 if (!devc)
954 /* Can't know this until we have the exact model. */
955 return SR_ERR_ARG;
956 *data = g_variant_new_strv(trigger_sources,
957 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
958 break;
959 case SR_CONF_TRIGGER_SLOPE:
960 *data = g_variant_new_strv(trigger_slopes, ARRAY_SIZE(trigger_slopes));
961 break;
962 case SR_CONF_DATA_SOURCE:
963 if (!devc)
964 /* Can't know this until we have the exact model. */
965 return SR_ERR_ARG;
966 switch (devc->model->series->protocol) {
967 case PROTOCOL_V1:
968 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
969 break;
970 case PROTOCOL_V2:
971 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
972 break;
973 default:
974 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
975 break;
976 }
977 break;
978 default:
979 return SR_ERR_NA;
980 }
981
982 return SR_OK;
983}
984
985static int dev_acquisition_start(const struct sr_dev_inst *sdi)
986{
987 struct sr_scpi_dev_inst *scpi;
988 struct dev_context *devc;
989 struct sr_channel *ch;
990 struct sr_datafeed_packet packet;
991 gboolean some_digital;
992 GSList *l;
993
994 scpi = sdi->conn;
995 devc = sdi->priv;
996
997 devc->num_frames = 0;
998
999 some_digital = FALSE;
1000 for (l = sdi->channels; l; l = l->next) {
1001 ch = l->data;
1002 sr_dbg("handling channel %s", ch->name);
1003 if (ch->type == SR_CHANNEL_ANALOG) {
1004 if (ch->enabled)
1005 devc->enabled_channels = g_slist_append(
1006 devc->enabled_channels, ch);
1007 if (ch->enabled != devc->analog_channels[ch->index]) {
1008 /* Enabled channel is currently disabled, or vice versa. */
1009 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
1010 ch->enabled ? "ON" : "OFF") != SR_OK)
1011 return SR_ERR;
1012 devc->analog_channels[ch->index] = ch->enabled;
1013 }
1014 } else if (ch->type == SR_CHANNEL_LOGIC) {
1015 /* Only one list entry for older protocols. All channels are
1016 * retrieved together when this entry is processed. */
1017 if (ch->enabled && (
1018 devc->model->series->protocol > PROTOCOL_V3 ||
1019 !some_digital))
1020 devc->enabled_channels = g_slist_append(
1021 devc->enabled_channels, ch);
1022 if (ch->enabled) {
1023 some_digital = TRUE;
1024 /* Turn on LA module if currently off. */
1025 if (!devc->la_enabled) {
1026 if (rigol_ds_config_set(sdi,
1027 devc->model->series->protocol >= PROTOCOL_V3 ?
1028 ":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
1029 return SR_ERR;
1030 devc->la_enabled = TRUE;
1031 }
1032 }
1033 if (ch->enabled != devc->digital_channels[ch->index]) {
1034 /* Enabled channel is currently disabled, or vice versa. */
1035 if (rigol_ds_config_set(sdi,
1036 devc->model->series->protocol >= PROTOCOL_V3 ?
1037 ":LA:DIG%d:DISP %s" : ":DIG%d:TURN %s", ch->index,
1038 ch->enabled ? "ON" : "OFF") != SR_OK)
1039 return SR_ERR;
1040 devc->digital_channels[ch->index] = ch->enabled;
1041 }
1042 }
1043 }
1044
1045 if (!devc->enabled_channels)
1046 return SR_ERR;
1047
1048 /* Turn off LA module if on and no digital channels selected. */
1049 if (devc->la_enabled && !some_digital)
1050 if (rigol_ds_config_set(sdi,
1051 devc->model->series->protocol >= PROTOCOL_V3 ?
1052 ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK)
1053 return SR_ERR;
1054
1055 /* Set memory mode. */
1056 if (devc->data_source == DATA_SOURCE_SEGMENTED) {
1057 sr_err("Data source 'Segmented' not yet supported");
1058 return SR_ERR;
1059 }
1060
1061 devc->analog_frame_size = analog_frame_size(sdi);
1062 devc->digital_frame_size = digital_frame_size(sdi);
1063
1064 switch (devc->model->series->protocol) {
1065 case PROTOCOL_V2:
1066 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
1067 return SR_ERR;
1068 break;
1069 case PROTOCOL_V3:
1070 /* Apparently for the DS2000 the memory
1071 * depth can only be set in Running state -
1072 * this matches the behaviour of the UI. */
1073 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1074 return SR_ERR;
1075 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
1076 devc->analog_frame_size) != SR_OK)
1077 return SR_ERR;
1078 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
1079 return SR_ERR;
1080 break;
1081 default:
1082 break;
1083 }
1084
1085 if (devc->data_source == DATA_SOURCE_LIVE)
1086 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1087 return SR_ERR;
1088
1089 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
1090 rigol_ds_receive, (void *)sdi);
1091
1092 std_session_send_df_header(sdi);
1093
1094 devc->channel_entry = devc->enabled_channels;
1095
1096 if (rigol_ds_capture_start(sdi) != SR_OK)
1097 return SR_ERR;
1098
1099 /* Start of first frame. */
1100 packet.type = SR_DF_FRAME_BEGIN;
1101 sr_session_send(sdi, &packet);
1102
1103 return SR_OK;
1104}
1105
1106static int dev_acquisition_stop(struct sr_dev_inst *sdi)
1107{
1108 struct dev_context *devc;
1109 struct sr_scpi_dev_inst *scpi;
1110
1111 devc = sdi->priv;
1112
1113 std_session_send_df_end(sdi);
1114
1115 g_slist_free(devc->enabled_channels);
1116 devc->enabled_channels = NULL;
1117 scpi = sdi->conn;
1118 sr_scpi_source_remove(sdi->session, scpi);
1119
1120 return SR_OK;
1121}
1122
1123static struct sr_dev_driver rigol_ds_driver_info = {
1124 .name = "rigol-ds",
1125 .longname = "Rigol DS",
1126 .api_version = 1,
1127 .init = std_init,
1128 .cleanup = std_cleanup,
1129 .scan = scan,
1130 .dev_list = std_dev_list,
1131 .dev_clear = dev_clear,
1132 .config_get = config_get,
1133 .config_set = config_set,
1134 .config_list = config_list,
1135 .dev_open = dev_open,
1136 .dev_close = dev_close,
1137 .dev_acquisition_start = dev_acquisition_start,
1138 .dev_acquisition_stop = dev_acquisition_stop,
1139 .context = NULL,
1140};
1141SR_REGISTER_DEV_DRIVER(rigol_ds_driver_info);
Hardware access and backend lib