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drivers: Provide proper drvopts.
[libsigrok.git] / src / hardware / rigol-ds / api.c
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <config.h>
23#include <fcntl.h>
24#include <unistd.h>
25#include <stdlib.h>
26#include <string.h>
27#include <strings.h>
28#include <math.h>
29#include <glib.h>
30#include <libsigrok/libsigrok.h>
31#include "libsigrok-internal.h"
32#include "scpi.h"
33#include "protocol.h"
34
35static const uint32_t scanopts[] = {
36 SR_CONF_CONN,
37 SR_CONF_SERIALCOMM,
38};
39
40static const uint32_t drvopts[] = {
41 SR_CONF_OSCILLOSCOPE,
42};
43
44static const uint32_t devopts[] = {
45 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
46 SR_CONF_SAMPLERATE | SR_CONF_GET,
47 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
48 SR_CONF_NUM_HDIV | SR_CONF_GET,
49 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
50 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
51 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52 SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET,
53 SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
54};
55
56static const uint32_t analog_devopts[] = {
57 SR_CONF_NUM_VDIV | SR_CONF_GET,
58 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
59 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
60 SR_CONF_PROBE_FACTOR | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
61};
62
63static const uint64_t timebases[][2] = {
64 /* nanoseconds */
65 { 1, 1000000000 },
66 { 2, 1000000000 },
67 { 5, 1000000000 },
68 { 10, 1000000000 },
69 { 20, 1000000000 },
70 { 50, 1000000000 },
71 { 100, 1000000000 },
72 { 500, 1000000000 },
73 /* microseconds */
74 { 1, 1000000 },
75 { 2, 1000000 },
76 { 5, 1000000 },
77 { 10, 1000000 },
78 { 20, 1000000 },
79 { 50, 1000000 },
80 { 100, 1000000 },
81 { 200, 1000000 },
82 { 500, 1000000 },
83 /* milliseconds */
84 { 1, 1000 },
85 { 2, 1000 },
86 { 5, 1000 },
87 { 10, 1000 },
88 { 20, 1000 },
89 { 50, 1000 },
90 { 100, 1000 },
91 { 200, 1000 },
92 { 500, 1000 },
93 /* seconds */
94 { 1, 1 },
95 { 2, 1 },
96 { 5, 1 },
97 { 10, 1 },
98 { 20, 1 },
99 { 50, 1 },
100 { 100, 1 },
101 { 200, 1 },
102 { 500, 1 },
103 { 1000, 1 },
104};
105
106static const uint64_t vdivs[][2] = {
107 /* microvolts */
108 { 500, 1000000 },
109 /* millivolts */
110 { 1, 1000 },
111 { 2, 1000 },
112 { 5, 1000 },
113 { 10, 1000 },
114 { 20, 1000 },
115 { 50, 1000 },
116 { 100, 1000 },
117 { 200, 1000 },
118 { 500, 1000 },
119 /* volts */
120 { 1, 1 },
121 { 2, 1 },
122 { 5, 1 },
123 { 10, 1 },
124 { 20, 1 },
125 { 50, 1 },
126 { 100, 1 },
127};
128
129#define NUM_TIMEBASE ARRAY_SIZE(timebases)
130#define NUM_VDIV ARRAY_SIZE(vdivs)
131
132static const char *trigger_sources[] = {
133 "CH1",
134 "CH2",
135 "CH3",
136 "CH4",
137 "EXT",
138 "AC Line",
139 "D0",
140 "D1",
141 "D2",
142 "D3",
143 "D4",
144 "D5",
145 "D6",
146 "D7",
147 "D8",
148 "D9",
149 "D10",
150 "D11",
151 "D12",
152 "D13",
153 "D14",
154 "D15",
155};
156
157static const char *trigger_slopes[] = {
158 "r",
159 "f",
160};
161
162static const char *coupling[] = {
163 "AC",
164 "DC",
165 "GND",
166};
167
168static const uint64_t probe_factor[] = {
169 1,
170 2,
171 5,
172 10,
173 20,
174 50,
175 100,
176 200,
177 500,
178 1000,
179};
180
181/* Do not change the order of entries */
182static const char *data_sources[] = {
183 "Live",
184 "Memory",
185 "Segmented",
186};
187
188enum vendor {
189 RIGOL,
190 AGILENT,
191};
192
193enum series {
194 VS5000,
195 DS1000,
196 DS2000,
197 DS2000A,
198 DSO1000,
199 DS1000Z,
200};
201
202/* short name, full name */
203static const struct rigol_ds_vendor supported_vendors[] = {
204 [RIGOL] = {"Rigol", "Rigol Technologies"},
205 [AGILENT] = {"Agilent", "Agilent Technologies"},
206};
207
208#define VENDOR(x) &supported_vendors[x]
209/* vendor, series, protocol, max timebase, min vdiv, number of horizontal divs,
210 * live waveform samples, memory buffer samples */
211static const struct rigol_ds_series supported_series[] = {
212 [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
213 {50, 1}, {2, 1000}, 14, 2048, 0},
214 [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
215 {50, 1}, {2, 1000}, 12, 600, 1048576},
216 [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
217 {500, 1}, {500, 1000000}, 14, 1400, 14000},
218 [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
219 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
220 [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
221 {50, 1}, {2, 1000}, 12, 600, 20480},
222 [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
223 {50, 1}, {1, 1000}, 12, 1200, 12000000},
224};
225
226#define SERIES(x) &supported_series[x]
227/* series, model, min timebase, analog channels, digital */
228static const struct rigol_ds_model supported_models[] = {
229 {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false},
230 {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false},
231 {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false},
232 {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false},
233 {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false},
234 {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true},
235 {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true},
236 {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true},
237 {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true},
238 {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true},
239 {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false},
240 {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false},
241 {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false},
242 {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true},
243 {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true},
244 {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true},
245 {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false},
246 {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false},
247 {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false},
248 {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false},
249 {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false},
250 {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false},
251 {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false},
252 {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false},
253 {SERIES(DS2000A), "MSO2072A", {5, 1000000000}, 2, true},
254 {SERIES(DS2000A), "MSO2102A", {5, 1000000000}, 2, true},
255 {SERIES(DS2000A), "MSO2202A", {2, 1000000000}, 2, true},
256 {SERIES(DS2000A), "MSO2302A", {1, 1000000000}, 2, true},
257 {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false},
258 {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false},
259 {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false},
260 {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false},
261 {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false},
262 {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false},
263 {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, 4, false},
264 {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, 4, false},
265 {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, 4, false},
266 {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, 4, false},
267 {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, 4, false},
268 {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, 4, false},
269 {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, 4, false},
270 {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, 4, true},
271 {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, 4, true},
272 {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, 4, true},
273 {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, 4, true},
274};
275
276static struct sr_dev_driver rigol_ds_driver_info;
277
278static void clear_helper(struct dev_context *devc)
279{
280 unsigned int i;
281
282 g_free(devc->data);
283 g_free(devc->buffer);
284 for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
285 g_free(devc->coupling[i]);
286 g_free(devc->trigger_source);
287 g_free(devc->trigger_slope);
288 g_free(devc->analog_groups);
289}
290
291static int dev_clear(const struct sr_dev_driver *di)
292{
293 return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
294}
295
296static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
297{
298 struct dev_context *devc;
299 struct sr_dev_inst *sdi;
300 struct sr_scpi_hw_info *hw_info;
301 struct sr_channel *ch;
302 long n[3];
303 unsigned int i;
304 const struct rigol_ds_model *model = NULL;
305 gchar *channel_name, **version;
306
307 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
308 sr_info("Couldn't get IDN response, retrying.");
309 sr_scpi_close(scpi);
310 sr_scpi_open(scpi);
311 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
312 sr_info("Couldn't get IDN response.");
313 return NULL;
314 }
315 }
316
317 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
318 if (!g_ascii_strcasecmp(hw_info->manufacturer,
319 supported_models[i].series->vendor->full_name) &&
320 !strcmp(hw_info->model, supported_models[i].name)) {
321 model = &supported_models[i];
322 break;
323 }
324 }
325
326 if (!model) {
327 sr_scpi_hw_info_free(hw_info);
328 return NULL;
329 }
330
331 sdi = g_malloc0(sizeof(struct sr_dev_inst));
332 sdi->vendor = g_strdup(model->series->vendor->name);
333 sdi->model = g_strdup(model->name);
334 sdi->version = g_strdup(hw_info->firmware_version);
335 sdi->conn = scpi;
336 sdi->driver = &rigol_ds_driver_info;
337 sdi->inst_type = SR_INST_SCPI;
338 sdi->serial_num = g_strdup(hw_info->serial_number);
339 devc = g_malloc0(sizeof(struct dev_context));
340 devc->limit_frames = 0;
341 devc->model = model;
342 devc->format = model->series->format;
343
344 /* DS1000 models with firmware before 0.2.4 used the old data format. */
345 if (model->series == SERIES(DS1000)) {
346 version = g_strsplit(hw_info->firmware_version, ".", 0);
347 do {
348 if (!version[0] || !version[1] || !version[2])
349 break;
350 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
351 break;
352 for (i = 0; i < 3; i++) {
353 if (sr_atol(version[i], &n[i]) != SR_OK)
354 break;
355 }
356 if (i != 3)
357 break;
358 scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2];
359 if (scpi->firmware_version < 24) {
360 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
361 devc->format = FORMAT_RAW;
362 }
363 break;
364 } while (0);
365 g_strfreev(version);
366 }
367
368 sr_scpi_hw_info_free(hw_info);
369
370 devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
371 model->analog_channels);
372
373 for (i = 0; i < model->analog_channels; i++) {
374 channel_name = g_strdup_printf("CH%d", i + 1);
375 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
376
377 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
378
379 devc->analog_groups[i]->name = channel_name;
380 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
381 sdi->channel_groups = g_slist_append(sdi->channel_groups,
382 devc->analog_groups[i]);
383 }
384
385 if (devc->model->has_digital) {
386 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
387
388 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
389 channel_name = g_strdup_printf("D%d", i);
390 ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
391 g_free(channel_name);
392 devc->digital_group->channels = g_slist_append(
393 devc->digital_group->channels, ch);
394 }
395 devc->digital_group->name = g_strdup("LA");
396 sdi->channel_groups = g_slist_append(sdi->channel_groups,
397 devc->digital_group);
398 }
399
400 for (i = 0; i < NUM_TIMEBASE; i++) {
401 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
402 devc->timebases = &timebases[i];
403 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
404 devc->num_timebases = &timebases[i] - devc->timebases + 1;
405 }
406
407 for (i = 0; i < NUM_VDIV; i++) {
408 if (!memcmp(&devc->model->series->min_vdiv,
409 &vdivs[i], sizeof(uint64_t[2]))) {
410 devc->vdivs = &vdivs[i];
411 devc->num_vdivs = NUM_VDIV - i;
412 }
413 }
414
415 devc->buffer = g_malloc(ACQ_BUFFER_SIZE);
416 devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float));
417
418 devc->data_source = DATA_SOURCE_LIVE;
419
420 sdi->priv = devc;
421
422 return sdi;
423}
424
425static GSList *scan(struct sr_dev_driver *di, GSList *options)
426{
427 return sr_scpi_scan(di->context, options, probe_device);
428}
429
430static int dev_open(struct sr_dev_inst *sdi)
431{
432 int ret;
433 struct sr_scpi_dev_inst *scpi = sdi->conn;
434
435 if ((ret = sr_scpi_open(scpi)) < 0) {
436 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
437 return SR_ERR;
438 }
439
440 if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
441 sr_err("Failed to get device config: %s.", sr_strerror(ret));
442 return SR_ERR;
443 }
444
445 return SR_OK;
446}
447
448static int dev_close(struct sr_dev_inst *sdi)
449{
450 struct sr_scpi_dev_inst *scpi;
451 struct dev_context *devc;
452
453 scpi = sdi->conn;
454 devc = sdi->priv;
455
456 if (!scpi)
457 return SR_ERR_BUG;
458
459 if (devc->model->series->protocol == PROTOCOL_V2)
460 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
461
462 return sr_scpi_close(scpi);
463}
464
465static int analog_frame_size(const struct sr_dev_inst *sdi)
466{
467 struct dev_context *devc = sdi->priv;
468 struct sr_channel *ch;
469 int analog_channels = 0;
470 GSList *l;
471
472 for (l = sdi->channels; l; l = l->next) {
473 ch = l->data;
474 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
475 analog_channels++;
476 }
477
478 if (analog_channels == 0)
479 return 0;
480
481 switch (devc->data_source) {
482 case DATA_SOURCE_LIVE:
483 return devc->model->series->live_samples;
484 case DATA_SOURCE_MEMORY:
485 return devc->model->series->buffer_samples / analog_channels;
486 default:
487 return 0;
488 }
489}
490
491static int digital_frame_size(const struct sr_dev_inst *sdi)
492{
493 struct dev_context *devc = sdi->priv;
494
495 switch (devc->data_source) {
496 case DATA_SOURCE_LIVE:
497 return devc->model->series->live_samples * 2;
498 case DATA_SOURCE_MEMORY:
499 return devc->model->series->buffer_samples * 2;
500 default:
501 return 0;
502 }
503}
504
505static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
506 const struct sr_channel_group *cg)
507{
508 struct dev_context *devc;
509 struct sr_channel *ch;
510 const char *tmp_str;
511 uint64_t samplerate;
512 int analog_channel = -1;
513 float smallest_diff = INFINITY;
514 int idx = -1;
515 unsigned i;
516
517 if (!sdi)
518 return SR_ERR_ARG;
519
520 devc = sdi->priv;
521
522 /* If a channel group is specified, it must be a valid one. */
523 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
524 sr_err("Invalid channel group specified.");
525 return SR_ERR;
526 }
527
528 if (cg) {
529 ch = g_slist_nth_data(cg->channels, 0);
530 if (!ch)
531 return SR_ERR;
532 if (ch->type == SR_CHANNEL_ANALOG) {
533 if (ch->name[2] < '1' || ch->name[2] > '4')
534 return SR_ERR;
535 analog_channel = ch->name[2] - '1';
536 }
537 }
538
539 switch (key) {
540 case SR_CONF_NUM_HDIV:
541 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
542 break;
543 case SR_CONF_NUM_VDIV:
544 *data = g_variant_new_int32(devc->num_vdivs);
545 break;
546 case SR_CONF_DATA_SOURCE:
547 if (devc->data_source == DATA_SOURCE_LIVE)
548 *data = g_variant_new_string("Live");
549 else if (devc->data_source == DATA_SOURCE_MEMORY)
550 *data = g_variant_new_string("Memory");
551 else
552 *data = g_variant_new_string("Segmented");
553 break;
554 case SR_CONF_SAMPLERATE:
555 if (devc->data_source == DATA_SOURCE_LIVE) {
556 samplerate = analog_frame_size(sdi) /
557 (devc->timebase * devc->model->series->num_horizontal_divs);
558 *data = g_variant_new_uint64(samplerate);
559 } else {
560 sr_dbg("Unknown data source: %d.", devc->data_source);
561 return SR_ERR_NA;
562 }
563 break;
564 case SR_CONF_TRIGGER_SOURCE:
565 if (!strcmp(devc->trigger_source, "ACL"))
566 tmp_str = "AC Line";
567 else if (!strcmp(devc->trigger_source, "CHAN1"))
568 tmp_str = "CH1";
569 else if (!strcmp(devc->trigger_source, "CHAN2"))
570 tmp_str = "CH2";
571 else if (!strcmp(devc->trigger_source, "CHAN3"))
572 tmp_str = "CH3";
573 else if (!strcmp(devc->trigger_source, "CHAN4"))
574 tmp_str = "CH4";
575 else
576 tmp_str = devc->trigger_source;
577 *data = g_variant_new_string(tmp_str);
578 break;
579 case SR_CONF_TRIGGER_SLOPE:
580 if (!strncmp(devc->trigger_slope, "POS", 3)) {
581 tmp_str = "r";
582 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
583 tmp_str = "f";
584 } else {
585 sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
586 return SR_ERR_NA;
587 }
588 *data = g_variant_new_string(tmp_str);
589 break;
590 case SR_CONF_TRIGGER_LEVEL:
591 *data = g_variant_new_double(devc->trigger_level);
592 break;
593 case SR_CONF_TIMEBASE:
594 for (i = 0; i < devc->num_timebases; i++) {
595 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
596 float diff = fabs(devc->timebase - tb);
597 if (diff < smallest_diff) {
598 smallest_diff = diff;
599 idx = i;
600 }
601 }
602 if (idx < 0) {
603 sr_dbg("Negative timebase index: %d.", idx);
604 return SR_ERR_NA;
605 }
606 *data = g_variant_new("(tt)", devc->timebases[idx][0],
607 devc->timebases[idx][1]);
608 break;
609 case SR_CONF_VDIV:
610 if (analog_channel < 0) {
611 sr_dbg("Negative analog channel: %d.", analog_channel);
612 return SR_ERR_NA;
613 }
614 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
615 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
616 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
617 if (diff < smallest_diff) {
618 smallest_diff = diff;
619 idx = i;
620 }
621 }
622 if (idx < 0) {
623 sr_dbg("Negative vdiv index: %d.", idx);
624 return SR_ERR_NA;
625 }
626 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
627 break;
628 case SR_CONF_COUPLING:
629 if (analog_channel < 0) {
630 sr_dbg("Negative analog channel: %d.", analog_channel);
631 return SR_ERR_NA;
632 }
633 *data = g_variant_new_string(devc->coupling[analog_channel]);
634 break;
635 case SR_CONF_PROBE_FACTOR:
636 if (analog_channel < 0) {
637 sr_dbg("Negative analog channel: %d.", analog_channel);
638 return SR_ERR_NA;
639 }
640 *data = g_variant_new_uint64(devc->attenuation[analog_channel]);
641 break;
642 default:
643 return SR_ERR_NA;
644 }
645
646 return SR_OK;
647}
648
649static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
650 const struct sr_channel_group *cg)
651{
652 struct dev_context *devc;
653 uint64_t p, q;
654 double t_dbl;
655 unsigned int i, j;
656 int ret;
657 const char *tmp_str;
658 char buffer[16];
659
660 devc = sdi->priv;
661
662 /* If a channel group is specified, it must be a valid one. */
663 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
664 sr_err("Invalid channel group specified.");
665 return SR_ERR;
666 }
667
668 ret = SR_OK;
669 switch (key) {
670 case SR_CONF_LIMIT_FRAMES:
671 devc->limit_frames = g_variant_get_uint64(data);
672 break;
673 case SR_CONF_TRIGGER_SLOPE:
674 tmp_str = g_variant_get_string(data, NULL);
675
676 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r')) {
677 sr_err("Unknown trigger slope: '%s'.",
678 (tmp_str) ? tmp_str : "NULL");
679 return SR_ERR_ARG;
680 }
681
682 g_free(devc->trigger_slope);
683 devc->trigger_slope = g_strdup((tmp_str[0] == 'r') ? "POS" : "NEG");
684 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
685 break;
686 case SR_CONF_HORIZ_TRIGGERPOS:
687 t_dbl = g_variant_get_double(data);
688 if (t_dbl < 0.0 || t_dbl > 1.0) {
689 sr_err("Invalid horiz. trigger position: %g.", t_dbl);
690 return SR_ERR;
691 }
692 devc->horiz_triggerpos = t_dbl;
693 /* We have the trigger offset as a percentage of the frame, but
694 * need to express this in seconds. */
695 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
696 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
697 ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
698 break;
699 case SR_CONF_TRIGGER_LEVEL:
700 t_dbl = g_variant_get_double(data);
701 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", t_dbl);
702 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:LEV %s", buffer);
703 if (ret == SR_OK)
704 devc->trigger_level = t_dbl;
705 break;
706 case SR_CONF_TIMEBASE:
707 g_variant_get(data, "(tt)", &p, &q);
708 for (i = 0; i < devc->num_timebases; i++) {
709 if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
710 devc->timebase = (float)p / q;
711 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
712 devc->timebase);
713 ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
714 break;
715 }
716 }
717 if (i == devc->num_timebases) {
718 sr_err("Invalid timebase index: %d.", i);
719 ret = SR_ERR_ARG;
720 }
721 break;
722 case SR_CONF_TRIGGER_SOURCE:
723 tmp_str = g_variant_get_string(data, NULL);
724 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
725 if (!strcmp(trigger_sources[i], tmp_str)) {
726 g_free(devc->trigger_source);
727 devc->trigger_source = g_strdup(trigger_sources[i]);
728 if (!strcmp(devc->trigger_source, "AC Line"))
729 tmp_str = "ACL";
730 else if (!strcmp(devc->trigger_source, "CH1"))
731 tmp_str = "CHAN1";
732 else if (!strcmp(devc->trigger_source, "CH2"))
733 tmp_str = "CHAN2";
734 else if (!strcmp(devc->trigger_source, "CH3"))
735 tmp_str = "CHAN3";
736 else if (!strcmp(devc->trigger_source, "CH4"))
737 tmp_str = "CHAN4";
738 else
739 tmp_str = (char *)devc->trigger_source;
740 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
741 break;
742 }
743 }
744 if (i == ARRAY_SIZE(trigger_sources)) {
745 sr_err("Invalid trigger source index: %d.", i);
746 ret = SR_ERR_ARG;
747 }
748 break;
749 case SR_CONF_VDIV:
750 if (!cg) {
751 sr_err("No channel group specified.");
752 return SR_ERR_CHANNEL_GROUP;
753 }
754 g_variant_get(data, "(tt)", &p, &q);
755 for (i = 0; i < devc->model->analog_channels; i++) {
756 if (cg == devc->analog_groups[i]) {
757 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
758 if (vdivs[j][0] != p || vdivs[j][1] != q)
759 continue;
760 devc->vdiv[i] = (float)p / q;
761 g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
762 devc->vdiv[i]);
763 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1,
764 buffer);
765 }
766 sr_err("Invalid vdiv index: %d.", j);
767 return SR_ERR_ARG;
768 }
769 }
770 sr_dbg("Didn't set vdiv, unknown channel(group).");
771 return SR_ERR_NA;
772 case SR_CONF_COUPLING:
773 if (!cg) {
774 sr_err("No channel group specified.");
775 return SR_ERR_CHANNEL_GROUP;
776 }
777 tmp_str = g_variant_get_string(data, NULL);
778 for (i = 0; i < devc->model->analog_channels; i++) {
779 if (cg == devc->analog_groups[i]) {
780 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
781 if (!strcmp(tmp_str, coupling[j])) {
782 g_free(devc->coupling[i]);
783 devc->coupling[i] = g_strdup(coupling[j]);
784 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1,
785 devc->coupling[i]);
786 }
787 }
788 sr_err("Invalid coupling index: %d.", j);
789 return SR_ERR_ARG;
790 }
791 }
792 sr_dbg("Didn't set coupling, unknown channel(group).");
793 return SR_ERR_NA;
794 case SR_CONF_PROBE_FACTOR:
795 if (!cg) {
796 sr_err("No channel group specified.");
797 return SR_ERR_CHANNEL_GROUP;
798 }
799 p = g_variant_get_uint64(data);
800 for (i = 0; i < devc->model->analog_channels; i++) {
801 if (cg == devc->analog_groups[i]) {
802 for (j = 0; j < ARRAY_SIZE(probe_factor); j++) {
803 if (p == probe_factor[j]) {
804 devc->attenuation[i] = p;
805 ret = rigol_ds_config_set(sdi, ":CHAN%d:PROB %"PRIu64,
806 i + 1, p);
807 if (ret == SR_OK)
808 rigol_ds_get_dev_cfg_vertical(sdi);
809 return ret;
810 }
811 }
812 sr_err("Invalid probe factor: %"PRIu64".", p);
813 return SR_ERR_ARG;
814 }
815 }
816 sr_dbg("Didn't set probe factor, unknown channel(group).");
817 return SR_ERR_NA;
818 case SR_CONF_DATA_SOURCE:
819 tmp_str = g_variant_get_string(data, NULL);
820 if (!strcmp(tmp_str, "Live"))
821 devc->data_source = DATA_SOURCE_LIVE;
822 else if (devc->model->series->protocol >= PROTOCOL_V2
823 && !strcmp(tmp_str, "Memory"))
824 devc->data_source = DATA_SOURCE_MEMORY;
825 else if (devc->model->series->protocol >= PROTOCOL_V3
826 && !strcmp(tmp_str, "Segmented"))
827 devc->data_source = DATA_SOURCE_SEGMENTED;
828 else {
829 sr_err("Unknown data source: '%s'.", tmp_str);
830 return SR_ERR;
831 }
832 break;
833 default:
834 return SR_ERR_NA;
835 }
836
837 return ret;
838}
839
840static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
841 const struct sr_channel_group *cg)
842{
843 GVariant *tuple, *rational[2];
844 GVariantBuilder gvb;
845 unsigned int i;
846 struct dev_context *devc;
847
848 devc = (sdi) ? sdi->priv : NULL;
849
850 switch (key) {
851 case SR_CONF_SCAN_OPTIONS:
852 case SR_CONF_DEVICE_OPTIONS:
853 if (!cg)
854 return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
855 if (cg == devc->digital_group) {
856 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
857 NULL, 0, sizeof(uint32_t));
858 return SR_OK;
859 } else {
860 for (i = 0; i < devc->model->analog_channels; i++) {
861 if (cg == devc->analog_groups[i]) {
862 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
863 analog_devopts, ARRAY_SIZE(analog_devopts), sizeof(uint32_t));
864 return SR_OK;
865 }
866 }
867 return SR_ERR_NA;
868 }
869 break;
870 case SR_CONF_COUPLING:
871 if (!cg)
872 return SR_ERR_CHANNEL_GROUP;
873 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
874 break;
875 case SR_CONF_PROBE_FACTOR:
876 if (!cg)
877 return SR_ERR_CHANNEL_GROUP;
878 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT64,
879 probe_factor, ARRAY_SIZE(probe_factor), sizeof(uint64_t));
880 break;
881 case SR_CONF_VDIV:
882 if (!devc)
883 /* Can't know this until we have the exact model. */
884 return SR_ERR_ARG;
885 if (!cg)
886 return SR_ERR_CHANNEL_GROUP;
887 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
888 for (i = 0; i < devc->num_vdivs; i++) {
889 rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
890 rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
891 tuple = g_variant_new_tuple(rational, 2);
892 g_variant_builder_add_value(&gvb, tuple);
893 }
894 *data = g_variant_builder_end(&gvb);
895 break;
896 case SR_CONF_TIMEBASE:
897 if (!devc)
898 /* Can't know this until we have the exact model. */
899 return SR_ERR_ARG;
900 if (devc->num_timebases <= 0)
901 return SR_ERR_NA;
902 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
903 for (i = 0; i < devc->num_timebases; i++) {
904 rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
905 rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
906 tuple = g_variant_new_tuple(rational, 2);
907 g_variant_builder_add_value(&gvb, tuple);
908 }
909 *data = g_variant_builder_end(&gvb);
910 break;
911 case SR_CONF_TRIGGER_SOURCE:
912 if (!devc)
913 /* Can't know this until we have the exact model. */
914 return SR_ERR_ARG;
915 *data = g_variant_new_strv(trigger_sources,
916 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
917 break;
918 case SR_CONF_TRIGGER_SLOPE:
919 *data = g_variant_new_strv(trigger_slopes, ARRAY_SIZE(trigger_slopes));
920 break;
921 case SR_CONF_DATA_SOURCE:
922 if (!devc)
923 /* Can't know this until we have the exact model. */
924 return SR_ERR_ARG;
925 switch (devc->model->series->protocol) {
926 case PROTOCOL_V1:
927 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
928 break;
929 case PROTOCOL_V2:
930 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
931 break;
932 default:
933 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
934 break;
935 }
936 break;
937 default:
938 return SR_ERR_NA;
939 }
940
941 return SR_OK;
942}
943
944static int dev_acquisition_start(const struct sr_dev_inst *sdi)
945{
946 struct sr_scpi_dev_inst *scpi;
947 struct dev_context *devc;
948 struct sr_channel *ch;
949 struct sr_datafeed_packet packet;
950 gboolean some_digital;
951 GSList *l;
952
953 scpi = sdi->conn;
954 devc = sdi->priv;
955
956 devc->num_frames = 0;
957
958 some_digital = FALSE;
959 for (l = sdi->channels; l; l = l->next) {
960 ch = l->data;
961 sr_dbg("handling channel %s", ch->name);
962 if (ch->type == SR_CHANNEL_ANALOG) {
963 if (ch->enabled)
964 devc->enabled_channels = g_slist_append(
965 devc->enabled_channels, ch);
966 if (ch->enabled != devc->analog_channels[ch->index]) {
967 /* Enabled channel is currently disabled, or vice versa. */
968 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
969 ch->enabled ? "ON" : "OFF") != SR_OK)
970 return SR_ERR;
971 devc->analog_channels[ch->index] = ch->enabled;
972 }
973 } else if (ch->type == SR_CHANNEL_LOGIC) {
974 /* Only one list entry for older protocols. All channels are
975 * retrieved together when this entry is processed. */
976 if (ch->enabled && (
977 devc->model->series->protocol > PROTOCOL_V3 ||
978 !some_digital))
979 devc->enabled_channels = g_slist_append(
980 devc->enabled_channels, ch);
981 if (ch->enabled) {
982 some_digital = TRUE;
983 /* Turn on LA module if currently off. */
984 if (!devc->la_enabled) {
985 if (rigol_ds_config_set(sdi,
986 devc->model->series->protocol >= PROTOCOL_V3 ?
987 ":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
988 return SR_ERR;
989 devc->la_enabled = TRUE;
990 }
991 }
992 if (ch->enabled != devc->digital_channels[ch->index]) {
993 /* Enabled channel is currently disabled, or vice versa. */
994 if (rigol_ds_config_set(sdi,
995 devc->model->series->protocol >= PROTOCOL_V3 ?
996 ":LA:DIG%d:DISP %s" : ":DIG%d:TURN %s", ch->index,
997 ch->enabled ? "ON" : "OFF") != SR_OK)
998 return SR_ERR;
999 devc->digital_channels[ch->index] = ch->enabled;
1000 }
1001 }
1002 }
1003
1004 if (!devc->enabled_channels)
1005 return SR_ERR;
1006
1007 /* Turn off LA module if on and no digital channels selected. */
1008 if (devc->la_enabled && !some_digital)
1009 if (rigol_ds_config_set(sdi,
1010 devc->model->series->protocol >= PROTOCOL_V3 ?
1011 ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK)
1012 return SR_ERR;
1013
1014 /* Set memory mode. */
1015 if (devc->data_source == DATA_SOURCE_SEGMENTED) {
1016 sr_err("Data source 'Segmented' not yet supported");
1017 return SR_ERR;
1018 }
1019
1020 devc->analog_frame_size = analog_frame_size(sdi);
1021 devc->digital_frame_size = digital_frame_size(sdi);
1022
1023 switch (devc->model->series->protocol) {
1024 case PROTOCOL_V2:
1025 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
1026 return SR_ERR;
1027 break;
1028 case PROTOCOL_V3:
1029 /* Apparently for the DS2000 the memory
1030 * depth can only be set in Running state -
1031 * this matches the behaviour of the UI. */
1032 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1033 return SR_ERR;
1034 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
1035 devc->analog_frame_size) != SR_OK)
1036 return SR_ERR;
1037 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
1038 return SR_ERR;
1039 break;
1040 default:
1041 break;
1042 }
1043
1044 if (devc->data_source == DATA_SOURCE_LIVE)
1045 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1046 return SR_ERR;
1047
1048 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
1049 rigol_ds_receive, (void *)sdi);
1050
1051 std_session_send_df_header(sdi);
1052
1053 devc->channel_entry = devc->enabled_channels;
1054
1055 if (rigol_ds_capture_start(sdi) != SR_OK)
1056 return SR_ERR;
1057
1058 /* Start of first frame. */
1059 packet.type = SR_DF_FRAME_BEGIN;
1060 sr_session_send(sdi, &packet);
1061
1062 return SR_OK;
1063}
1064
1065static int dev_acquisition_stop(struct sr_dev_inst *sdi)
1066{
1067 struct dev_context *devc;
1068 struct sr_scpi_dev_inst *scpi;
1069
1070 devc = sdi->priv;
1071
1072 std_session_send_df_end(sdi);
1073
1074 g_slist_free(devc->enabled_channels);
1075 devc->enabled_channels = NULL;
1076 scpi = sdi->conn;
1077 sr_scpi_source_remove(sdi->session, scpi);
1078
1079 return SR_OK;
1080}
1081
1082static struct sr_dev_driver rigol_ds_driver_info = {
1083 .name = "rigol-ds",
1084 .longname = "Rigol DS",
1085 .api_version = 1,
1086 .init = std_init,
1087 .cleanup = std_cleanup,
1088 .scan = scan,
1089 .dev_list = std_dev_list,
1090 .dev_clear = dev_clear,
1091 .config_get = config_get,
1092 .config_set = config_set,
1093 .config_list = config_list,
1094 .dev_open = dev_open,
1095 .dev_close = dev_close,
1096 .dev_acquisition_start = dev_acquisition_start,
1097 .dev_acquisition_stop = dev_acquisition_stop,
1098 .context = NULL,
1099};
1100SR_REGISTER_DEV_DRIVER(rigol_ds_driver_info);
Hardware access and backend lib