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serial: introduce "has receive data" query
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <config.h>
21#include "protocol.h"
22
23#define SERIALCOMM "115200/8n1"
24
25static const uint32_t scanopts[] = {
26 SR_CONF_CONN,
27 SR_CONF_SERIALCOMM,
28};
29
30static const uint32_t drvopts[] = {
31 SR_CONF_LOGIC_ANALYZER,
32};
33
34static const uint32_t devopts[] = {
35 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
36 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
37 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
38 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
39 SR_CONF_EXTERNAL_CLOCK | SR_CONF_SET,
40 SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
41 SR_CONF_SWAP | SR_CONF_SET,
42 SR_CONF_RLE | SR_CONF_GET | SR_CONF_SET,
43};
44
45static const int32_t trigger_matches[] = {
46 SR_TRIGGER_ZERO,
47 SR_TRIGGER_ONE,
48};
49
50#define STR_PATTERN_NONE "None"
51#define STR_PATTERN_EXTERNAL "External"
52#define STR_PATTERN_INTERNAL "Internal"
53
54/* Supported methods of test pattern outputs */
55enum {
56 /**
57 * Capture pins 31:16 (unbuffered wing) output a test pattern
58 * that can captured on pins 0:15.
59 */
60 PATTERN_EXTERNAL,
61
62 /** Route test pattern internally to capture buffer. */
63 PATTERN_INTERNAL,
64};
65
66static const char *patterns[] = {
67 STR_PATTERN_NONE,
68 STR_PATTERN_EXTERNAL,
69 STR_PATTERN_INTERNAL,
70};
71
72/* Channels are numbered 0-31 (on the PCB silkscreen). */
73SR_PRIV const char *ols_channel_names[] = {
74 "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
75 "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
76 "24", "25", "26", "27", "28", "29", "30", "31",
77};
78
79/* Default supported samplerates, can be overridden by device metadata. */
80static const uint64_t samplerates[] = {
81 SR_HZ(10),
82 SR_MHZ(200),
83 SR_HZ(1),
84};
85
86#define RESPONSE_DELAY_US (20 * 1000)
87
88static GSList *scan(struct sr_dev_driver *di, GSList *options)
89{
90 struct sr_config *src;
91 struct sr_dev_inst *sdi;
92 struct sr_serial_dev_inst *serial;
93 GSList *l;
94 int ret;
95 unsigned int i;
96 const char *conn, *serialcomm;
97 char buf[8];
98
99 conn = serialcomm = NULL;
100 for (l = options; l; l = l->next) {
101 src = l->data;
102 switch (src->key) {
103 case SR_CONF_CONN:
104 conn = g_variant_get_string(src->data, NULL);
105 break;
106 case SR_CONF_SERIALCOMM:
107 serialcomm = g_variant_get_string(src->data, NULL);
108 break;
109 }
110 }
111 if (!conn)
112 return NULL;
113
114 if (!serialcomm)
115 serialcomm = SERIALCOMM;
116
117 serial = sr_serial_dev_inst_new(conn, serialcomm);
118
119 /* The discovery procedure is like this: first send the Reset
120 * command (0x00) 5 times, since the device could be anywhere
121 * in a 5-byte command. Then send the ID command (0x02).
122 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
123 * have a match.
124 */
125 sr_info("Probing %s.", conn);
126 if (serial_open(serial, SERIAL_RDWR) != SR_OK)
127 return NULL;
128
129 if (ols_send_reset(serial) != SR_OK) {
130 serial_close(serial);
131 sr_err("Could not use port %s. Quitting.", conn);
132 return NULL;
133 }
134 send_shortcommand(serial, CMD_ID);
135
136 g_usleep(RESPONSE_DELAY_US);
137
138 if (sp_input_waiting(serial->sp_data) == 0) {
139 sr_dbg("Didn't get any reply.");
140 return NULL;
141 }
142
143 ret = serial_read_blocking(serial, buf, 4, serial_timeout(serial, 4));
144 if (ret != 4) {
145 sr_err("Invalid reply (expected 4 bytes, got %d).", ret);
146 return NULL;
147 }
148
149 if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4)) {
150 sr_err("Invalid reply (expected '1SLO' or '1ALS', got "
151 "'%c%c%c%c').", buf[0], buf[1], buf[2], buf[3]);
152 return NULL;
153 }
154
155 /* Definitely using the OLS protocol, check if it supports
156 * the metadata command.
157 */
158 send_shortcommand(serial, CMD_METADATA);
159
160 g_usleep(RESPONSE_DELAY_US);
161
162 if (sp_input_waiting(serial->sp_data) != 0) {
163 /* Got metadata. */
164 sdi = get_metadata(serial);
165 } else {
166 /* Not an OLS -- some other board that uses the sump protocol. */
167 sr_info("Device does not support metadata.");
168 sdi = g_malloc0(sizeof(struct sr_dev_inst));
169 sdi->status = SR_ST_INACTIVE;
170 sdi->vendor = g_strdup("Sump");
171 sdi->model = g_strdup("Logic Analyzer");
172 sdi->version = g_strdup("v1.0");
173 for (i = 0; i < ARRAY_SIZE(ols_channel_names); i++)
174 sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE,
175 ols_channel_names[i]);
176 sdi->priv = ols_dev_new();
177 }
178 /* Configure samplerate and divider. */
179 if (ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
180 sr_dbg("Failed to set default samplerate (%"PRIu64").",
181 DEFAULT_SAMPLERATE);
182 sdi->inst_type = SR_INST_SERIAL;
183 sdi->conn = serial;
184
185 serial_close(serial);
186
187 return std_scan_complete(di, g_slist_append(NULL, sdi));
188}
189
190static int config_get(uint32_t key, GVariant **data,
191 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
192{
193 struct dev_context *devc;
194
195 (void)cg;
196
197 if (!sdi)
198 return SR_ERR_ARG;
199
200 devc = sdi->priv;
201
202 switch (key) {
203 case SR_CONF_SAMPLERATE:
204 *data = g_variant_new_uint64(devc->cur_samplerate);
205 break;
206 case SR_CONF_CAPTURE_RATIO:
207 *data = g_variant_new_uint64(devc->capture_ratio);
208 break;
209 case SR_CONF_LIMIT_SAMPLES:
210 *data = g_variant_new_uint64(devc->limit_samples);
211 break;
212 case SR_CONF_PATTERN_MODE:
213 if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
214 *data = g_variant_new_string(STR_PATTERN_EXTERNAL);
215 else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
216 *data = g_variant_new_string(STR_PATTERN_INTERNAL);
217 else
218 *data = g_variant_new_string(STR_PATTERN_NONE);
219 break;
220 case SR_CONF_RLE:
221 *data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
222 break;
223 default:
224 return SR_ERR_NA;
225 }
226
227 return SR_OK;
228}
229
230static int config_set(uint32_t key, GVariant *data,
231 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
232{
233 struct dev_context *devc;
234 uint16_t flag;
235 uint64_t tmp_u64;
236 const char *stropt;
237
238 (void)cg;
239
240 devc = sdi->priv;
241
242 switch (key) {
243 case SR_CONF_SAMPLERATE:
244 tmp_u64 = g_variant_get_uint64(data);
245 if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
246 return SR_ERR_SAMPLERATE;
247 return ols_set_samplerate(sdi, g_variant_get_uint64(data));
248 case SR_CONF_LIMIT_SAMPLES:
249 tmp_u64 = g_variant_get_uint64(data);
250 if (tmp_u64 < MIN_NUM_SAMPLES)
251 return SR_ERR;
252 devc->limit_samples = tmp_u64;
253 break;
254 case SR_CONF_CAPTURE_RATIO:
255 devc->capture_ratio = g_variant_get_uint64(data);
256 break;
257 case SR_CONF_EXTERNAL_CLOCK:
258 if (g_variant_get_boolean(data)) {
259 sr_info("Enabling external clock.");
260 devc->flag_reg |= FLAG_CLOCK_EXTERNAL;
261 } else {
262 sr_info("Disabled external clock.");
263 devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
264 }
265 break;
266 case SR_CONF_PATTERN_MODE:
267 stropt = g_variant_get_string(data, NULL);
268 if (!strcmp(stropt, STR_PATTERN_NONE)) {
269 sr_info("Disabling test modes.");
270 flag = 0x0000;
271 } else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
272 sr_info("Enabling internal test mode.");
273 flag = FLAG_INTERNAL_TEST_MODE;
274 } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
275 sr_info("Enabling external test mode.");
276 flag = FLAG_EXTERNAL_TEST_MODE;
277 } else {
278 return SR_ERR;
279 }
280 devc->flag_reg &= ~FLAG_INTERNAL_TEST_MODE;
281 devc->flag_reg &= ~FLAG_EXTERNAL_TEST_MODE;
282 devc->flag_reg |= flag;
283 break;
284 case SR_CONF_SWAP:
285 if (g_variant_get_boolean(data)) {
286 sr_info("Enabling channel swapping.");
287 devc->flag_reg |= FLAG_SWAP_CHANNELS;
288 } else {
289 sr_info("Disabling channel swapping.");
290 devc->flag_reg &= ~FLAG_SWAP_CHANNELS;
291 }
292 break;
293 case SR_CONF_RLE:
294 if (g_variant_get_boolean(data)) {
295 sr_info("Enabling RLE.");
296 devc->flag_reg |= FLAG_RLE;
297 } else {
298 sr_info("Disabling RLE.");
299 devc->flag_reg &= ~FLAG_RLE;
300 }
301 break;
302 default:
303 return SR_ERR_NA;
304 }
305
306 return SR_OK;
307}
308
309static int config_list(uint32_t key, GVariant **data,
310 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
311{
312 struct dev_context *devc;
313 int num_ols_changrp, i;
314
315 switch (key) {
316 case SR_CONF_SCAN_OPTIONS:
317 case SR_CONF_DEVICE_OPTIONS:
318 return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
319 case SR_CONF_SAMPLERATE:
320 *data = std_gvar_samplerates_steps(ARRAY_AND_SIZE(samplerates));
321 break;
322 case SR_CONF_TRIGGER_MATCH:
323 *data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches));
324 break;
325 case SR_CONF_PATTERN_MODE:
326 *data = g_variant_new_strv(ARRAY_AND_SIZE(patterns));
327 break;
328 case SR_CONF_LIMIT_SAMPLES:
329 if (!sdi)
330 return SR_ERR_ARG;
331 devc = sdi->priv;
332 if (devc->flag_reg & FLAG_RLE)
333 return SR_ERR_NA;
334 if (devc->max_samples == 0)
335 /* Device didn't specify sample memory size in metadata. */
336 return SR_ERR_NA;
337 /*
338 * Channel groups are turned off if no channels in that group are
339 * enabled, making more room for samples for the enabled group.
340 */
341 ols_channel_mask(sdi);
342 num_ols_changrp = 0;
343 for (i = 0; i < 4; i++) {
344 if (devc->channel_mask & (0xff << (i * 8)))
345 num_ols_changrp++;
346 }
347
348 *data = std_gvar_tuple_u64(MIN_NUM_SAMPLES,
349 (num_ols_changrp) ? devc->max_samples / num_ols_changrp : MIN_NUM_SAMPLES);
350 break;
351 default:
352 return SR_ERR_NA;
353 }
354
355 return SR_OK;
356}
357
358static int set_trigger(const struct sr_dev_inst *sdi, int stage)
359{
360 struct dev_context *devc;
361 struct sr_serial_dev_inst *serial;
362 uint8_t cmd, arg[4];
363
364 devc = sdi->priv;
365 serial = sdi->conn;
366
367 cmd = CMD_SET_TRIGGER_MASK + stage * 4;
368 arg[0] = devc->trigger_mask[stage] & 0xff;
369 arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
370 arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
371 arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
372 if (send_longcommand(serial, cmd, arg) != SR_OK)
373 return SR_ERR;
374
375 cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
376 arg[0] = devc->trigger_value[stage] & 0xff;
377 arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
378 arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
379 arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
380 if (send_longcommand(serial, cmd, arg) != SR_OK)
381 return SR_ERR;
382
383 cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
384 arg[0] = arg[1] = arg[3] = 0x00;
385 arg[2] = stage;
386 if (stage == devc->num_stages)
387 /* Last stage, fire when this one matches. */
388 arg[3] |= TRIGGER_START;
389 if (send_longcommand(serial, cmd, arg) != SR_OK)
390 return SR_ERR;
391
392 return SR_OK;
393}
394
395static int dev_acquisition_start(const struct sr_dev_inst *sdi)
396{
397 struct dev_context *devc;
398 struct sr_serial_dev_inst *serial;
399 uint32_t samplecount, readcount, delaycount;
400 uint8_t ols_changrp_mask, arg[4];
401 int num_ols_changrp;
402 int ret, i;
403
404 devc = sdi->priv;
405 serial = sdi->conn;
406
407 ols_channel_mask(sdi);
408
409 num_ols_changrp = 0;
410 ols_changrp_mask = 0;
411 for (i = 0; i < 4; i++) {
412 if (devc->channel_mask & (0xff << (i * 8))) {
413 ols_changrp_mask |= (1 << i);
414 num_ols_changrp++;
415 }
416 }
417
418 /*
419 * Limit readcount to prevent reading past the end of the hardware
420 * buffer. Rather read too many samples than too few.
421 */
422 samplecount = MIN(devc->max_samples / num_ols_changrp, devc->limit_samples);
423 readcount = (samplecount + 3) / 4;
424
425 /* Basic triggers. */
426 if (ols_convert_trigger(sdi) != SR_OK) {
427 sr_err("Failed to configure channels.");
428 return SR_ERR;
429 }
430 if (devc->num_stages > 0) {
431 /*
432 * According to http://mygizmos.org/ols/Logic-Sniffer-FPGA-Spec.pdf
433 * reset command must be send prior each arm command
434 */
435 sr_dbg("Send reset command before trigger configure");
436 if (ols_send_reset(serial) != SR_OK)
437 return SR_ERR;
438
439 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
440 devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
441 for (i = 0; i <= devc->num_stages; i++) {
442 sr_dbg("Setting OLS stage %d trigger.", i);
443 if ((ret = set_trigger(sdi, i)) != SR_OK)
444 return ret;
445 }
446 } else {
447 /* No triggers configured, force trigger on first stage. */
448 sr_dbg("Forcing trigger at stage 0.");
449 if ((ret = set_trigger(sdi, 0)) != SR_OK)
450 return ret;
451 delaycount = readcount;
452 }
453
454 /* Samplerate. */
455 sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
456 devc->cur_samplerate, devc->cur_samplerate_divider);
457 arg[0] = devc->cur_samplerate_divider & 0xff;
458 arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
459 arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
460 arg[3] = 0x00;
461 if (send_longcommand(serial, CMD_SET_DIVIDER, arg) != SR_OK)
462 return SR_ERR;
463
464 /* Send sample limit and pre/post-trigger capture ratio. */
465 sr_dbg("Setting sample limit %d, trigger point at %d",
466 (readcount - 1) * 4, (delaycount - 1) * 4);
467
468 if (devc->max_samples > 256 * 1024) {
469 arg[0] = ((readcount - 1) & 0xff);
470 arg[1] = ((readcount - 1) & 0xff00) >> 8;
471 arg[2] = ((readcount - 1) & 0xff0000) >> 16;
472 arg[3] = ((readcount - 1) & 0xff000000) >> 24;
473 if (send_longcommand(serial, CMD_CAPTURE_READCOUNT, arg) != SR_OK)
474 return SR_ERR;
475 arg[0] = ((delaycount - 1) & 0xff);
476 arg[1] = ((delaycount - 1) & 0xff00) >> 8;
477 arg[2] = ((delaycount - 1) & 0xff0000) >> 16;
478 arg[3] = ((delaycount - 1) & 0xff000000) >> 24;
479 if (send_longcommand(serial, CMD_CAPTURE_DELAYCOUNT, arg) != SR_OK)
480 return SR_ERR;
481 } else {
482 arg[0] = ((readcount - 1) & 0xff);
483 arg[1] = ((readcount - 1) & 0xff00) >> 8;
484 arg[2] = ((delaycount - 1) & 0xff);
485 arg[3] = ((delaycount - 1) & 0xff00) >> 8;
486 if (send_longcommand(serial, CMD_CAPTURE_SIZE, arg) != SR_OK)
487 return SR_ERR;
488 }
489
490 /* Flag register. */
491 sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
492 devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
493 devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
494 devc->flag_reg & FLAG_RLE ? "on" : "off",
495 devc->flag_reg & FLAG_FILTER ? "on": "off",
496 devc->flag_reg & FLAG_DEMUX ? "on" : "off");
497 /*
498 * Enable/disable OLS channel groups in the flag register according
499 * to the channel mask. 1 means "disable channel".
500 */
501 devc->flag_reg |= ~(ols_changrp_mask << 2) & 0x3c;
502 arg[0] = devc->flag_reg & 0xff;
503 arg[1] = devc->flag_reg >> 8;
504 arg[2] = arg[3] = 0x00;
505 if (send_longcommand(serial, CMD_SET_FLAGS, arg) != SR_OK)
506 return SR_ERR;
507
508 /* Start acquisition on the device. */
509 if (send_shortcommand(serial, CMD_RUN) != SR_OK)
510 return SR_ERR;
511
512 /* Reset all operational states. */
513 devc->rle_count = devc->num_transfers = 0;
514 devc->num_samples = devc->num_bytes = 0;
515 devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
516 memset(devc->sample, 0, 4);
517
518 std_session_send_df_header(sdi);
519
520 /* If the device stops sending for longer than it takes to send a byte,
521 * that means it's finished. But wait at least 100 ms to be safe.
522 */
523 serial_source_add(sdi->session, serial, G_IO_IN, 100,
524 ols_receive_data, (struct sr_dev_inst *)sdi);
525
526 return SR_OK;
527}
528
529static int dev_acquisition_stop(struct sr_dev_inst *sdi)
530{
531 abort_acquisition(sdi);
532
533 return SR_OK;
534}
535
536static struct sr_dev_driver ols_driver_info = {
537 .name = "ols",
538 .longname = "Openbench Logic Sniffer & SUMP compatibles",
539 .api_version = 1,
540 .init = std_init,
541 .cleanup = std_cleanup,
542 .scan = scan,
543 .dev_list = std_dev_list,
544 .dev_clear = std_dev_clear,
545 .config_get = config_get,
546 .config_set = config_set,
547 .config_list = config_list,
548 .dev_open = std_serial_dev_open,
549 .dev_close = std_serial_dev_close,
550 .dev_acquisition_start = dev_acquisition_start,
551 .dev_acquisition_stop = dev_acquisition_stop,
552 .context = NULL,
553};
554SR_REGISTER_DEV_DRIVER(ols_driver_info);