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hameg-hmo: Add missing cases in config_get().
[libsigrok.git] / hardware / rigol-ds / api.c
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <fcntl.h>
23#include <unistd.h>
24#include <stdlib.h>
25#include <string.h>
26#include <math.h>
27#include <glib.h>
28#include "libsigrok.h"
29#include "libsigrok-internal.h"
30#include "protocol.h"
31
32static const int32_t hwopts[] = {
33 SR_CONF_CONN,
34 SR_CONF_SERIALCOMM
35};
36
37static const int32_t hwcaps[] = {
38 SR_CONF_OSCILLOSCOPE,
39 SR_CONF_TIMEBASE,
40 SR_CONF_TRIGGER_SOURCE,
41 SR_CONF_TRIGGER_SLOPE,
42 SR_CONF_HORIZ_TRIGGERPOS,
43 SR_CONF_NUM_TIMEBASE,
44 SR_CONF_LIMIT_FRAMES,
45 SR_CONF_SAMPLERATE,
46};
47
48static const int32_t analog_hwcaps[] = {
49 SR_CONF_NUM_VDIV,
50 SR_CONF_VDIV,
51 SR_CONF_COUPLING,
52 SR_CONF_DATA_SOURCE,
53};
54
55static const uint64_t timebases[][2] = {
56 /* nanoseconds */
57 { 1, 1000000000 },
58 { 2, 1000000000 },
59 { 5, 1000000000 },
60 { 10, 1000000000 },
61 { 20, 1000000000 },
62 { 50, 1000000000 },
63 { 100, 1000000000 },
64 { 500, 1000000000 },
65 /* microseconds */
66 { 1, 1000000 },
67 { 2, 1000000 },
68 { 5, 1000000 },
69 { 10, 1000000 },
70 { 20, 1000000 },
71 { 50, 1000000 },
72 { 100, 1000000 },
73 { 200, 1000000 },
74 { 500, 1000000 },
75 /* milliseconds */
76 { 1, 1000 },
77 { 2, 1000 },
78 { 5, 1000 },
79 { 10, 1000 },
80 { 20, 1000 },
81 { 50, 1000 },
82 { 100, 1000 },
83 { 200, 1000 },
84 { 500, 1000 },
85 /* seconds */
86 { 1, 1 },
87 { 2, 1 },
88 { 5, 1 },
89 { 10, 1 },
90 { 20, 1 },
91 { 50, 1 },
92 { 100, 1 },
93 { 200, 1 },
94 { 500, 1 },
95 { 1000, 1 },
96};
97
98static const uint64_t vdivs[][2] = {
99 /* microvolts */
100 { 500, 1000000 },
101 /* millivolts */
102 { 1, 1000 },
103 { 2, 1000 },
104 { 5, 1000 },
105 { 10, 1000 },
106 { 20, 1000 },
107 { 50, 1000 },
108 { 100, 1000 },
109 { 200, 1000 },
110 { 500, 1000 },
111 /* volts */
112 { 1, 1 },
113 { 2, 1 },
114 { 5, 1 },
115 { 10, 1 },
116};
117
118#define NUM_TIMEBASE ARRAY_SIZE(timebases)
119#define NUM_VDIV ARRAY_SIZE(vdivs)
120
121static const char *trigger_sources[] = {
122 "CH1",
123 "CH2",
124 "CH3",
125 "CH4",
126 "EXT",
127 "AC Line",
128 "D0",
129 "D1",
130 "D2",
131 "D3",
132 "D4",
133 "D5",
134 "D6",
135 "D7",
136 "D8",
137 "D9",
138 "D10",
139 "D11",
140 "D12",
141 "D13",
142 "D14",
143 "D15",
144};
145
146static const char *coupling[] = {
147 "AC",
148 "DC",
149 "GND",
150};
151
152/* Do not change the order of entries */
153static const char *data_sources[] = {
154 "Live",
155 "Memory",
156 "Segmented",
157};
158
159enum vendor {
160 RIGOL,
161 AGILENT,
162};
163
164enum series {
165 VS5000,
166 DS1000,
167 DS2000,
168 DS2000A,
169 DSO1000,
170};
171
172/* short name, full name */
173static const struct rigol_ds_vendor supported_vendors[] = {
174 [RIGOL] = {"Rigol", "Rigol Technologies"},
175 [AGILENT] = {"Agilent", "Rigol Technologies"},
176};
177
178#define VENDOR(x) &supported_vendors[x]
179/* vendor, series, protocol, max timebase, min vdiv, number of horizontal divs,
180 * live waveform samples, memory buffer samples */
181static const struct rigol_ds_series supported_series[] = {
182 [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
183 {50, 1}, {2, 1000}, 14, 2048, 0},
184 [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
185 {50, 1}, {2, 1000}, 12, 600, 1048576},
186 [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
187 {500, 1}, {2, 1000}, 14, 1400, 14000},
188 [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
189 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
190 [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
191 {50, 1}, {2, 1000}, 12, 600, 20480},
192};
193
194#define SERIES(x) &supported_series[x]
195/* series, model, min timebase, analog channels, digital */
196static const struct rigol_ds_model supported_models[] = {
197 {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false},
198 {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false},
199 {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false},
200 {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false},
201 {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false},
202 {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true},
203 {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true},
204 {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true},
205 {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true},
206 {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true},
207 {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false},
208 {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false},
209 {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false},
210 {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true},
211 {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true},
212 {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true},
213 {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false},
214 {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false},
215 {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false},
216 {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false},
217 {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false},
218 {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false},
219 {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false},
220 {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false},
221 {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false},
222 {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false},
223 {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false},
224 {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false},
225 {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false},
226 {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false},
227};
228
229SR_PRIV struct sr_dev_driver rigol_ds_driver_info;
230static struct sr_dev_driver *di = &rigol_ds_driver_info;
231
232static void clear_helper(void *priv)
233{
234 struct dev_context *devc;
235
236 devc = priv;
237 g_free(devc->data);
238 g_free(devc->buffer);
239 g_free(devc->coupling[0]);
240 g_free(devc->coupling[1]);
241 g_free(devc->trigger_source);
242 g_free(devc->trigger_slope);
243 g_slist_free(devc->analog_groups[0].probes);
244 g_slist_free(devc->analog_groups[1].probes);
245 g_slist_free(devc->digital_group.probes);
246}
247
248static int dev_clear(void)
249{
250 return std_dev_clear(di, clear_helper);
251}
252
253static int init(struct sr_context *sr_ctx)
254{
255 return std_init(sr_ctx, di, LOG_PREFIX);
256}
257
258static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
259{
260 struct dev_context *devc;
261 struct sr_dev_inst *sdi;
262 struct sr_scpi_hw_info *hw_info;
263 struct sr_probe *probe;
264 long n[3];
265 unsigned int i;
266 const struct rigol_ds_model *model = NULL;
267 gchar *channel_name, **version;
268
269 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
270 sr_info("Couldn't get IDN response.");
271 sr_scpi_close(scpi);
272 sr_scpi_free(scpi);
273 return NULL;
274 }
275
276 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
277 if (!strcasecmp(hw_info->manufacturer,
278 supported_models[i].series->vendor->full_name) &&
279 !strcmp(hw_info->model, supported_models[i].name)) {
280 model = &supported_models[i];
281 break;
282 }
283 }
284
285 if (!model || !(sdi = sr_dev_inst_new(0, SR_ST_ACTIVE,
286 model->series->vendor->name,
287 model->name,
288 hw_info->firmware_version))) {
289 sr_scpi_hw_info_free(hw_info);
290 sr_scpi_close(scpi);
291 sr_scpi_free(scpi);
292 return NULL;
293 }
294
295 sr_scpi_close(scpi);
296
297 sdi->conn = scpi;
298
299 sdi->driver = di;
300 sdi->inst_type = SR_INST_SCPI;
301
302 if (!(devc = g_try_malloc0(sizeof(struct dev_context))))
303 return NULL;
304
305 devc->limit_frames = 0;
306 devc->model = model;
307 devc->format = model->series->format;
308
309 /* DS1000 models with firmware before 0.2.4 used the old data format. */
310 if (model->series == SERIES(DS1000)) {
311 version = g_strsplit(hw_info->firmware_version, ".", 0);
312 do {
313 if (!version[0] || !version[1] || !version[2])
314 break;
315 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
316 break;
317 for (i = 0; i < 3; i++) {
318 if (sr_atol(version[i], &n[i]) != SR_OK)
319 break;
320 }
321 if (i != 3)
322 break;
323 if (n[0] != 0 || n[1] > 2)
324 break;
325 if (n[1] == 2 && n[2] > 3)
326 break;
327 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
328 devc->format = FORMAT_RAW;
329 } while(0);
330 g_strfreev(version);
331 }
332
333 sr_scpi_hw_info_free(hw_info);
334
335 for (i = 0; i < model->analog_channels; i++) {
336 if (!(channel_name = g_strdup_printf("CH%d", i + 1)))
337 return NULL;
338 probe = sr_probe_new(i, SR_PROBE_ANALOG, TRUE, channel_name);
339 sdi->probes = g_slist_append(sdi->probes, probe);
340 devc->analog_groups[i].name = channel_name;
341 devc->analog_groups[i].probes = g_slist_append(NULL, probe);
342 sdi->probe_groups = g_slist_append(sdi->probe_groups,
343 &devc->analog_groups[i]);
344 }
345
346 if (devc->model->has_digital) {
347 for (i = 0; i < 16; i++) {
348 if (!(channel_name = g_strdup_printf("D%d", i)))
349 return NULL;
350 probe = sr_probe_new(i, SR_PROBE_LOGIC, TRUE, channel_name);
351 g_free(channel_name);
352 if (!probe)
353 return NULL;
354 sdi->probes = g_slist_append(sdi->probes, probe);
355 devc->digital_group.probes = g_slist_append(
356 devc->digital_group.probes, probe);
357 }
358 devc->digital_group.name = "LA";
359 sdi->probe_groups = g_slist_append(sdi->probe_groups,
360 &devc->digital_group);
361 }
362
363 for (i = 0; i < NUM_TIMEBASE; i++) {
364 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
365 devc->timebases = &timebases[i];
366 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
367 devc->num_timebases = &timebases[i] - devc->timebases + 1;
368 }
369
370 for (i = 0; i < NUM_VDIV; i++)
371 if (!memcmp(&devc->model->series->min_vdiv, &vdivs[i], sizeof(uint64_t[2])))
372 devc->vdivs = &vdivs[i];
373
374 if (!(devc->buffer = g_try_malloc(ACQ_BUFFER_SIZE)))
375 return NULL;
376 if (!(devc->data = g_try_malloc(ACQ_BUFFER_SIZE * sizeof(float))))
377 return NULL;
378
379 devc->data_source = DATA_SOURCE_LIVE;
380
381 sdi->priv = devc;
382
383 return sdi;
384}
385
386static GSList *scan(GSList *options)
387{
388 return sr_scpi_scan(di->priv, options, probe_device);
389}
390
391static GSList *dev_list(void)
392{
393 return ((struct drv_context *)(di->priv))->instances;
394}
395
396static int dev_open(struct sr_dev_inst *sdi)
397{
398 struct sr_scpi_dev_inst *scpi = sdi->conn;
399
400 if (sr_scpi_open(scpi) < 0)
401 return SR_ERR;
402
403 if (rigol_ds_get_dev_cfg(sdi) != SR_OK)
404 return SR_ERR;
405
406 sdi->status = SR_ST_ACTIVE;
407
408 return SR_OK;
409}
410
411static int dev_close(struct sr_dev_inst *sdi)
412{
413 struct sr_scpi_dev_inst *scpi;
414 struct dev_context *devc;
415
416 if (sdi->status != SR_ST_ACTIVE)
417 return SR_ERR_DEV_CLOSED;
418
419 scpi = sdi->conn;
420 devc = sdi->priv;
421
422 if (devc->model->series->protocol == PROTOCOL_V2)
423 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
424
425 if (scpi) {
426 if (sr_scpi_close(scpi) < 0)
427 return SR_ERR;
428 sdi->status = SR_ST_INACTIVE;
429 }
430
431 return SR_OK;
432}
433
434static int cleanup(void)
435{
436 return dev_clear();
437}
438
439static int analog_frame_size(const struct sr_dev_inst *sdi)
440{
441 struct dev_context *devc = sdi->priv;
442 struct sr_probe *probe;
443 int analog_probes = 0;
444 GSList *l;
445
446 for (l = sdi->probes; l; l = l->next) {
447 probe = l->data;
448 if (probe->type == SR_PROBE_ANALOG && probe->enabled)
449 analog_probes++;
450 }
451
452 if (analog_probes == 0)
453 return 0;
454
455 switch (devc->data_source) {
456 case DATA_SOURCE_LIVE:
457 return devc->model->series->live_samples;
458 case DATA_SOURCE_MEMORY:
459 return devc->model->series->buffer_samples / analog_probes;
460 default:
461 return 0;
462 }
463}
464
465static int digital_frame_size(const struct sr_dev_inst *sdi)
466{
467 struct dev_context *devc = sdi->priv;
468
469 switch (devc->data_source) {
470 case DATA_SOURCE_LIVE:
471 return devc->model->series->live_samples * 2;
472 case DATA_SOURCE_MEMORY:
473 return devc->model->series->buffer_samples * 2;
474 default:
475 return 0;
476 }
477}
478
479static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
480 const struct sr_probe_group *probe_group)
481{
482 struct dev_context *devc;
483 struct sr_probe *probe;
484 const char *tmp_str;
485 uint64_t samplerate;
486 int analog_channel = -1;
487 float smallest_diff = 0.0000000001;
488 int idx = -1;
489 unsigned i;
490
491 if (!sdi || !(devc = sdi->priv))
492 return SR_ERR_ARG;
493
494 /* If a probe group is specified, it must be a valid one. */
495 if (probe_group && !g_slist_find(sdi->probe_groups, probe_group)) {
496 sr_err("Invalid probe group specified.");
497 return SR_ERR;
498 }
499
500 if (probe_group) {
501 probe = g_slist_nth_data(probe_group->probes, 0);
502 if (!probe)
503 return SR_ERR;
504 if (probe->type == SR_PROBE_ANALOG) {
505 if (probe->name[2] < '1' || probe->name[2] > '4')
506 return SR_ERR;
507 analog_channel = probe->name[2] - '1';
508 }
509 }
510
511 switch (id) {
512 case SR_CONF_NUM_TIMEBASE:
513 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
514 break;
515 case SR_CONF_NUM_VDIV:
516 *data = g_variant_new_int32(NUM_VDIV);
517 case SR_CONF_DATA_SOURCE:
518 if (devc->data_source == DATA_SOURCE_LIVE)
519 *data = g_variant_new_string("Live");
520 else if (devc->data_source == DATA_SOURCE_MEMORY)
521 *data = g_variant_new_string("Memory");
522 else
523 *data = g_variant_new_string("Segmented");
524 break;
525 case SR_CONF_SAMPLERATE:
526 if (devc->data_source == DATA_SOURCE_LIVE) {
527 samplerate = analog_frame_size(sdi) /
528 (devc->timebase * devc->model->series->num_horizontal_divs);
529 *data = g_variant_new_uint64(samplerate);
530 } else {
531 return SR_ERR_NA;
532 }
533 break;
534 case SR_CONF_TRIGGER_SOURCE:
535 if (!strcmp(devc->trigger_source, "ACL"))
536 tmp_str = "AC Line";
537 else if (!strcmp(devc->trigger_source, "CHAN1"))
538 tmp_str = "CH1";
539 else if (!strcmp(devc->trigger_source, "CHAN2"))
540 tmp_str = "CH2";
541 else if (!strcmp(devc->trigger_source, "CHAN3"))
542 tmp_str = "CH3";
543 else if (!strcmp(devc->trigger_source, "CHAN4"))
544 tmp_str = "CH4";
545 else
546 tmp_str = devc->trigger_source;
547 *data = g_variant_new_string(tmp_str);
548 break;
549 case SR_CONF_TIMEBASE:
550 for (i = 0; i < devc->num_timebases; i++) {
551 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
552 float diff = fabs(devc->timebase - tb);
553 if (diff < smallest_diff) {
554 smallest_diff = diff;
555 idx = i;
556 }
557 }
558 if (idx < 0)
559 return SR_ERR_NA;
560 *data = g_variant_new("(tt)", devc->timebases[idx][0],
561 devc->timebases[idx][1]);
562 break;
563 case SR_CONF_VDIV:
564 if (analog_channel < 0)
565 return SR_ERR_NA;
566 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
567 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
568 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
569 if (diff < smallest_diff) {
570 smallest_diff = diff;
571 idx = i;
572 }
573 }
574 if (idx < 0)
575 return SR_ERR_NA;
576 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
577 break;
578 case SR_CONF_COUPLING:
579 if (analog_channel < 0)
580 return SR_ERR_NA;
581 *data = g_variant_new_string(devc->coupling[analog_channel]);
582 break;
583 default:
584 return SR_ERR_NA;
585 }
586
587 return SR_OK;
588}
589
590static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi,
591 const struct sr_probe_group *probe_group)
592{
593 struct dev_context *devc;
594 uint64_t p, q;
595 double t_dbl;
596 unsigned int i, j;
597 int ret;
598 const char *tmp_str;
599 char buffer[16];
600
601 if (!(devc = sdi->priv))
602 return SR_ERR_ARG;
603
604 if (sdi->status != SR_ST_ACTIVE)
605 return SR_ERR_DEV_CLOSED;
606
607 /* If a probe group is specified, it must be a valid one. */
608 if (probe_group && !g_slist_find(sdi->probe_groups, probe_group)) {
609 sr_err("Invalid probe group specified.");
610 return SR_ERR;
611 }
612
613 ret = SR_OK;
614 switch (id) {
615 case SR_CONF_LIMIT_FRAMES:
616 devc->limit_frames = g_variant_get_uint64(data);
617 break;
618 case SR_CONF_TRIGGER_SLOPE:
619 tmp_str = g_variant_get_string(data, NULL);
620
621 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r'))
622 return SR_ERR_ARG;
623
624 g_free(devc->trigger_slope);
625 devc->trigger_slope = g_strdup((tmp_str[0] == 'r') ? "POS" : "NEG");
626 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
627 break;
628 case SR_CONF_HORIZ_TRIGGERPOS:
629 t_dbl = g_variant_get_double(data);
630 if (t_dbl < 0.0 || t_dbl > 1.0)
631 return SR_ERR;
632 devc->horiz_triggerpos = t_dbl;
633 /* We have the trigger offset as a percentage of the frame, but
634 * need to express this in seconds. */
635 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
636 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
637 ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
638 break;
639 case SR_CONF_TIMEBASE:
640 g_variant_get(data, "(tt)", &p, &q);
641 for (i = 0; i < devc->num_timebases; i++) {
642 if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
643 devc->timebase = (float)p / q;
644 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
645 devc->timebase);
646 ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
647 break;
648 }
649 }
650 if (i == devc->num_timebases)
651 ret = SR_ERR_ARG;
652 break;
653 case SR_CONF_TRIGGER_SOURCE:
654 tmp_str = g_variant_get_string(data, NULL);
655 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
656 if (!strcmp(trigger_sources[i], tmp_str)) {
657 g_free(devc->trigger_source);
658 devc->trigger_source = g_strdup(trigger_sources[i]);
659 if (!strcmp(devc->trigger_source, "AC Line"))
660 tmp_str = "ACL";
661 else if (!strcmp(devc->trigger_source, "CH1"))
662 tmp_str = "CHAN1";
663 else if (!strcmp(devc->trigger_source, "CH2"))
664 tmp_str = "CHAN2";
665 else if (!strcmp(devc->trigger_source, "CH3"))
666 tmp_str = "CHAN3";
667 else if (!strcmp(devc->trigger_source, "CH4"))
668 tmp_str = "CHAN4";
669 else
670 tmp_str = (char *)devc->trigger_source;
671 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
672 break;
673 }
674 }
675 if (i == ARRAY_SIZE(trigger_sources))
676 ret = SR_ERR_ARG;
677 break;
678 case SR_CONF_VDIV:
679 if (!probe_group) {
680 sr_err("No probe group specified.");
681 return SR_ERR_PROBE_GROUP;
682 }
683 g_variant_get(data, "(tt)", &p, &q);
684 for (i = 0; i < 2; i++) {
685 if (probe_group == &devc->analog_groups[i]) {
686 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
687 if (vdivs[j][0] != p || vdivs[j][1] != q)
688 continue;
689 devc->vdiv[i] = (float)p / q;
690 g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
691 devc->vdiv[i]);
692 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1,
693 buffer);
694 }
695 return SR_ERR_ARG;
696 }
697 }
698 return SR_ERR_NA;
699 case SR_CONF_COUPLING:
700 if (!probe_group) {
701 sr_err("No probe group specified.");
702 return SR_ERR_PROBE_GROUP;
703 }
704 tmp_str = g_variant_get_string(data, NULL);
705 for (i = 0; i < 2; i++) {
706 if (probe_group == &devc->analog_groups[i]) {
707 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
708 if (!strcmp(tmp_str, coupling[j])) {
709 g_free(devc->coupling[i]);
710 devc->coupling[i] = g_strdup(coupling[j]);
711 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1,
712 devc->coupling[i]);
713 }
714 }
715 return SR_ERR_ARG;
716 }
717 }
718 return SR_ERR_NA;
719 case SR_CONF_DATA_SOURCE:
720 tmp_str = g_variant_get_string(data, NULL);
721 if (!strcmp(tmp_str, "Live"))
722 devc->data_source = DATA_SOURCE_LIVE;
723 else if (devc->model->series->protocol >= PROTOCOL_V2
724 && !strcmp(tmp_str, "Memory"))
725 devc->data_source = DATA_SOURCE_MEMORY;
726 else if (devc->model->series->protocol >= PROTOCOL_V3
727 && !strcmp(tmp_str, "Segmented"))
728 devc->data_source = DATA_SOURCE_SEGMENTED;
729 else
730 return SR_ERR;
731 break;
732 default:
733 ret = SR_ERR_NA;
734 break;
735 }
736
737 return ret;
738}
739
740static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
741 const struct sr_probe_group *probe_group)
742{
743 GVariant *tuple, *rational[2];
744 GVariantBuilder gvb;
745 unsigned int i;
746 struct dev_context *devc = NULL;
747
748 if (sdi)
749 devc = sdi->priv;
750
751 if (key == SR_CONF_SCAN_OPTIONS) {
752 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
753 hwopts, ARRAY_SIZE(hwopts), sizeof(int32_t));
754 return SR_OK;
755 } else if (key == SR_CONF_DEVICE_OPTIONS && probe_group == NULL) {
756 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
757 hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
758 return SR_OK;
759 }
760
761 /* Every other option requires a valid device instance. */
762 if (!sdi || !(devc = sdi->priv))
763 return SR_ERR_ARG;
764
765 /* If a probe group is specified, it must be a valid one. */
766 if (probe_group) {
767 if (probe_group != &devc->analog_groups[0]
768 && probe_group != &devc->analog_groups[1]) {
769 sr_err("Invalid probe group specified.");
770 return SR_ERR;
771 }
772 }
773
774 switch (key) {
775 case SR_CONF_DEVICE_OPTIONS:
776 if (!probe_group) {
777 sr_err("No probe group specified.");
778 return SR_ERR_PROBE_GROUP;
779 }
780 if (probe_group == &devc->digital_group) {
781 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
782 NULL, 0, sizeof(int32_t));
783 return SR_OK;
784 } else {
785 for (i = 0; i < 2; i++) {
786 if (probe_group == &devc->analog_groups[i]) {
787 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
788 analog_hwcaps, ARRAY_SIZE(analog_hwcaps), sizeof(int32_t));
789 return SR_OK;
790 }
791 }
792 return SR_ERR_NA;
793 }
794 break;
795 case SR_CONF_COUPLING:
796 if (!probe_group) {
797 sr_err("No probe group specified.");
798 return SR_ERR_PROBE_GROUP;
799 }
800 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
801 break;
802 case SR_CONF_VDIV:
803 if (!devc)
804 /* Can't know this until we have the exact model. */
805 return SR_ERR_ARG;
806 if (!probe_group) {
807 sr_err("No probe group specified.");
808 return SR_ERR_PROBE_GROUP;
809 }
810 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
811 for (i = 0; i < NUM_VDIV; i++) {
812 rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
813 rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
814 tuple = g_variant_new_tuple(rational, 2);
815 g_variant_builder_add_value(&gvb, tuple);
816 }
817 *data = g_variant_builder_end(&gvb);
818 break;
819 case SR_CONF_TIMEBASE:
820 if (!devc)
821 /* Can't know this until we have the exact model. */
822 return SR_ERR_ARG;
823 if (devc->num_timebases <= 0)
824 return SR_ERR_NA;
825 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
826 for (i = 0; i < devc->num_timebases; i++) {
827 rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
828 rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
829 tuple = g_variant_new_tuple(rational, 2);
830 g_variant_builder_add_value(&gvb, tuple);
831 }
832 *data = g_variant_builder_end(&gvb);
833 break;
834 case SR_CONF_TRIGGER_SOURCE:
835 if (!devc)
836 /* Can't know this until we have the exact model. */
837 return SR_ERR_ARG;
838 *data = g_variant_new_strv(trigger_sources,
839 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
840 break;
841 case SR_CONF_DATA_SOURCE:
842 if (!devc)
843 /* Can't know this until we have the exact model. */
844 return SR_ERR_ARG;
845 switch (devc->model->series->protocol) {
846 case PROTOCOL_V1:
847 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
848 break;
849 case PROTOCOL_V2:
850 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
851 break;
852 default:
853 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
854 break;
855 }
856 break;
857 default:
858 return SR_ERR_NA;
859 }
860
861 return SR_OK;
862}
863
864static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
865{
866 struct sr_scpi_dev_inst *scpi;
867 struct dev_context *devc;
868 struct sr_probe *probe;
869 struct sr_datafeed_packet packet;
870 GSList *l;
871
872 if (sdi->status != SR_ST_ACTIVE)
873 return SR_ERR_DEV_CLOSED;
874
875 scpi = sdi->conn;
876 devc = sdi->priv;
877
878 devc->num_frames = 0;
879
880 for (l = sdi->probes; l; l = l->next) {
881 probe = l->data;
882 sr_dbg("handling probe %s", probe->name);
883 if (probe->type == SR_PROBE_ANALOG) {
884 if (probe->enabled)
885 devc->enabled_analog_probes = g_slist_append(
886 devc->enabled_analog_probes, probe);
887 if (probe->enabled != devc->analog_channels[probe->index]) {
888 /* Enabled channel is currently disabled, or vice versa. */
889 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", probe->index + 1,
890 probe->enabled ? "ON" : "OFF") != SR_OK)
891 return SR_ERR;
892 devc->analog_channels[probe->index] = probe->enabled;
893 }
894 } else if (probe->type == SR_PROBE_LOGIC) {
895 if (probe->enabled) {
896 devc->enabled_digital_probes = g_slist_append(
897 devc->enabled_digital_probes, probe);
898 /* Turn on LA module if currently off. */
899 if (!devc->la_enabled) {
900 if (rigol_ds_config_set(sdi, ":LA:DISP ON") != SR_OK)
901 return SR_ERR;
902 devc->la_enabled = TRUE;
903 }
904 }
905 if (probe->enabled != devc->digital_channels[probe->index]) {
906 /* Enabled channel is currently disabled, or vice versa. */
907 if (rigol_ds_config_set(sdi, ":DIG%d:TURN %s", probe->index,
908 probe->enabled ? "ON" : "OFF") != SR_OK)
909 return SR_ERR;
910 devc->digital_channels[probe->index] = probe->enabled;
911 }
912 }
913 }
914
915 if (!devc->enabled_analog_probes && !devc->enabled_digital_probes)
916 return SR_ERR;
917
918 /* Turn off LA module if on and no digital probes selected. */
919 if (devc->la_enabled && !devc->enabled_digital_probes)
920 if (rigol_ds_config_set(sdi, ":LA:DISP OFF") != SR_OK)
921 return SR_ERR;
922
923 /* Set memory mode. */
924 if (devc->data_source == DATA_SOURCE_SEGMENTED) {
925 sr_err("Data source 'Segmented' not yet supported");
926 return SR_ERR;
927 }
928
929 devc->analog_frame_size = analog_frame_size(sdi);
930 devc->digital_frame_size = digital_frame_size(sdi);
931
932 switch (devc->model->series->protocol) {
933 case PROTOCOL_V2:
934 if (rigol_ds_config_set(sdi, ":ACQ:MDEP LONG") != SR_OK)
935 return SR_ERR;
936 break;
937 case PROTOCOL_V3:
938 /* Apparently for the DS2000 the memory
939 * depth can only be set in Running state -
940 * this matches the behaviour of the UI. */
941 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
942 return SR_ERR;
943 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
944 devc->analog_frame_size) != SR_OK)
945 return SR_ERR;
946 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
947 return SR_ERR;
948 break;
949 default:
950 break;
951 }
952
953 if (devc->data_source == DATA_SOURCE_LIVE)
954 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
955 return SR_ERR;
956
957 sr_scpi_source_add(scpi, G_IO_IN, 50, rigol_ds_receive, (void *)sdi);
958
959 /* Send header packet to the session bus. */
960 std_session_send_df_header(cb_data, LOG_PREFIX);
961
962 if (devc->enabled_analog_probes)
963 devc->channel_entry = devc->enabled_analog_probes;
964 else
965 devc->channel_entry = devc->enabled_digital_probes;
966
967 if (rigol_ds_capture_start(sdi) != SR_OK)
968 return SR_ERR;
969
970 /* Start of first frame. */
971 packet.type = SR_DF_FRAME_BEGIN;
972 sr_session_send(cb_data, &packet);
973
974 return SR_OK;
975}
976
977static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
978{
979 struct dev_context *devc;
980 struct sr_scpi_dev_inst *scpi;
981 struct sr_datafeed_packet packet;
982
983 (void)cb_data;
984
985 devc = sdi->priv;
986
987 if (sdi->status != SR_ST_ACTIVE) {
988 sr_err("Device inactive, can't stop acquisition.");
989 return SR_ERR;
990 }
991
992 /* End of last frame. */
993 packet.type = SR_DF_END;
994 sr_session_send(sdi, &packet);
995
996 g_slist_free(devc->enabled_analog_probes);
997 g_slist_free(devc->enabled_digital_probes);
998 devc->enabled_analog_probes = NULL;
999 devc->enabled_digital_probes = NULL;
1000 scpi = sdi->conn;
1001 sr_scpi_source_remove(scpi);
1002
1003 return SR_OK;
1004}
1005
1006SR_PRIV struct sr_dev_driver rigol_ds_driver_info = {
1007 .name = "rigol-ds",
1008 .longname = "Rigol DS",
1009 .api_version = 1,
1010 .init = init,
1011 .cleanup = cleanup,
1012 .scan = scan,
1013 .dev_list = dev_list,
1014 .dev_clear = dev_clear,
1015 .config_get = config_get,
1016 .config_set = config_set,
1017 .config_list = config_list,
1018 .dev_open = dev_open,
1019 .dev_close = dev_close,
1020 .dev_acquisition_start = dev_acquisition_start,
1021 .dev_acquisition_stop = dev_acquisition_stop,
1022 .priv = NULL,
1023};
Hardware access and backend lib