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sr: Made hwcap const
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1/*
2 * This file is part of the sigrok project.
3 *
4 * Copyright (C) 2010-2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <stdio.h>
21#include <stdint.h>
22#include <stdlib.h>
23#include <sys/types.h>
24#include <sys/stat.h>
25#include <fcntl.h>
26#include <unistd.h>
27#ifdef _WIN32
28#include <windows.h>
29#else
30#include <termios.h>
31#endif
32#include <string.h>
33#include <sys/time.h>
34#include <inttypes.h>
35#ifdef _WIN32
36/* TODO */
37#else
38#include <arpa/inet.h>
39#endif
40#include <glib.h>
41#include "sigrok.h"
42#include "sigrok-internal.h"
43#include "ols.h"
44
45#ifdef _WIN32
46#define O_NONBLOCK FIONBIO
47#endif
48
49static const int hwcaps[] = {
50 SR_HWCAP_LOGIC_ANALYZER,
51 SR_HWCAP_SAMPLERATE,
52 SR_HWCAP_CAPTURE_RATIO,
53 SR_HWCAP_LIMIT_SAMPLES,
54 SR_HWCAP_RLE,
55 0,
56};
57
58/* Probes are numbered 0-31 (on the PCB silkscreen). */
59static const char *probe_names[NUM_PROBES + 1] = {
60 "0",
61 "1",
62 "2",
63 "3",
64 "4",
65 "5",
66 "6",
67 "7",
68 "8",
69 "9",
70 "10",
71 "11",
72 "12",
73 "13",
74 "14",
75 "15",
76 "16",
77 "17",
78 "18",
79 "19",
80 "20",
81 "21",
82 "22",
83 "23",
84 "24",
85 "25",
86 "26",
87 "27",
88 "28",
89 "29",
90 "30",
91 "31",
92 NULL,
93};
94
95/* default supported samplerates, can be overridden by device metadata */
96static struct sr_samplerates samplerates = {
97 SR_HZ(10),
98 SR_MHZ(200),
99 SR_HZ(1),
100 NULL,
101};
102
103/* List of struct sr_serial_dev_inst */
104static GSList *dev_insts = NULL;
105
106static int send_shortcommand(int fd, uint8_t command)
107{
108 char buf[1];
109
110 sr_dbg("ols: sending cmd 0x%.2x", command);
111 buf[0] = command;
112 if (serial_write(fd, buf, 1) != 1)
113 return SR_ERR;
114
115 return SR_OK;
116}
117
118static int send_longcommand(int fd, uint8_t command, uint32_t data)
119{
120 char buf[5];
121
122 sr_dbg("ols: sending cmd 0x%.2x data 0x%.8x", command, data);
123 buf[0] = command;
124 buf[1] = (data & 0xff000000) >> 24;
125 buf[2] = (data & 0xff0000) >> 16;
126 buf[3] = (data & 0xff00) >> 8;
127 buf[4] = data & 0xff;
128 if (serial_write(fd, buf, 5) != 5)
129 return SR_ERR;
130
131 return SR_OK;
132}
133
134static int configure_probes(struct context *ctx, GSList *probes)
135{
136 struct sr_probe *probe;
137 GSList *l;
138 int probe_bit, stage, i;
139 char *tc;
140
141 ctx->probe_mask = 0;
142 for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
143 ctx->trigger_mask[i] = 0;
144 ctx->trigger_value[i] = 0;
145 }
146
147 ctx->num_stages = 0;
148 for (l = probes; l; l = l->next) {
149 probe = (struct sr_probe *)l->data;
150 if (!probe->enabled)
151 continue;
152
153 /*
154 * Set up the probe mask for later configuration into the
155 * flag register.
156 */
157 probe_bit = 1 << (probe->index - 1);
158 ctx->probe_mask |= probe_bit;
159
160 if (!probe->trigger)
161 continue;
162
163 /* Configure trigger mask and value. */
164 stage = 0;
165 for (tc = probe->trigger; tc && *tc; tc++) {
166 ctx->trigger_mask[stage] |= probe_bit;
167 if (*tc == '1')
168 ctx->trigger_value[stage] |= probe_bit;
169 stage++;
170 if (stage > 3)
171 /*
172 * TODO: Only supporting parallel mode, with
173 * up to 4 stages.
174 */
175 return SR_ERR;
176 }
177 if (stage > ctx->num_stages)
178 ctx->num_stages = stage;
179 }
180
181 return SR_OK;
182}
183
184static uint32_t reverse16(uint32_t in)
185{
186 uint32_t out;
187
188 out = (in & 0xff) << 8;
189 out |= (in & 0xff00) >> 8;
190 out |= (in & 0xff0000) << 8;
191 out |= (in & 0xff000000) >> 8;
192
193 return out;
194}
195
196static uint32_t reverse32(uint32_t in)
197{
198 uint32_t out;
199
200 out = (in & 0xff) << 24;
201 out |= (in & 0xff00) << 8;
202 out |= (in & 0xff0000) >> 8;
203 out |= (in & 0xff000000) >> 24;
204
205 return out;
206}
207
208static struct context *ols_dev_new(void)
209{
210 struct context *ctx;
211
212 /* TODO: Is 'ctx' ever g_free()'d? */
213 if (!(ctx = g_try_malloc0(sizeof(struct context)))) {
214 sr_err("ols: %s: ctx malloc failed", __func__);
215 return NULL;
216 }
217
218 ctx->trigger_at = -1;
219 ctx->probe_mask = 0xffffffff;
220 ctx->cur_samplerate = SR_KHZ(200);
221 ctx->serial = NULL;
222
223 return ctx;
224}
225
226static struct sr_dev_inst *get_metadata(int fd)
227{
228 struct sr_dev_inst *sdi;
229 struct context *ctx;
230 uint32_t tmp_int;
231 uint8_t key, type, token;
232 GString *tmp_str, *devname, *version;
233 gchar tmp_c;
234
235 sdi = sr_dev_inst_new(0, SR_ST_INACTIVE, NULL, NULL, NULL);
236 ctx = ols_dev_new();
237 sdi->priv = ctx;
238
239 devname = g_string_new("");
240 version = g_string_new("");
241
242 key = 0xff;
243 while (key) {
244 if (serial_read(fd, &key, 1) != 1 || key == 0x00)
245 break;
246 type = key >> 5;
247 token = key & 0x1f;
248 switch (type) {
249 case 0:
250 /* NULL-terminated string */
251 tmp_str = g_string_new("");
252 while (serial_read(fd, &tmp_c, 1) == 1 && tmp_c != '\0')
253 g_string_append_c(tmp_str, tmp_c);
254 sr_dbg("ols: got metadata key 0x%.2x value '%s'",
255 key, tmp_str->str);
256 switch (token) {
257 case 0x01:
258 /* Device name */
259 devname = g_string_append(devname, tmp_str->str);
260 break;
261 case 0x02:
262 /* FPGA firmware version */
263 if (version->len)
264 g_string_append(version, ", ");
265 g_string_append(version, "FPGA version ");
266 g_string_append(version, tmp_str->str);
267 break;
268 case 0x03:
269 /* Ancillary version */
270 if (version->len)
271 g_string_append(version, ", ");
272 g_string_append(version, "Ancillary version ");
273 g_string_append(version, tmp_str->str);
274 break;
275 default:
276 sr_info("ols: unknown token 0x%.2x: '%s'",
277 token, tmp_str->str);
278 break;
279 }
280 g_string_free(tmp_str, TRUE);
281 break;
282 case 1:
283 /* 32-bit unsigned integer */
284 if (serial_read(fd, &tmp_int, 4) != 4)
285 break;
286 tmp_int = reverse32(tmp_int);
287 sr_dbg("ols: got metadata key 0x%.2x value 0x%.8x",
288 key, tmp_int);
289 switch (token) {
290 case 0x00:
291 /* Number of usable probes */
292 ctx->num_probes = tmp_int;
293 break;
294 case 0x01:
295 /* Amount of sample memory available (bytes) */
296 ctx->max_samples = tmp_int;
297 break;
298 case 0x02:
299 /* Amount of dynamic memory available (bytes) */
300 /* what is this for? */
301 break;
302 case 0x03:
303 /* Maximum sample rate (hz) */
304 ctx->max_samplerate = tmp_int;
305 break;
306 case 0x04:
307 /* protocol version */
308 ctx->protocol_version = tmp_int;
309 break;
310 default:
311 sr_info("ols: unknown token 0x%.2x: 0x%.8x",
312 token, tmp_int);
313 break;
314 }
315 break;
316 case 2:
317 /* 8-bit unsigned integer */
318 if (serial_read(fd, &tmp_c, 1) != 1)
319 break;
320 sr_dbg("ols: got metadata key 0x%.2x value 0x%.2x",
321 key, tmp_c);
322 switch (token) {
323 case 0x00:
324 /* Number of usable probes */
325 ctx->num_probes = tmp_c;
326 break;
327 case 0x01:
328 /* protocol version */
329 ctx->protocol_version = tmp_c;
330 break;
331 default:
332 sr_info("ols: unknown token 0x%.2x: 0x%.2x",
333 token, tmp_c);
334 break;
335 }
336 break;
337 default:
338 /* unknown type */
339 break;
340 }
341 }
342
343 sdi->model = devname->str;
344 sdi->version = version->str;
345 g_string_free(devname, FALSE);
346 g_string_free(version, FALSE);
347
348 return sdi;
349}
350
351static int hw_init(const char *devinfo)
352{
353 struct sr_dev_inst *sdi;
354 struct context *ctx;
355 GSList *ports, *l;
356 GPollFD *fds, probefd;
357 int devcnt, final_devcnt, num_ports, fd, ret, i;
358 char buf[8], **dev_names, **serial_params;
359
360 final_devcnt = 0;
361
362 if (devinfo)
363 ports = g_slist_append(NULL, g_strdup(devinfo));
364 else
365 /* No specific device given, so scan all serial ports. */
366 ports = list_serial_ports();
367
368 num_ports = g_slist_length(ports);
369
370 if (!(fds = g_try_malloc0(num_ports * sizeof(GPollFD)))) {
371 sr_err("ols: %s: fds malloc failed", __func__);
372 goto hw_init_free_ports; /* TODO: SR_ERR_MALLOC. */
373 }
374
375 if (!(dev_names = g_try_malloc(num_ports * sizeof(char *)))) {
376 sr_err("ols: %s: dev_names malloc failed", __func__);
377 goto hw_init_free_fds; /* TODO: SR_ERR_MALLOC. */
378 }
379
380 if (!(serial_params = g_try_malloc(num_ports * sizeof(char *)))) {
381 sr_err("ols: %s: serial_params malloc failed", __func__);
382 goto hw_init_free_dev_names; /* TODO: SR_ERR_MALLOC. */
383 }
384
385 devcnt = 0;
386 for (l = ports; l; l = l->next) {
387 /* The discovery procedure is like this: first send the Reset
388 * command (0x00) 5 times, since the device could be anywhere
389 * in a 5-byte command. Then send the ID command (0x02).
390 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
391 * have a match.
392 *
393 * Since it may take the device a while to respond at 115Kb/s,
394 * we do all the sending first, then wait for all of them to
395 * respond with g_poll().
396 */
397 sr_info("ols: probing %s...", (char *)l->data);
398 fd = serial_open(l->data, O_RDWR | O_NONBLOCK);
399 if (fd != -1) {
400 serial_params[devcnt] = serial_backup_params(fd);
401 serial_set_params(fd, 115200, 8, 0, 1, 2);
402 ret = SR_OK;
403 for (i = 0; i < 5; i++) {
404 if ((ret = send_shortcommand(fd,
405 CMD_RESET)) != SR_OK) {
406 /* Serial port is not writable. */
407 break;
408 }
409 }
410 if (ret != SR_OK) {
411 serial_restore_params(fd,
412 serial_params[devcnt]);
413 serial_close(fd);
414 continue;
415 }
416 send_shortcommand(fd, CMD_ID);
417 fds[devcnt].fd = fd;
418 fds[devcnt].events = G_IO_IN;
419 dev_names[devcnt] = g_strdup(l->data);
420 devcnt++;
421 }
422 g_free(l->data);
423 }
424
425 /* 2ms isn't enough for reliable transfer with pl2303, let's try 10 */
426 usleep(10000);
427
428 g_poll(fds, devcnt, 1);
429
430 for (i = 0; i < devcnt; i++) {
431 if (fds[i].revents != G_IO_IN)
432 continue;
433 if (serial_read(fds[i].fd, buf, 4) != 4)
434 continue;
435 if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
436 continue;
437
438 /* definitely using the OLS protocol, check if it supports
439 * the metadata command
440 */
441 send_shortcommand(fds[i].fd, CMD_METADATA);
442 probefd.fd = fds[i].fd;
443 probefd.events = G_IO_IN;
444 if (g_poll(&probefd, 1, 10) > 0) {
445 /* got metadata */
446 sdi = get_metadata(fds[i].fd);
447 sdi->index = final_devcnt;
448 ctx = sdi->priv;
449 } else {
450 /* not an OLS -- some other board that uses the sump protocol */
451 sdi = sr_dev_inst_new(final_devcnt, SR_ST_INACTIVE,
452 "Sump", "Logic Analyzer", "v1.0");
453 ctx = ols_dev_new();
454 ctx->num_probes = 32;
455 sdi->priv = ctx;
456 }
457 ctx->serial = sr_serial_dev_inst_new(dev_names[i], -1);
458 dev_insts = g_slist_append(dev_insts, sdi);
459 final_devcnt++;
460 serial_close(fds[i].fd);
461 fds[i].fd = 0;
462 }
463
464 /* clean up after all the probing */
465 for (i = 0; i < devcnt; i++) {
466 if (fds[i].fd != 0) {
467 serial_restore_params(fds[i].fd, serial_params[i]);
468 serial_close(fds[i].fd);
469 }
470 g_free(serial_params[i]);
471 g_free(dev_names[i]);
472 }
473
474 g_free(serial_params);
475hw_init_free_dev_names:
476 g_free(dev_names);
477hw_init_free_fds:
478 g_free(fds);
479hw_init_free_ports:
480 g_slist_free(ports);
481
482 return final_devcnt;
483}
484
485static int hw_dev_open(int dev_index)
486{
487 struct sr_dev_inst *sdi;
488 struct context *ctx;
489
490 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
491 return SR_ERR;
492
493 ctx = sdi->priv;
494
495 ctx->serial->fd = serial_open(ctx->serial->port, O_RDWR);
496 if (ctx->serial->fd == -1)
497 return SR_ERR;
498
499 sdi->status = SR_ST_ACTIVE;
500
501 return SR_OK;
502}
503
504static int hw_dev_close(int dev_index)
505{
506 struct sr_dev_inst *sdi;
507 struct context *ctx;
508
509 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) {
510 sr_err("ols: %s: sdi was NULL", __func__);
511 return SR_ERR_BUG;
512 }
513
514 ctx = sdi->priv;
515
516 /* TODO */
517 if (ctx->serial->fd != -1) {
518 serial_close(ctx->serial->fd);
519 ctx->serial->fd = -1;
520 sdi->status = SR_ST_INACTIVE;
521 }
522
523 return SR_OK;
524}
525
526static int hw_cleanup(void)
527{
528 GSList *l;
529 struct sr_dev_inst *sdi;
530 struct context *ctx;
531 int ret = SR_OK;
532
533 /* Properly close and free all devices. */
534 for (l = dev_insts; l; l = l->next) {
535 if (!(sdi = l->data)) {
536 /* Log error, but continue cleaning up the rest. */
537 sr_err("ols: %s: sdi was NULL, continuing", __func__);
538 ret = SR_ERR_BUG;
539 continue;
540 }
541 if (!(ctx = sdi->priv)) {
542 /* Log error, but continue cleaning up the rest. */
543 sr_err("ols: %s: sdi->priv was NULL, continuing",
544 __func__);
545 ret = SR_ERR_BUG;
546 continue;
547 }
548 /* TODO: Check for serial != NULL. */
549 if (ctx->serial->fd != -1)
550 serial_close(ctx->serial->fd);
551 sr_serial_dev_inst_free(ctx->serial);
552 sr_dev_inst_free(sdi);
553 }
554 g_slist_free(dev_insts);
555 dev_insts = NULL;
556
557 return ret;
558}
559
560static void *hw_dev_info_get(int dev_index, int dev_info_id)
561{
562 struct sr_dev_inst *sdi;
563 struct context *ctx;
564 void *info;
565
566 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
567 return NULL;
568 ctx = sdi->priv;
569
570 info = NULL;
571 switch (dev_info_id) {
572 case SR_DI_INST:
573 info = sdi;
574 break;
575 case SR_DI_NUM_PROBES:
576 info = GINT_TO_POINTER(NUM_PROBES);
577 break;
578 case SR_DI_PROBE_NAMES:
579 info = probe_names;
580 break;
581 case SR_DI_SAMPLERATES:
582 info = &samplerates;
583 break;
584 case SR_DI_TRIGGER_TYPES:
585 info = (char *)TRIGGER_TYPES;
586 break;
587 case SR_DI_CUR_SAMPLERATE:
588 info = &ctx->cur_samplerate;
589 break;
590 }
591
592 return info;
593}
594
595static int hw_dev_status_get(int dev_index)
596{
597 struct sr_dev_inst *sdi;
598
599 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
600 return SR_ST_NOT_FOUND;
601
602 return sdi->status;
603}
604
605static const int *hw_hwcap_get_all(void)
606{
607 return hwcaps;
608}
609
610static int set_samplerate(struct sr_dev_inst *sdi, uint64_t samplerate)
611{
612 struct context *ctx;
613
614 ctx = sdi->priv;
615 if (ctx->max_samplerate) {
616 if (samplerate > ctx->max_samplerate)
617 return SR_ERR_SAMPLERATE;
618 } else if (samplerate < samplerates.low || samplerate > samplerates.high)
619 return SR_ERR_SAMPLERATE;
620
621 if (samplerate > CLOCK_RATE) {
622 ctx->flag_reg |= FLAG_DEMUX;
623 ctx->cur_samplerate_divider = (CLOCK_RATE * 2 / samplerate) - 1;
624 } else {
625 ctx->flag_reg &= ~FLAG_DEMUX;
626 ctx->cur_samplerate_divider = (CLOCK_RATE / samplerate) - 1;
627 }
628
629 /* Calculate actual samplerate used and complain if it is different
630 * from the requested.
631 */
632 ctx->cur_samplerate = CLOCK_RATE / (ctx->cur_samplerate_divider + 1);
633 if (ctx->flag_reg & FLAG_DEMUX)
634 ctx->cur_samplerate *= 2;
635 if (ctx->cur_samplerate != samplerate)
636 sr_err("ols: can't match samplerate %" PRIu64 ", using %"
637 PRIu64, samplerate, ctx->cur_samplerate);
638
639 return SR_OK;
640}
641
642static int hw_dev_config_set(int dev_index, int hwcap, void *value)
643{
644 struct sr_dev_inst *sdi;
645 struct context *ctx;
646 int ret;
647 uint64_t *tmp_u64;
648
649 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
650 return SR_ERR;
651 ctx = sdi->priv;
652
653 if (sdi->status != SR_ST_ACTIVE)
654 return SR_ERR;
655
656 switch (hwcap) {
657 case SR_HWCAP_SAMPLERATE:
658 ret = set_samplerate(sdi, *(uint64_t *)value);
659 break;
660 case SR_HWCAP_PROBECONFIG:
661 ret = configure_probes(ctx, (GSList *)value);
662 break;
663 case SR_HWCAP_LIMIT_SAMPLES:
664 tmp_u64 = value;
665 if (*tmp_u64 < MIN_NUM_SAMPLES)
666 return SR_ERR;
667 if (*tmp_u64 > ctx->max_samples)
668 sr_err("ols: sample limit exceeds hw max");
669 ctx->limit_samples = *tmp_u64;
670 sr_info("ols: sample limit %" PRIu64, ctx->limit_samples);
671 ret = SR_OK;
672 break;
673 case SR_HWCAP_CAPTURE_RATIO:
674 ctx->capture_ratio = *(uint64_t *)value;
675 if (ctx->capture_ratio < 0 || ctx->capture_ratio > 100) {
676 ctx->capture_ratio = 0;
677 ret = SR_ERR;
678 } else
679 ret = SR_OK;
680 break;
681 case SR_HWCAP_RLE:
682 if (GPOINTER_TO_INT(value)) {
683 sr_info("ols: enabling RLE");
684 ctx->flag_reg |= FLAG_RLE;
685 }
686 ret = SR_OK;
687 break;
688 default:
689 ret = SR_ERR;
690 }
691
692 return ret;
693}
694
695static int receive_data(int fd, int revents, void *cb_data)
696{
697 struct sr_datafeed_packet packet;
698 struct sr_datafeed_logic logic;
699 struct sr_dev_inst *sdi;
700 struct context *ctx;
701 GSList *l;
702 int num_channels, offset, i, j;
703 unsigned char byte;
704
705 /* Find this device's ctx struct by its fd. */
706 ctx = NULL;
707 for (l = dev_insts; l; l = l->next) {
708 sdi = l->data;
709 ctx = sdi->priv;
710 if (ctx->serial->fd == fd) {
711 break;
712 }
713 ctx = NULL;
714 }
715 if (!ctx)
716 /* Shouldn't happen. */
717 return TRUE;
718
719 if (ctx->num_transfers++ == 0) {
720 /*
721 * First time round, means the device started sending data,
722 * and will not stop until done. If it stops sending for
723 * longer than it takes to send a byte, that means it's
724 * finished. We'll double that to 30ms to be sure...
725 */
726 sr_source_remove(fd);
727 sr_source_add(fd, G_IO_IN, 30, receive_data, cb_data);
728 ctx->raw_sample_buf = g_try_malloc(ctx->limit_samples * 4);
729 if (!ctx->raw_sample_buf) {
730 sr_err("ols: %s: ctx->raw_sample_buf malloc failed",
731 __func__);
732 return FALSE;
733 }
734 /* fill with 1010... for debugging */
735 memset(ctx->raw_sample_buf, 0x82, ctx->limit_samples * 4);
736 }
737
738 num_channels = 0;
739 for (i = 0x20; i > 0x02; i /= 2) {
740 if ((ctx->flag_reg & i) == 0)
741 num_channels++;
742 }
743
744 if (revents == G_IO_IN) {
745 if (serial_read(fd, &byte, 1) != 1)
746 return FALSE;
747
748 /* Ignore it if we've read enough. */
749 if (ctx->num_samples >= ctx->limit_samples)
750 return TRUE;
751
752 ctx->sample[ctx->num_bytes++] = byte;
753 sr_dbg("ols: received byte 0x%.2x", byte);
754 if (ctx->num_bytes == num_channels) {
755 /* Got a full sample. */
756 sr_dbg("ols: received sample 0x%.*x",
757 ctx->num_bytes * 2, *(int *)ctx->sample);
758 if (ctx->flag_reg & FLAG_RLE) {
759 /*
760 * In RLE mode -1 should never come in as a
761 * sample, because bit 31 is the "count" flag.
762 */
763 if (ctx->sample[ctx->num_bytes - 1] & 0x80) {
764 ctx->sample[ctx->num_bytes - 1] &= 0x7f;
765 /*
766 * FIXME: This will only work on
767 * little-endian systems.
768 */
769 ctx->rle_count = *(int *)(ctx->sample);
770 sr_dbg("ols: RLE count = %d", ctx->rle_count);
771 ctx->num_bytes = 0;
772 return TRUE;
773 }
774 }
775 ctx->num_samples += ctx->rle_count + 1;
776 if (ctx->num_samples > ctx->limit_samples) {
777 /* Save us from overrunning the buffer. */
778 ctx->rle_count -= ctx->num_samples - ctx->limit_samples;
779 ctx->num_samples = ctx->limit_samples;
780 }
781
782 if (num_channels < 4) {
783 /*
784 * Some channel groups may have been turned
785 * off, to speed up transfer between the
786 * hardware and the PC. Expand that here before
787 * submitting it over the session bus --
788 * whatever is listening on the bus will be
789 * expecting a full 32-bit sample, based on
790 * the number of probes.
791 */
792 j = 0;
793 memset(ctx->tmp_sample, 0, 4);
794 for (i = 0; i < 4; i++) {
795 if (((ctx->flag_reg >> 2) & (1 << i)) == 0) {
796 /*
797 * This channel group was
798 * enabled, copy from received
799 * sample.
800 */
801 ctx->tmp_sample[i] = ctx->sample[j++];
802 }
803 }
804 memcpy(ctx->sample, ctx->tmp_sample, 4);
805 sr_dbg("ols: full sample 0x%.8x", *(int *)ctx->sample);
806 }
807
808 /* the OLS sends its sample buffer backwards.
809 * store it in reverse order here, so we can dump
810 * this on the session bus later.
811 */
812 offset = (ctx->limit_samples - ctx->num_samples) * 4;
813 for (i = 0; i <= ctx->rle_count; i++) {
814 memcpy(ctx->raw_sample_buf + offset + (i * 4),
815 ctx->sample, 4);
816 }
817 memset(ctx->sample, 0, 4);
818 ctx->num_bytes = 0;
819 ctx->rle_count = 0;
820 }
821 } else {
822 /*
823 * This is the main loop telling us a timeout was reached, or
824 * we've acquired all the samples we asked for -- we're done.
825 * Send the (properly-ordered) buffer to the frontend.
826 */
827 if (ctx->trigger_at != -1) {
828 /* a trigger was set up, so we need to tell the frontend
829 * about it.
830 */
831 if (ctx->trigger_at > 0) {
832 /* there are pre-trigger samples, send those first */
833 packet.type = SR_DF_LOGIC;
834 packet.payload = &logic;
835 logic.length = ctx->trigger_at * 4;
836 logic.unitsize = 4;
837 logic.data = ctx->raw_sample_buf +
838 (ctx->limit_samples - ctx->num_samples) * 4;
839 sr_session_send(cb_data, &packet);
840 }
841
842 /* send the trigger */
843 packet.type = SR_DF_TRIGGER;
844 sr_session_send(cb_data, &packet);
845
846 /* send post-trigger samples */
847 packet.type = SR_DF_LOGIC;
848 packet.payload = &logic;
849 logic.length = (ctx->num_samples * 4) - (ctx->trigger_at * 4);
850 logic.unitsize = 4;
851 logic.data = ctx->raw_sample_buf + ctx->trigger_at * 4 +
852 (ctx->limit_samples - ctx->num_samples) * 4;
853 sr_session_send(cb_data, &packet);
854 } else {
855 /* no trigger was used */
856 packet.type = SR_DF_LOGIC;
857 packet.payload = &logic;
858 logic.length = ctx->num_samples * 4;
859 logic.unitsize = 4;
860 logic.data = ctx->raw_sample_buf +
861 (ctx->limit_samples - ctx->num_samples) * 4;
862 sr_session_send(cb_data, &packet);
863 }
864 g_free(ctx->raw_sample_buf);
865
866 serial_flush(fd);
867 serial_close(fd);
868 packet.type = SR_DF_END;
869 sr_session_send(cb_data, &packet);
870 }
871
872 return TRUE;
873}
874
875static int hw_dev_acquisition_start(int dev_index, void *cb_data)
876{
877 struct sr_datafeed_packet *packet;
878 struct sr_datafeed_header *header;
879 struct sr_datafeed_meta_logic meta;
880 struct sr_dev_inst *sdi;
881 struct context *ctx;
882 uint32_t trigger_config[4];
883 uint32_t data;
884 uint16_t readcount, delaycount;
885 uint8_t changrp_mask;
886 int num_channels;
887 int i;
888
889 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
890 return SR_ERR;
891
892 ctx = sdi->priv;
893
894 if (sdi->status != SR_ST_ACTIVE)
895 return SR_ERR;
896
897 /*
898 * Enable/disable channel groups in the flag register according to the
899 * probe mask. Calculate this here, because num_channels is needed
900 * to limit readcount.
901 */
902 changrp_mask = 0;
903 num_channels = 0;
904 for (i = 0; i < 4; i++) {
905 if (ctx->probe_mask & (0xff << (i * 8))) {
906 changrp_mask |= (1 << i);
907 num_channels++;
908 }
909 }
910
911 /*
912 * Limit readcount to prevent reading past the end of the hardware
913 * buffer.
914 */
915 readcount = MIN(ctx->max_samples / num_channels, ctx->limit_samples) / 4;
916
917 memset(trigger_config, 0, 16);
918 trigger_config[ctx->num_stages - 1] |= 0x08;
919 if (ctx->trigger_mask[0]) {
920 delaycount = readcount * (1 - ctx->capture_ratio / 100.0);
921 ctx->trigger_at = (readcount - delaycount) * 4 - ctx->num_stages;
922
923 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_MASK_0,
924 reverse32(ctx->trigger_mask[0])) != SR_OK)
925 return SR_ERR;
926 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_VALUE_0,
927 reverse32(ctx->trigger_value[0])) != SR_OK)
928 return SR_ERR;
929 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_CONFIG_0,
930 trigger_config[0]) != SR_OK)
931 return SR_ERR;
932
933 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_MASK_1,
934 reverse32(ctx->trigger_mask[1])) != SR_OK)
935 return SR_ERR;
936 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_VALUE_1,
937 reverse32(ctx->trigger_value[1])) != SR_OK)
938 return SR_ERR;
939 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_CONFIG_1,
940 trigger_config[1]) != SR_OK)
941 return SR_ERR;
942
943 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_MASK_2,
944 reverse32(ctx->trigger_mask[2])) != SR_OK)
945 return SR_ERR;
946 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_VALUE_2,
947 reverse32(ctx->trigger_value[2])) != SR_OK)
948 return SR_ERR;
949 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_CONFIG_2,
950 trigger_config[2]) != SR_OK)
951 return SR_ERR;
952
953 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_MASK_3,
954 reverse32(ctx->trigger_mask[3])) != SR_OK)
955 return SR_ERR;
956 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_VALUE_3,
957 reverse32(ctx->trigger_value[3])) != SR_OK)
958 return SR_ERR;
959 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_CONFIG_3,
960 trigger_config[3]) != SR_OK)
961 return SR_ERR;
962 } else {
963 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_MASK_0,
964 ctx->trigger_mask[0]) != SR_OK)
965 return SR_ERR;
966 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_VALUE_0,
967 ctx->trigger_value[0]) != SR_OK)
968 return SR_ERR;
969 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_CONFIG_0,
970 0x00000008) != SR_OK)
971 return SR_ERR;
972 delaycount = readcount;
973 }
974
975 sr_info("ols: setting samplerate to %" PRIu64 " Hz (divider %u, "
976 "demux %s)", ctx->cur_samplerate, ctx->cur_samplerate_divider,
977 ctx->flag_reg & FLAG_DEMUX ? "on" : "off");
978 if (send_longcommand(ctx->serial->fd, CMD_SET_DIVIDER,
979 reverse32(ctx->cur_samplerate_divider)) != SR_OK)
980 return SR_ERR;
981
982 /* Send sample limit and pre/post-trigger capture ratio. */
983 data = ((readcount - 1) & 0xffff) << 16;
984 data |= (delaycount - 1) & 0xffff;
985 if (send_longcommand(ctx->serial->fd, CMD_CAPTURE_SIZE, reverse16(data)) != SR_OK)
986 return SR_ERR;
987
988 /* The flag register wants them here, and 1 means "disable channel". */
989 ctx->flag_reg |= ~(changrp_mask << 2) & 0x3c;
990 ctx->flag_reg |= FLAG_FILTER;
991 ctx->rle_count = 0;
992 data = (ctx->flag_reg << 24) | ((ctx->flag_reg << 8) & 0xff0000);
993 if (send_longcommand(ctx->serial->fd, CMD_SET_FLAGS, data) != SR_OK)
994 return SR_ERR;
995
996 /* Start acquisition on the device. */
997 if (send_shortcommand(ctx->serial->fd, CMD_RUN) != SR_OK)
998 return SR_ERR;
999
1000 sr_source_add(ctx->serial->fd, G_IO_IN, -1, receive_data,
1001 cb_data);
1002
1003 if (!(packet = g_try_malloc(sizeof(struct sr_datafeed_packet)))) {
1004 sr_err("ols: %s: packet malloc failed", __func__);
1005 return SR_ERR_MALLOC;
1006 }
1007
1008 if (!(header = g_try_malloc(sizeof(struct sr_datafeed_header)))) {
1009 sr_err("ols: %s: header malloc failed", __func__);
1010 g_free(packet);
1011 return SR_ERR_MALLOC;
1012 }
1013
1014 /* Send header packet to the session bus. */
1015 packet->type = SR_DF_HEADER;
1016 packet->payload = (unsigned char *)header;
1017 header->feed_version = 1;
1018 gettimeofday(&header->starttime, NULL);
1019 sr_session_send(cb_data, packet);
1020
1021 /* Send metadata about the SR_DF_LOGIC packets to come. */
1022 packet->type = SR_DF_META_LOGIC;
1023 packet->payload = &meta;
1024 meta.samplerate = ctx->cur_samplerate;
1025 meta.num_probes = NUM_PROBES;
1026 sr_session_send(cb_data, packet);
1027
1028 g_free(header);
1029 g_free(packet);
1030
1031 return SR_OK;
1032}
1033
1034/* TODO: This stops acquisition on ALL devices, ignoring dev_index. */
1035static int hw_dev_acquisition_stop(int dev_index, void *cb_data)
1036{
1037 struct sr_datafeed_packet packet;
1038
1039 /* Avoid compiler warnings. */
1040 (void)dev_index;
1041
1042 packet.type = SR_DF_END;
1043 sr_session_send(cb_data, &packet);
1044
1045 return SR_OK;
1046}
1047
1048SR_PRIV struct sr_dev_driver ols_driver_info = {
1049 .name = "ols",
1050 .longname = "Openbench Logic Sniffer",
1051 .api_version = 1,
1052 .init = hw_init,
1053 .cleanup = hw_cleanup,
1054 .dev_open = hw_dev_open,
1055 .dev_close = hw_dev_close,
1056 .dev_info_get = hw_dev_info_get,
1057 .dev_status_get = hw_dev_status_get,
1058 .hwcap_get_all = hw_hwcap_get_all,
1059 .dev_config_set = hw_dev_config_set,
1060 .dev_acquisition_start = hw_dev_acquisition_start,
1061 .dev_acquisition_stop = hw_dev_acquisition_stop,
1062};