]> sigrok.org Git - libsigrok.git/blame_incremental - hardware/openbench-logic-sniffer/api.c
Replace 'probe' with 'channel' in most places.
[libsigrok.git] / hardware / openbench-logic-sniffer / api.c
... / ...
CommitLineData
1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "protocol.h"
21#include <libserialport.h>
22
23#define SERIALCOMM "115200/8n1"
24
25static const int32_t hwopts[] = {
26 SR_CONF_CONN,
27 SR_CONF_SERIALCOMM,
28};
29
30static const int32_t hwcaps[] = {
31 SR_CONF_LOGIC_ANALYZER,
32 SR_CONF_SAMPLERATE,
33 SR_CONF_TRIGGER_TYPE,
34 SR_CONF_CAPTURE_RATIO,
35 SR_CONF_LIMIT_SAMPLES,
36 SR_CONF_EXTERNAL_CLOCK,
37 SR_CONF_PATTERN_MODE,
38 SR_CONF_SWAP,
39 SR_CONF_RLE,
40};
41
42#define STR_PATTERN_NONE "None"
43#define STR_PATTERN_EXTERNAL "External"
44#define STR_PATTERN_INTERNAL "Internal"
45
46/* Supported methods of test pattern outputs */
47enum {
48 /**
49 * Capture pins 31:16 (unbuffered wing) output a test pattern
50 * that can captured on pins 0:15.
51 */
52 PATTERN_EXTERNAL,
53
54 /** Route test pattern internally to capture buffer. */
55 PATTERN_INTERNAL,
56};
57
58static const char *patterns[] = {
59 STR_PATTERN_NONE,
60 STR_PATTERN_EXTERNAL,
61 STR_PATTERN_INTERNAL,
62};
63
64/* Channels are numbered 0-31 (on the PCB silkscreen). */
65SR_PRIV const char *ols_channel_names[NUM_PROBES + 1] = {
66 "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
67 "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
68 "24", "25", "26", "27", "28", "29", "30", "31",
69 NULL,
70};
71
72/* Default supported samplerates, can be overridden by device metadata. */
73static const uint64_t samplerates[] = {
74 SR_HZ(10),
75 SR_MHZ(200),
76 SR_HZ(1),
77};
78
79SR_PRIV struct sr_dev_driver ols_driver_info;
80static struct sr_dev_driver *di = &ols_driver_info;
81
82static int init(struct sr_context *sr_ctx)
83{
84 return std_init(sr_ctx, di, LOG_PREFIX);
85}
86
87static GSList *scan(GSList *options)
88{
89 struct sr_config *src;
90 struct sr_dev_inst *sdi;
91 struct drv_context *drvc;
92 struct dev_context *devc;
93 struct sr_channel *ch;
94 struct sr_serial_dev_inst *serial;
95 GPollFD probefd;
96 GSList *l, *devices;
97 int ret, i;
98 const char *conn, *serialcomm;
99 char buf[8];
100
101 drvc = di->priv;
102
103 devices = NULL;
104
105 conn = serialcomm = NULL;
106 for (l = options; l; l = l->next) {
107 src = l->data;
108 switch (src->key) {
109 case SR_CONF_CONN:
110 conn = g_variant_get_string(src->data, NULL);
111 break;
112 case SR_CONF_SERIALCOMM:
113 serialcomm = g_variant_get_string(src->data, NULL);
114 break;
115 }
116 }
117 if (!conn)
118 return NULL;
119
120 if (serialcomm == NULL)
121 serialcomm = SERIALCOMM;
122
123 if (!(serial = sr_serial_dev_inst_new(conn, serialcomm)))
124 return NULL;
125
126 /* The discovery procedure is like this: first send the Reset
127 * command (0x00) 5 times, since the device could be anywhere
128 * in a 5-byte command. Then send the ID command (0x02).
129 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
130 * have a match.
131 */
132 sr_info("Probing %s.", conn);
133 if (serial_open(serial, SERIAL_RDWR | SERIAL_NONBLOCK) != SR_OK)
134 return NULL;
135
136 ret = SR_OK;
137 for (i = 0; i < 5; i++) {
138 if ((ret = send_shortcommand(serial, CMD_RESET)) != SR_OK) {
139 sr_err("Port %s is not writable.", conn);
140 break;
141 }
142 }
143 if (ret != SR_OK) {
144 serial_close(serial);
145 sr_err("Could not use port %s. Quitting.", conn);
146 return NULL;
147 }
148 send_shortcommand(serial, CMD_ID);
149
150 /* Wait 10ms for a response. */
151 g_usleep(10000);
152
153 sp_get_port_handle(serial->data, &probefd.fd);
154 probefd.events = G_IO_IN;
155 g_poll(&probefd, 1, 1);
156
157 if (probefd.revents != G_IO_IN)
158 return NULL;
159 if (serial_read_blocking(serial, buf, 4) != 4)
160 return NULL;
161 if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
162 return NULL;
163
164 /* Definitely using the OLS protocol, check if it supports
165 * the metadata command.
166 */
167 send_shortcommand(serial, CMD_METADATA);
168 if (g_poll(&probefd, 1, 10) > 0) {
169 /* Got metadata. */
170 sdi = get_metadata(serial);
171 sdi->index = 0;
172 devc = sdi->priv;
173 } else {
174 /* Not an OLS -- some other board that uses the sump protocol. */
175 sr_info("Device does not support metadata.");
176 sdi = sr_dev_inst_new(0, SR_ST_INACTIVE,
177 "Sump", "Logic Analyzer", "v1.0");
178 sdi->driver = di;
179 for (i = 0; i < 32; i++) {
180 if (!(ch = sr_probe_new(i, SR_PROBE_LOGIC, TRUE,
181 ols_channel_names[i])))
182 return 0;
183 sdi->channels = g_slist_append(sdi->channels, ch);
184 }
185 devc = ols_dev_new();
186 sdi->priv = devc;
187 }
188 /* Configure samplerate and divider. */
189 if (ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
190 sr_dbg("Failed to set default samplerate (%"PRIu64").",
191 DEFAULT_SAMPLERATE);
192 /* Clear trigger masks, values and stages. */
193 ols_configure_channels(sdi);
194 sdi->inst_type = SR_INST_SERIAL;
195 sdi->conn = serial;
196
197 drvc->instances = g_slist_append(drvc->instances, sdi);
198 devices = g_slist_append(devices, sdi);
199
200 serial_close(serial);
201
202 return devices;
203}
204
205static GSList *dev_list(void)
206{
207 return ((struct drv_context *)(di->priv))->instances;
208}
209
210static int cleanup(void)
211{
212 return std_dev_clear(di, NULL);
213}
214
215static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
216 const struct sr_channel_group *cg)
217{
218 struct dev_context *devc;
219
220 (void)cg;
221
222 if (!sdi)
223 return SR_ERR_ARG;
224
225 devc = sdi->priv;
226 switch (id) {
227 case SR_CONF_SAMPLERATE:
228 *data = g_variant_new_uint64(devc->cur_samplerate);
229 break;
230 case SR_CONF_CAPTURE_RATIO:
231 *data = g_variant_new_uint64(devc->capture_ratio);
232 break;
233 case SR_CONF_LIMIT_SAMPLES:
234 *data = g_variant_new_uint64(devc->limit_samples);
235 break;
236 case SR_CONF_PATTERN_MODE:
237 if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
238 *data = g_variant_new_string(STR_PATTERN_EXTERNAL);
239 else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
240 *data = g_variant_new_string(STR_PATTERN_INTERNAL);
241 else
242 *data = g_variant_new_string(STR_PATTERN_NONE);
243 break;
244 case SR_CONF_RLE:
245 *data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
246 break;
247 default:
248 return SR_ERR_NA;
249 }
250
251 return SR_OK;
252}
253
254static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi,
255 const struct sr_channel_group *cg)
256{
257 struct dev_context *devc;
258 uint16_t flag;
259 uint64_t tmp_u64;
260 int ret;
261 const char *stropt;
262
263 (void)cg;
264
265 if (sdi->status != SR_ST_ACTIVE)
266 return SR_ERR_DEV_CLOSED;
267
268 devc = sdi->priv;
269
270 switch (id) {
271 case SR_CONF_SAMPLERATE:
272 tmp_u64 = g_variant_get_uint64(data);
273 if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
274 return SR_ERR_SAMPLERATE;
275 ret = ols_set_samplerate(sdi, g_variant_get_uint64(data));
276 break;
277 case SR_CONF_LIMIT_SAMPLES:
278 tmp_u64 = g_variant_get_uint64(data);
279 if (tmp_u64 < MIN_NUM_SAMPLES)
280 return SR_ERR;
281 devc->limit_samples = tmp_u64;
282 ret = SR_OK;
283 break;
284 case SR_CONF_CAPTURE_RATIO:
285 devc->capture_ratio = g_variant_get_uint64(data);
286 if (devc->capture_ratio < 0 || devc->capture_ratio > 100) {
287 devc->capture_ratio = 0;
288 ret = SR_ERR;
289 } else
290 ret = SR_OK;
291 break;
292 case SR_CONF_EXTERNAL_CLOCK:
293 if (g_variant_get_boolean(data)) {
294 sr_info("Enabling external clock.");
295 devc->flag_reg |= FLAG_CLOCK_EXTERNAL;
296 } else {
297 sr_info("Disabled external clock.");
298 devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
299 }
300 ret = SR_OK;
301 break;
302 case SR_CONF_PATTERN_MODE:
303 stropt = g_variant_get_string(data, NULL);
304 ret = SR_OK;
305 flag = 0xffff;
306 if (!strcmp(stropt, STR_PATTERN_NONE)) {
307 sr_info("Disabling test modes.");
308 flag = 0x0000;
309 }else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
310 sr_info("Enabling internal test mode.");
311 flag = FLAG_INTERNAL_TEST_MODE;
312 } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
313 sr_info("Enabling external test mode.");
314 flag = FLAG_EXTERNAL_TEST_MODE;
315 } else {
316 ret = SR_ERR;
317 }
318 if (flag != 0xffff) {
319 devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE);
320 devc->flag_reg |= flag;
321 }
322 break;
323 case SR_CONF_SWAP:
324 if (g_variant_get_boolean(data)) {
325 sr_info("Enabling channel swapping.");
326 devc->flag_reg |= FLAG_SWAP_PROBES;
327 } else {
328 sr_info("Disabling channel swapping.");
329 devc->flag_reg &= ~FLAG_SWAP_PROBES;
330 }
331 ret = SR_OK;
332 break;
333
334 case SR_CONF_RLE:
335 if (g_variant_get_boolean(data)) {
336 sr_info("Enabling RLE.");
337 devc->flag_reg |= FLAG_RLE;
338 } else {
339 sr_info("Disabling RLE.");
340 devc->flag_reg &= ~FLAG_RLE;
341 }
342 ret = SR_OK;
343 break;
344 default:
345 ret = SR_ERR_NA;
346 }
347
348 return ret;
349}
350
351static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
352 const struct sr_channel_group *cg)
353{
354 struct dev_context *devc;
355 GVariant *gvar, *grange[2];
356 GVariantBuilder gvb;
357 int num_channels, i;
358
359 (void)cg;
360
361 switch (key) {
362 case SR_CONF_SCAN_OPTIONS:
363 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
364 hwopts, ARRAY_SIZE(hwopts), sizeof(int32_t));
365 break;
366 case SR_CONF_DEVICE_OPTIONS:
367 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
368 hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
369 break;
370 case SR_CONF_SAMPLERATE:
371 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
372 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
373 ARRAY_SIZE(samplerates), sizeof(uint64_t));
374 g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
375 *data = g_variant_builder_end(&gvb);
376 break;
377 case SR_CONF_TRIGGER_TYPE:
378 *data = g_variant_new_string(TRIGGER_TYPE);
379 break;
380 case SR_CONF_PATTERN_MODE:
381 *data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
382 break;
383 case SR_CONF_LIMIT_SAMPLES:
384 if (!sdi)
385 return SR_ERR_ARG;
386 devc = sdi->priv;
387 if (devc->flag_reg & FLAG_RLE)
388 return SR_ERR_NA;
389 if (devc->max_samples == 0)
390 /* Device didn't specify sample memory size in metadata. */
391 return SR_ERR_NA;
392 /*
393 * Channel groups are turned off if no channels in that group are
394 * enabled, making more room for samples for the enabled group.
395 */
396 ols_configure_channels(sdi);
397 num_channels = 0;
398 for (i = 0; i < 4; i++) {
399 if (devc->channel_mask & (0xff << (i * 8)))
400 num_channels++;
401 }
402 grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
403 grange[1] = g_variant_new_uint64(devc->max_samples / num_channels);
404 *data = g_variant_new_tuple(grange, 2);
405 break;
406 default:
407 return SR_ERR_NA;
408 }
409
410 return SR_OK;
411}
412
413static int set_trigger(const struct sr_dev_inst *sdi, int stage)
414{
415 struct dev_context *devc;
416 struct sr_serial_dev_inst *serial;
417 uint8_t cmd, arg[4];
418
419 devc = sdi->priv;
420 serial = sdi->conn;
421
422 cmd = CMD_SET_TRIGGER_MASK + stage * 4;
423 arg[0] = devc->trigger_mask[stage] & 0xff;
424 arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
425 arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
426 arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
427 if (send_longcommand(serial, cmd, arg) != SR_OK)
428 return SR_ERR;
429
430 cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
431 arg[0] = devc->trigger_value[stage] & 0xff;
432 arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
433 arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
434 arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
435 if (send_longcommand(serial, cmd, arg) != SR_OK)
436 return SR_ERR;
437
438 cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
439 arg[0] = arg[1] = arg[3] = 0x00;
440 arg[2] = stage;
441 if (stage == devc->num_stages)
442 /* Last stage, fire when this one matches. */
443 arg[3] |= TRIGGER_START;
444 if (send_longcommand(serial, cmd, arg) != SR_OK)
445 return SR_ERR;
446
447 return SR_OK;
448}
449
450static int dev_acquisition_start(const struct sr_dev_inst *sdi,
451 void *cb_data)
452{
453 struct dev_context *devc;
454 struct sr_serial_dev_inst *serial;
455 uint16_t samplecount, readcount, delaycount;
456 uint8_t changrp_mask, arg[4];
457 int num_channels;
458 int ret, i;
459
460 if (sdi->status != SR_ST_ACTIVE)
461 return SR_ERR_DEV_CLOSED;
462
463 devc = sdi->priv;
464 serial = sdi->conn;
465
466 if (ols_configure_channels(sdi) != SR_OK) {
467 sr_err("Failed to configure channels.");
468 return SR_ERR;
469 }
470
471 /*
472 * Enable/disable channel groups in the flag register according to the
473 * channel mask. Calculate this here, because num_channels is needed
474 * to limit readcount.
475 */
476 changrp_mask = 0;
477 num_channels = 0;
478 for (i = 0; i < 4; i++) {
479 if (devc->channel_mask & (0xff << (i * 8))) {
480 changrp_mask |= (1 << i);
481 num_channels++;
482 }
483 }
484
485 /*
486 * Limit readcount to prevent reading past the end of the hardware
487 * buffer.
488 */
489 samplecount = MIN(devc->max_samples / num_channels, devc->limit_samples);
490 readcount = samplecount / 4;
491
492 /* Rather read too many samples than too few. */
493 if (samplecount % 4 != 0)
494 readcount++;
495
496 /* Basic triggers. */
497 if (devc->trigger_mask[0] != 0x00000000) {
498 /* At least one channel has a trigger on it. */
499 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
500 devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
501 for (i = 0; i <= devc->num_stages; i++) {
502 sr_dbg("Setting stage %d trigger.", i);
503 if ((ret = set_trigger(sdi, i)) != SR_OK)
504 return ret;
505 }
506 } else {
507 /* No triggers configured, force trigger on first stage. */
508 sr_dbg("Forcing trigger at stage 0.");
509 if ((ret = set_trigger(sdi, 0)) != SR_OK)
510 return ret;
511 delaycount = readcount;
512 }
513
514 /* Samplerate. */
515 sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
516 devc->cur_samplerate, devc->cur_samplerate_divider);
517 arg[0] = devc->cur_samplerate_divider & 0xff;
518 arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
519 arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
520 arg[3] = 0x00;
521 if (send_longcommand(serial, CMD_SET_DIVIDER, arg) != SR_OK)
522 return SR_ERR;
523
524 /* Send sample limit and pre/post-trigger capture ratio. */
525 sr_dbg("Setting sample limit %d, trigger point at %d",
526 (readcount - 1) * 4, (delaycount - 1) * 4);
527 arg[0] = ((readcount - 1) & 0xff);
528 arg[1] = ((readcount - 1) & 0xff00) >> 8;
529 arg[2] = ((delaycount - 1) & 0xff);
530 arg[3] = ((delaycount - 1) & 0xff00) >> 8;
531 if (send_longcommand(serial, CMD_CAPTURE_SIZE, arg) != SR_OK)
532 return SR_ERR;
533
534 /* Flag register. */
535 sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
536 devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
537 devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
538 devc->flag_reg & FLAG_RLE ? "on" : "off",
539 devc->flag_reg & FLAG_FILTER ? "on": "off",
540 devc->flag_reg & FLAG_DEMUX ? "on" : "off");
541 /* 1 means "disable channel". */
542 devc->flag_reg |= ~(changrp_mask << 2) & 0x3c;
543 arg[0] = devc->flag_reg & 0xff;
544 arg[1] = devc->flag_reg >> 8;
545 arg[2] = arg[3] = 0x00;
546 if (send_longcommand(serial, CMD_SET_FLAGS, arg) != SR_OK)
547 return SR_ERR;
548
549 /* Start acquisition on the device. */
550 if (send_shortcommand(serial, CMD_RUN) != SR_OK)
551 return SR_ERR;
552
553 /* Reset all operational states. */
554 devc->rle_count = devc->num_transfers = 0;
555 devc->num_samples = devc->num_bytes = 0;
556 devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
557 memset(devc->sample, 0, 4);
558
559 /* Send header packet to the session bus. */
560 std_session_send_df_header(cb_data, LOG_PREFIX);
561
562 serial_source_add(serial, G_IO_IN, -1, ols_receive_data, cb_data);
563
564 return SR_OK;
565}
566
567static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
568{
569 (void)cb_data;
570
571 abort_acquisition(sdi);
572
573 return SR_OK;
574}
575
576SR_PRIV struct sr_dev_driver ols_driver_info = {
577 .name = "ols",
578 .longname = "Openbench Logic Sniffer",
579 .api_version = 1,
580 .init = init,
581 .cleanup = cleanup,
582 .scan = scan,
583 .dev_list = dev_list,
584 .dev_clear = NULL,
585 .config_get = config_get,
586 .config_set = config_set,
587 .config_list = config_list,
588 .dev_open = std_serial_dev_open,
589 .dev_close = std_serial_dev_close,
590 .dev_acquisition_start = dev_acquisition_start,
591 .dev_acquisition_stop = dev_acquisition_stop,
592 .priv = NULL,
593};