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10763937
SA
1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2014 abraxa (Soeren Apel) <soeren@apelpie.net>
5 * Based on the Hameg HMO driver by poljar (Damir Jelić) <poljarinho@gmail.com>
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
6ec6c43b 21#include <config.h>
10763937 22#include <stdlib.h>
5a1afc09 23#include "scpi.h"
10763937
SA
24#include "protocol.h"
25
dd5c48a6 26static struct sr_dev_driver yokogawa_dlm_driver_info;
8ab929d6 27
329733d9
UH
28static const char *MANUFACTURER_ID = "YOKOGAWA";
29static const char *MANUFACTURER_NAME = "Yokogawa";
8ab929d6 30
f3c60fb6
SA
31static const uint32_t dlm_scanopts[] = {
32 SR_CONF_CONN,
33};
34
35static const uint32_t dlm_drvopts[] = {
cf0280fa
AJ
36 SR_CONF_LOGIC_ANALYZER,
37 SR_CONF_OSCILLOSCOPE,
38};
39
f3c60fb6
SA
40static const uint32_t dlm_devopts[] = {
41 SR_CONF_LIMIT_FRAMES | SR_CONF_GET | SR_CONF_SET,
42 SR_CONF_SAMPLERATE | SR_CONF_GET,
43 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
44 SR_CONF_NUM_HDIV | SR_CONF_GET,
45 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_GET | SR_CONF_SET,
46 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
47 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
48};
49
50static const uint32_t dlm_analog_devopts[] = {
51 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
53 SR_CONF_NUM_VDIV | SR_CONF_GET,
54};
55
56static const uint32_t dlm_digital_devopts[] = {
57};
58
8ab929d6
SA
59enum {
60 CG_INVALID = -1,
61 CG_NONE,
62 CG_ANALOG,
63 CG_DIGITAL,
64};
65
8ab929d6
SA
66static struct sr_dev_inst *probe_usbtmc_device(struct sr_scpi_dev_inst *scpi)
67{
68 struct sr_dev_inst *sdi;
69 struct dev_context *devc;
70 struct sr_scpi_hw_info *hw_info;
71 char *model_name;
72 int model_index;
73
74 sdi = NULL;
75 devc = NULL;
76 hw_info = NULL;
77
78 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
79 sr_info("Couldn't get IDN response.");
80 goto fail;
81 }
82
83 if (strcmp(hw_info->manufacturer, MANUFACTURER_ID) != 0)
84 goto fail;
85
86 if (dlm_model_get(hw_info->model, &model_name, &model_index) != SR_OK)
87 goto fail;
88
aac29cc1 89 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
UH
90 sdi->vendor = g_strdup(MANUFACTURER_NAME);
91 sdi->model = g_strdup(model_name);
92 sdi->version = g_strdup(hw_info->firmware_version);
8ab929d6 93
d1314831
SA
94 sdi->serial_num = g_strdup(hw_info->serial_number);
95
8ab929d6
SA
96 sr_scpi_hw_info_free(hw_info);
97 hw_info = NULL;
98
ac10a927 99 devc = g_malloc0(sizeof(struct dev_context));
8ab929d6 100
4f840ce9 101 sdi->driver = &yokogawa_dlm_driver_info;
8ab929d6
SA
102 sdi->priv = devc;
103 sdi->inst_type = SR_INST_SCPI;
104 sdi->conn = scpi;
105
106 if (dlm_device_init(sdi, model_index) != SR_OK)
107 goto fail;
108
8ab929d6
SA
109 return sdi;
110
111fail:
112 if (hw_info)
113 sr_scpi_hw_info_free(hw_info);
114 if (sdi)
115 sr_dev_inst_free(sdi);
b1f83103 116 g_free(devc);
8ab929d6
SA
117
118 return NULL;
119}
120
4f840ce9 121static GSList *scan(struct sr_dev_driver *di, GSList *options)
8ab929d6 122{
41812aca 123 return sr_scpi_scan(di->context, options, probe_usbtmc_device);
8ab929d6
SA
124}
125
8ab929d6
SA
126static void clear_helper(void *priv)
127{
128 struct dev_context *devc;
129
130 devc = priv;
131
132 dlm_scope_state_destroy(devc->model_state);
133
134 g_free(devc->analog_groups);
135 g_free(devc->digital_groups);
136 g_free(devc);
137}
138
4f840ce9 139static int dev_clear(const struct sr_dev_driver *di)
8ab929d6
SA
140{
141 return std_dev_clear(di, clear_helper);
142}
143
144static int dev_open(struct sr_dev_inst *sdi)
145{
146 if (sdi->status != SR_ST_ACTIVE && sr_scpi_open(sdi->conn) != SR_OK)
147 return SR_ERR;
148
149 if (dlm_scope_state_query(sdi) != SR_OK)
150 return SR_ERR;
151
152 sdi->status = SR_ST_ACTIVE;
153
154 return SR_OK;
155}
156
157static int dev_close(struct sr_dev_inst *sdi)
158{
159 if (sdi->status == SR_ST_INACTIVE)
160 return SR_OK;
161
162 sr_scpi_close(sdi->conn);
163
164 sdi->status = SR_ST_INACTIVE;
165
166 return SR_OK;
167}
168
8ab929d6
SA
169/**
170 * Check which category a given channel group belongs to.
171 *
172 * @param devc Our internal device context.
a9308652 173 * @param cg The channel group to check.
8ab929d6 174 *
a9308652
UH
175 * @retval CG_NONE cg is NULL
176 * @retval CG_ANALOG cg is an analog group
8ab929d6
SA
177 * @retval CG_DIGITAL cg is a digital group
178 * @retval CG_INVALID cg is something else
179 */
180static int check_channel_group(struct dev_context *devc,
ac10a927 181 const struct sr_channel_group *cg)
8ab929d6
SA
182{
183 unsigned int i;
329733d9 184 const struct scope_config *model;
8ab929d6
SA
185
186 model = devc->model_config;
187
188 if (!cg)
189 return CG_NONE;
190
a9308652 191 for (i = 0; i < model->analog_channels; i++)
8ab929d6
SA
192 if (cg == devc->analog_groups[i])
193 return CG_ANALOG;
194
a9308652 195 for (i = 0; i < model->pods; i++)
8ab929d6
SA
196 if (cg == devc->digital_groups[i])
197 return CG_DIGITAL;
198
199 sr_err("Invalid channel group specified.");
200 return CG_INVALID;
201}
202
584560f1 203static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
ac10a927 204 const struct sr_channel_group *cg)
8ab929d6
SA
205{
206 int ret, cg_type;
207 unsigned int i;
208 struct dev_context *devc;
329733d9 209 const struct scope_config *model;
8ab929d6
SA
210 struct scope_state *state;
211
709468ba 212 if (!sdi)
8ab929d6
SA
213 return SR_ERR_ARG;
214
709468ba
UH
215 devc = sdi->priv;
216
8ab929d6
SA
217 if ((cg_type = check_channel_group(devc, cg)) == CG_INVALID)
218 return SR_ERR;
219
8ab929d6
SA
220 model = devc->model_config;
221 state = devc->model_state;
222
223 switch (key) {
bf622e6d 224 case SR_CONF_NUM_HDIV:
8ab929d6
SA
225 *data = g_variant_new_int32(model->num_xdivs);
226 ret = SR_OK;
227 break;
228 case SR_CONF_TIMEBASE:
229 *data = g_variant_new("(tt)",
f3c60fb6
SA
230 dlm_timebases[state->timebase][0],
231 dlm_timebases[state->timebase][1]);
8ab929d6
SA
232 ret = SR_OK;
233 break;
234 case SR_CONF_NUM_VDIV:
235 if (cg_type == CG_NONE) {
236 sr_err("No channel group specified.");
237 return SR_ERR_CHANNEL_GROUP;
238 } else if (cg_type == CG_ANALOG) {
239 *data = g_variant_new_int32(model->num_ydivs);
240 ret = SR_OK;
241 break;
242 } else {
243 ret = SR_ERR_NA;
244 }
245 break;
246 case SR_CONF_VDIV:
247 ret = SR_ERR_NA;
248 if (cg_type == CG_NONE) {
249 sr_err("No channel group specified.");
250 return SR_ERR_CHANNEL_GROUP;
251 } else if (cg_type != CG_ANALOG)
252 break;
253
a9308652 254 for (i = 0; i < model->analog_channels; i++) {
8ab929d6
SA
255 if (cg != devc->analog_groups[i])
256 continue;
257 *data = g_variant_new("(tt)",
f3c60fb6
SA
258 dlm_vdivs[state->analog_states[i].vdiv][0],
259 dlm_vdivs[state->analog_states[i].vdiv][1]);
8ab929d6
SA
260 ret = SR_OK;
261 break;
262 }
263 break;
264 case SR_CONF_TRIGGER_SOURCE:
265 *data = g_variant_new_string((*model->trigger_sources)[state->trigger_source]);
266 ret = SR_OK;
267 break;
268 case SR_CONF_TRIGGER_SLOPE:
f3c60fb6 269 *data = g_variant_new_string(dlm_trigger_slopes[state->trigger_slope]);
8ab929d6
SA
270 ret = SR_OK;
271 break;
272 case SR_CONF_HORIZ_TRIGGERPOS:
273 *data = g_variant_new_double(state->horiz_triggerpos);
274 ret = SR_OK;
275 break;
276 case SR_CONF_COUPLING:
277 ret = SR_ERR_NA;
278 if (cg_type == CG_NONE) {
279 sr_err("No channel group specified.");
280 return SR_ERR_CHANNEL_GROUP;
281 } else if (cg_type != CG_ANALOG)
282 break;
283
a9308652 284 for (i = 0; i < model->analog_channels; i++) {
8ab929d6
SA
285 if (cg != devc->analog_groups[i])
286 continue;
287 *data = g_variant_new_string((*model->coupling_options)[state->analog_states[i].coupling]);
288 ret = SR_OK;
289 break;
290 }
291 break;
292 case SR_CONF_SAMPLERATE:
293 *data = g_variant_new_uint64(state->sample_rate);
294 ret = SR_OK;
295 break;
296 default:
297 ret = SR_ERR_NA;
298 }
299
300 return ret;
301}
302
303static GVariant *build_tuples(const uint64_t (*array)[][2], unsigned int n)
304{
305 unsigned int i;
306 GVariant *rational[2];
307 GVariantBuilder gvb;
308
309 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
310
311 for (i = 0; i < n; i++) {
312 rational[0] = g_variant_new_uint64((*array)[i][0]);
313 rational[1] = g_variant_new_uint64((*array)[i][1]);
314
315 /* FIXME: Valgrind reports a memory leak here. */
316 g_variant_builder_add_value(&gvb, g_variant_new_tuple(rational, 2));
317 }
318
319 return g_variant_builder_end(&gvb);
320}
321
584560f1 322static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
ac10a927 323 const struct sr_channel_group *cg)
8ab929d6
SA
324{
325 int ret, cg_type;
326 unsigned int i, j;
327 char float_str[30];
328 struct dev_context *devc;
329733d9 329 const struct scope_config *model;
8ab929d6
SA
330 struct scope_state *state;
331 const char *tmp;
332 uint64_t p, q;
333 double tmp_d;
334 gboolean update_sample_rate;
335
336 if (!sdi || !(devc = sdi->priv))
337 return SR_ERR_ARG;
338
339 if ((cg_type = check_channel_group(devc, cg)) == CG_INVALID)
340 return SR_ERR;
341
342 model = devc->model_config;
343 state = devc->model_state;
344 update_sample_rate = FALSE;
345
346 ret = SR_ERR_NA;
347
348 switch (key) {
349 case SR_CONF_LIMIT_FRAMES:
350 devc->frame_limit = g_variant_get_uint64(data);
351 ret = SR_OK;
352 break;
353 case SR_CONF_TRIGGER_SOURCE:
354 tmp = g_variant_get_string(data, NULL);
355 for (i = 0; (*model->trigger_sources)[i]; i++) {
356 if (g_strcmp0(tmp, (*model->trigger_sources)[i]) != 0)
357 continue;
358 state->trigger_source = i;
359 /* TODO: A and B trigger support possible? */
360 ret = dlm_trigger_source_set(sdi->conn, (*model->trigger_sources)[i]);
361 break;
362 }
363 break;
364 case SR_CONF_VDIV:
365 if (cg_type == CG_NONE) {
366 sr_err("No channel group specified.");
367 return SR_ERR_CHANNEL_GROUP;
368 }
369
370 g_variant_get(data, "(tt)", &p, &q);
371
f3c60fb6
SA
372 for (i = 0; i < ARRAY_SIZE(dlm_vdivs); i++) {
373 if (p != dlm_vdivs[i][0] ||
374 q != dlm_vdivs[i][1])
8ab929d6 375 continue;
a9308652 376 for (j = 1; j <= model->analog_channels; j++) {
8ab929d6
SA
377 if (cg != devc->analog_groups[j - 1])
378 continue;
379 state->analog_states[j - 1].vdiv = i;
380 g_ascii_formatd(float_str, sizeof(float_str),
381 "%E", (float) p / q);
382 if (dlm_analog_chan_vdiv_set(sdi->conn, j, float_str) != SR_OK ||
ac10a927 383 sr_scpi_get_opc(sdi->conn) != SR_OK)
8ab929d6
SA
384 return SR_ERR;
385
386 break;
387 }
388
389 ret = SR_OK;
390 break;
391 }
392 break;
393 case SR_CONF_TIMEBASE:
394 g_variant_get(data, "(tt)", &p, &q);
395
f3c60fb6
SA
396 for (i = 0; i < ARRAY_SIZE(dlm_timebases); i++) {
397 if (p != dlm_timebases[i][0] ||
398 q != dlm_timebases[i][1])
8ab929d6
SA
399 continue;
400 state->timebase = i;
401 g_ascii_formatd(float_str, sizeof(float_str),
402 "%E", (float) p / q);
403 ret = dlm_timebase_set(sdi->conn, float_str);
404 update_sample_rate = TRUE;
405 break;
406 }
407 break;
408 case SR_CONF_HORIZ_TRIGGERPOS:
409 tmp_d = g_variant_get_double(data);
410
411 /* TODO: Check if the calculation makes sense for the DLM. */
412 if (tmp_d < 0.0 || tmp_d > 1.0)
413 return SR_ERR;
414
415 state->horiz_triggerpos = tmp_d;
416 tmp_d = -(tmp_d - 0.5) *
f3c60fb6
SA
417 ((double) dlm_timebases[state->timebase][0] /
418 dlm_timebases[state->timebase][1])
ac10a927 419 * model->num_xdivs;
8ab929d6
SA
420
421 g_ascii_formatd(float_str, sizeof(float_str), "%E", tmp_d);
422 ret = dlm_horiz_trigger_pos_set(sdi->conn, float_str);
423 break;
424 case SR_CONF_TRIGGER_SLOPE:
425 tmp = g_variant_get_string(data, NULL);
426
427 if (!tmp || !(tmp[0] == 'f' || tmp[0] == 'r'))
428 return SR_ERR_ARG;
429
430 /* Note: See dlm_trigger_slopes[] in protocol.c. */
431 state->trigger_slope = (tmp[0] == 'r') ?
432 SLOPE_POSITIVE : SLOPE_NEGATIVE;
433
434 ret = dlm_trigger_slope_set(sdi->conn, state->trigger_slope);
435 break;
436 case SR_CONF_COUPLING:
437 if (cg_type == CG_NONE) {
438 sr_err("No channel group specified.");
439 return SR_ERR_CHANNEL_GROUP;
440 }
441
442 tmp = g_variant_get_string(data, NULL);
443
444 for (i = 0; (*model->coupling_options)[i]; i++) {
445 if (strcmp(tmp, (*model->coupling_options)[i]) != 0)
446 continue;
a9308652 447 for (j = 1; j <= model->analog_channels; j++) {
8ab929d6
SA
448 if (cg != devc->analog_groups[j - 1])
449 continue;
450 state->analog_states[j-1].coupling = i;
451
452 if (dlm_analog_chan_coupl_set(sdi->conn, j, tmp) != SR_OK ||
ac10a927 453 sr_scpi_get_opc(sdi->conn) != SR_OK)
8ab929d6
SA
454 return SR_ERR;
455 break;
456 }
457
458 ret = SR_OK;
459 break;
460 }
461 break;
462 default:
463 ret = SR_ERR_NA;
464 break;
465 }
466
467 if (ret == SR_OK)
468 ret = sr_scpi_get_opc(sdi->conn);
469
470 if (ret == SR_OK && update_sample_rate)
471 ret = dlm_sample_rate_query(sdi);
472
473 return ret;
474}
475
c65a021c
SA
476static int config_channel_set(const struct sr_dev_inst *sdi,
477 struct sr_channel *ch, unsigned int changes)
478{
a9308652 479 /* Currently we only handle SR_CHANNEL_SET_ENABLED. */
c65a021c
SA
480 if (changes != SR_CHANNEL_SET_ENABLED)
481 return SR_ERR_NA;
482
483 return dlm_channel_state_set(sdi, ch->index, ch->enabled);
484}
485
584560f1 486static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
ac10a927 487 const struct sr_channel_group *cg)
8ab929d6 488{
cf0280fa
AJ
489 int cg_type = CG_NONE;
490 struct dev_context *devc = NULL;
329733d9 491 const struct scope_config *model = NULL;
8ab929d6 492
f3c60fb6
SA
493 /* SR_CONF_SCAN_OPTIONS is always valid, regardless of sdi or probe group. */
494 if (key == SR_CONF_SCAN_OPTIONS) {
495 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
496 dlm_scanopts, ARRAY_SIZE(dlm_scanopts), sizeof(uint32_t));
497 return SR_OK;
498 }
8ab929d6 499
f3c60fb6
SA
500 /* If sdi is NULL, nothing except SR_CONF_DEVICE_OPTIONS can be provided. */
501 if (key == SR_CONF_DEVICE_OPTIONS && !sdi) {
502 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
503 dlm_drvopts, ARRAY_SIZE(dlm_drvopts), sizeof(uint32_t));
504 return SR_OK;
cf0280fa 505 }
8ab929d6 506
f3c60fb6
SA
507 if (!sdi)
508 return SR_ERR_ARG;
509
510 devc = sdi->priv;
511 model = devc->model_config;
512
a9308652
UH
513 /*
514 * If cg is NULL, only the SR_CONF_DEVICE_OPTIONS that are not
515 * specific to a probe group must be returned.
516 */
f3c60fb6
SA
517 if (!cg) {
518 switch (key) {
519 case SR_CONF_DEVICE_OPTIONS:
520 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
521 dlm_devopts, ARRAY_SIZE(dlm_devopts), sizeof(uint32_t));
522 return SR_OK;
523 case SR_CONF_TIMEBASE:
524 *data = build_tuples(&dlm_timebases, ARRAY_SIZE(dlm_timebases));
525 return SR_OK;
526 case SR_CONF_TRIGGER_SOURCE:
527 if (!model)
528 return SR_ERR_ARG;
529 *data = g_variant_new_strv(*model->trigger_sources,
530 g_strv_length((char **)*model->trigger_sources));
531 return SR_OK;
532 case SR_CONF_TRIGGER_SLOPE:
533 *data = g_variant_new_strv(dlm_trigger_slopes,
534 g_strv_length((char **)dlm_trigger_slopes));
535 return SR_OK;
536 case SR_CONF_NUM_HDIV:
49f49cb5 537 *data = g_variant_new_uint32(model->num_xdivs);
f3c60fb6
SA
538 return SR_OK;
539 default:
540 return SR_ERR_NA;
541 }
542 }
543
544 if ((cg_type = check_channel_group(devc, cg)) == CG_INVALID)
545 return SR_ERR;
546
8ab929d6 547 switch (key) {
8ab929d6 548 case SR_CONF_DEVICE_OPTIONS:
f3c60fb6 549 if (cg_type == CG_ANALOG) {
584560f1 550 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
f3c60fb6
SA
551 dlm_analog_devopts, ARRAY_SIZE(dlm_analog_devopts), sizeof(uint32_t));
552 } else if (cg_type == CG_DIGITAL) {
553 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
554 dlm_digital_devopts, ARRAY_SIZE(dlm_digital_devopts), sizeof(uint32_t));
8ab929d6 555 } else {
584560f1
BV
556 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
557 NULL, 0, sizeof(uint32_t));
8ab929d6
SA
558 }
559 break;
560 case SR_CONF_COUPLING:
561 if (cg_type == CG_NONE)
562 return SR_ERR_CHANNEL_GROUP;
563 *data = g_variant_new_strv(*model->coupling_options,
ac10a927 564 g_strv_length((char **)*model->coupling_options));
8ab929d6 565 break;
8ab929d6
SA
566 case SR_CONF_VDIV:
567 if (cg_type == CG_NONE)
568 return SR_ERR_CHANNEL_GROUP;
f3c60fb6 569 *data = build_tuples(&dlm_vdivs, ARRAY_SIZE(dlm_vdivs));
8ab929d6
SA
570 break;
571 default:
572 return SR_ERR_NA;
573 }
574
575 return SR_OK;
576}
577
578static int dlm_check_channels(GSList *channels)
579{
580 GSList *l;
581 struct sr_channel *ch;
582 gboolean enabled_pod1, enabled_chan4;
583
584 enabled_pod1 = enabled_chan4 = FALSE;
585
586 /* Note: On the DLM2000, CH4 and Logic are shared. */
587 /* TODO Handle non-DLM2000 models. */
588 for (l = channels; l; l = l->next) {
589 ch = l->data;
590 switch (ch->type) {
591 case SR_CHANNEL_ANALOG:
592 if (ch->index == 3)
593 enabled_chan4 = TRUE;
594 break;
595 case SR_CHANNEL_LOGIC:
596 enabled_pod1 = TRUE;
597 break;
598 default:
599 return SR_ERR;
600 }
601 }
602
603 if (enabled_pod1 && enabled_chan4)
604 return SR_ERR;
605
606 return SR_OK;
607}
608
695dc859 609static int dev_acquisition_start(const struct sr_dev_inst *sdi)
8ab929d6
SA
610{
611 GSList *l;
612 gboolean digital_added;
613 struct sr_channel *ch;
614 struct dev_context *devc;
615 struct sr_scpi_dev_inst *scpi;
616
ac10a927
SA
617 if (sdi->status != SR_ST_ACTIVE)
618 return SR_ERR_DEV_CLOSED;
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619
620 scpi = sdi->conn;
621 devc = sdi->priv;
622 digital_added = FALSE;
623
624 g_slist_free(devc->enabled_channels);
625 devc->enabled_channels = NULL;
626
627 for (l = sdi->channels; l; l = l->next) {
628 ch = l->data;
629 if (!ch->enabled)
630 continue;
631 /* Only add a single digital channel. */
632 if (ch->type != SR_CHANNEL_LOGIC || !digital_added) {
633 devc->enabled_channels = g_slist_append(
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634 devc->enabled_channels, ch);
635 if (ch->type == SR_CHANNEL_LOGIC)
636 digital_added = TRUE;
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637 }
638 }
639
640 if (!devc->enabled_channels)
641 return SR_ERR;
642
643 if (dlm_check_channels(devc->enabled_channels) != SR_OK) {
644 sr_err("Invalid channel configuration specified!");
645 return SR_ERR_NA;
646 }
647
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648 /* Request data for the first enabled channel. */
649 devc->current_channel = devc->enabled_channels;
650 dlm_channel_data_request(sdi);
651
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652 /* Call our callback when data comes in or after 5ms. */
653 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 5,
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654 dlm_data_receive, (void *)sdi);
655
656 return SR_OK;
657}
658
695dc859 659static int dev_acquisition_stop(struct sr_dev_inst *sdi)
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660{
661 struct dev_context *devc;
8ab929d6 662
3be42bc2 663 std_session_send_df_end(sdi, LOG_PREFIX);
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664
665 if (sdi->status != SR_ST_ACTIVE)
666 return SR_ERR_DEV_CLOSED;
667
668 devc = sdi->priv;
669
670 devc->num_frames = 0;
671 g_slist_free(devc->enabled_channels);
672 devc->enabled_channels = NULL;
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673
674 sr_scpi_source_remove(sdi->session, sdi->conn);
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675
676 return SR_OK;
677}
10763937 678
dd5c48a6 679static struct sr_dev_driver yokogawa_dlm_driver_info = {
10763937 680 .name = "yokogawa-dlm",
ac10a927 681 .longname = "Yokogawa DL/DLM",
10763937 682 .api_version = 1,
c2fdcc25 683 .init = std_init,
700d6b64 684 .cleanup = std_cleanup,
8ab929d6 685 .scan = scan,
c01bf34c 686 .dev_list = std_dev_list,
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687 .dev_clear = dev_clear,
688 .config_get = config_get,
689 .config_set = config_set,
c65a021c 690 .config_channel_set = config_channel_set,
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691 .config_list = config_list,
692 .dev_open = dev_open,
693 .dev_close = dev_close,
694 .dev_acquisition_start = dev_acquisition_start,
695 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 696 .context = NULL,
10763937 697};
dd5c48a6 698SR_REGISTER_DEV_DRIVER(yokogawa_dlm_driver_info);