]> sigrok.org Git - libsigrok.git/blame - src/hardware/sysclk-lwla/api.c
drivers: Eliminate some unnecessary vendor/model #defines.
[libsigrok.git] / src / hardware / sysclk-lwla / api.c
CommitLineData
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2014 Daniel Elstner <daniel.kitta@gmail.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
6ec6c43b 20#include <config.h>
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21#include <glib.h>
22#include <libusb.h>
23#include <stdlib.h>
24#include <string.h>
c1aae900 25#include <libsigrok/libsigrok.h>
407b6e2c 26#include <libsigrok-internal.h>
515ab088 27#include "protocol.h"
5874e88d 28
a0e0bb41 29static const uint32_t scanopts[] = {
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30 SR_CONF_CONN,
31};
32
be64f90b 33static const uint32_t drvopts[] = {
5874e88d 34 SR_CONF_LOGIC_ANALYZER,
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35};
36
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37static const int32_t trigger_matches[] = {
38 SR_TRIGGER_ZERO,
39 SR_TRIGGER_ONE,
40 SR_TRIGGER_RISING,
41 SR_TRIGGER_FALLING,
42};
43
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44static const char *const trigger_source_names[] = {
45 [TRIGGER_CHANNELS] = "CH",
46 [TRIGGER_EXT_TRG] = "TRG",
5874e88d 47};
aeaad0b0 48
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49static const char *const signal_edge_names[] = {
50 [EDGE_POSITIVE] = "r",
51 [EDGE_NEGATIVE] = "f",
52};
e6e54bd2 53
be64f90b 54static struct sr_dev_inst *dev_inst_new(const struct model_info *model)
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55{
56 struct sr_dev_inst *sdi;
57 struct dev_context *devc;
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58 int i;
59 char name[8];
43db3436 60
f57d8ffe 61 devc = g_malloc0(sizeof(struct dev_context));
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62 devc->model = model;
63 devc->active_fpga_config = FPGA_NOCONF;
64 devc->cfg_rle = TRUE;
65 devc->samplerate = model->samplerates[0];
66 devc->channel_mask = (UINT64_C(1) << model->num_channels) - 1;
43db3436 67
aac29cc1 68 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be 69 sdi->status = SR_ST_INACTIVE;
b15ff1c9 70 sdi->vendor = g_strdup("SysClk");
be64f90b 71 sdi->model = g_strdup(model->name);
43db3436 72 sdi->priv = devc;
be64f90b 73
be64f90b 74 for (i = 0; i < model->num_channels; i++) {
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75 g_snprintf(name, sizeof(name), "CH%d", i + 1);
76 sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, name);
5e23fcab 77 }
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78
79 return sdi;
80}
81
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82/* Create a new device instance for a libusb device if it is a SysClk LWLA
83 * device and also matches the connection specification.
84 */
85static struct sr_dev_inst *dev_inst_new_matching(GSList *conn_matches,
86 libusb_device *dev)
87{
88 GSList *node;
89 struct sr_usb_dev_inst *usb;
90 const struct model_info *model;
91 struct sr_dev_inst *sdi;
92 struct libusb_device_descriptor des;
d64b5f43 93 int bus, address, ret;
be64f90b 94 unsigned int vid, pid;
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95
96 bus = libusb_get_bus_number(dev);
97 address = libusb_get_device_address(dev);
98
99 for (node = conn_matches; node != NULL; node = node->next) {
100 usb = node->data;
101 if (usb && usb->bus == bus && usb->address == address)
102 break; /* found */
103 }
104 if (conn_matches && !node)
105 return NULL; /* no match */
106
107 ret = libusb_get_device_descriptor(dev, &des);
108 if (ret != 0) {
109 sr_err("Failed to get USB device descriptor: %s.",
110 libusb_error_name(ret));
111 return NULL;
112 }
113 vid = des.idVendor;
114 pid = des.idProduct;
115
116 /* Create sigrok device instance. */
117 if (vid == USB_VID_SYSCLK && pid == USB_PID_LWLA1016) {
118 model = &lwla1016_info;
119 } else if (vid == USB_VID_SYSCLK && pid == USB_PID_LWLA1034) {
120 model = &lwla1034_info;
121 } else {
122 if (conn_matches)
123 sr_warn("USB device %d.%d (%04x:%04x) is not a"
124 " SysClk LWLA.", bus, address, vid, pid);
125 return NULL;
126 }
127 sdi = dev_inst_new(model);
128
129 sdi->inst_type = SR_INST_USB;
130 sdi->conn = sr_usb_dev_inst_new(bus, address, NULL);
131
132 return sdi;
133}
134
4f840ce9 135static GSList *scan(struct sr_dev_driver *di, GSList *options)
aeaad0b0 136{
be64f90b 137 GSList *conn_devices, *devices, *node;
aeaad0b0 138 struct drv_context *drvc;
5874e88d 139 struct sr_dev_inst *sdi;
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140 struct sr_config *src;
141 const char *conn;
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142 libusb_device **devlist;
143 ssize_t num_devs, i;
aeaad0b0 144
41812aca 145 drvc = di->context;
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146 conn = NULL;
147 conn_devices = NULL;
148 devices = NULL;
5874e88d 149
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150 for (node = options; node != NULL; node = node->next) {
151 src = node->data;
152 if (src->key == SR_CONF_CONN) {
153 conn = g_variant_get_string(src->data, NULL);
154 break;
155 }
156 }
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157 if (conn) {
158 /* Find devices matching the connection specification. */
159 conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn);
160 }
5874e88d 161
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162 /* List all libusb devices. */
163 num_devs = libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
164 if (num_devs < 0) {
165 sr_err("Failed to list USB devices: %s.",
166 libusb_error_name(num_devs));
167 g_slist_free_full(conn_devices,
168 (GDestroyNotify)&sr_usb_dev_inst_free);
169 return NULL;
170 }
5874e88d 171
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172 /* Scan the USB device list for matching LWLA devices. */
173 for (i = 0; i < num_devs; i++) {
174 sdi = dev_inst_new_matching(conn_devices, devlist[i]);
175 if (!sdi)
176 continue; /* no match */
5874e88d 177
43db3436 178 /* Register device instance with driver. */
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179 devices = g_slist_append(devices, sdi);
180 }
aeaad0b0 181
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182 libusb_free_device_list(devlist, 1);
183 g_slist_free_full(conn_devices, (GDestroyNotify)&sr_usb_dev_inst_free);
aeaad0b0 184
15a5bfe4 185 return std_scan_complete(di, devices);
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186}
187
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188/* Drain any pending data from the USB transfer buffers on the device.
189 * This may be necessary e.g. after a crash or generally to clean up after
190 * an abnormal condition.
191 */
192static int drain_usb(struct sr_usb_dev_inst *usb, unsigned int endpoint)
193{
d64b5f43 194 int drained, xfer_len, ret;
93ed0241 195 unsigned char buf[512];
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196 const unsigned int drain_timeout_ms = 10;
197
198 drained = 0;
199 do {
200 xfer_len = 0;
201 ret = libusb_bulk_transfer(usb->devhdl, endpoint,
b3cfc6e9 202 buf, sizeof(buf), &xfer_len,
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203 drain_timeout_ms);
204 drained += xfer_len;
205 } while (ret == LIBUSB_SUCCESS && xfer_len != 0);
206
207 if (ret != LIBUSB_SUCCESS && ret != LIBUSB_ERROR_TIMEOUT) {
208 sr_err("Failed to drain USB endpoint %u: %s.",
209 endpoint & (LIBUSB_ENDPOINT_IN - 1),
210 libusb_error_name(ret));
211 return SR_ERR;
212 }
213 if (drained > 0) {
214 sr_warn("Drained %d bytes from USB endpoint %u.",
215 drained, endpoint & (LIBUSB_ENDPOINT_IN - 1));
216 }
d64b5f43 217
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218 return SR_OK;
219}
220
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221static int dev_open(struct sr_dev_inst *sdi)
222{
5874e88d 223 struct drv_context *drvc;
be64f90b 224 struct dev_context *devc;
5874e88d 225 struct sr_usb_dev_inst *usb;
d64b5f43 226 int i, ret;
aeaad0b0 227
ce19d4c6 228 drvc = sdi->driver->context;
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229 devc = sdi->priv;
230 usb = sdi->conn;
aeaad0b0 231
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232 /* Try the whole shebang three times, fingers crossed. */
233 for (i = 0; i < 3; i++) {
234 ret = sr_usb_open(drvc->sr_ctx->libusb_ctx, usb);
235 if (ret != SR_OK)
236 return ret;
237
238 ret = libusb_set_configuration(usb->devhdl, USB_CONFIG);
239 if (ret != LIBUSB_SUCCESS) {
240 sr_err("Failed to set USB configuration: %s.",
241 libusb_error_name(ret));
242 sr_usb_close(usb);
243 return SR_ERR;
244 }
ad6181e2 245
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246 ret = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
247 if (ret != LIBUSB_SUCCESS) {
248 sr_err("Failed to claim interface: %s.",
249 libusb_error_name(ret));
250 sr_usb_close(usb);
251 return SR_ERR;
252 }
be64f90b 253
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254 ret = drain_usb(usb, EP_REPLY);
255 if (ret != SR_OK) {
256 sr_usb_close(usb);
257 return ret;
258 }
259 /* This delay appears to be necessary for reliable operation. */
260 g_usleep(30 * 1000);
93ed0241 261
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262 devc->active_fpga_config = FPGA_NOCONF;
263 devc->short_transfer_quirk = FALSE;
264 devc->state = STATE_IDLE;
be64f90b 265
e35a4592 266 ret = (*devc->model->apply_fpga_config)(sdi);
be64f90b 267
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268 if (ret == SR_OK)
269 ret = (*devc->model->device_init_check)(sdi);
270 if (ret == SR_OK)
271 break;
be64f90b 272
e35a4592 273 /* Rinse and repeat. */
be64f90b 274 sr_usb_close(usb);
c81069b3 275 }
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276
277 if (ret == SR_OK && devc->short_transfer_quirk)
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278 sr_warn("Short transfer quirk detected! "
279 "Memory reads will be slow.");
e35a4592 280 return ret;
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281}
282
283static int dev_close(struct sr_dev_inst *sdi)
284{
c81069b3 285 struct dev_context *devc;
be64f90b 286 struct sr_usb_dev_inst *usb;
c81069b3 287 int ret;
5874e88d 288
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289 devc = sdi->priv;
290 usb = sdi->conn;
291
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292 if (devc->acquisition) {
293 sr_err("Cannot close device during acquisition!");
294 /* Request stop, leak handle, and prepare for the worst. */
295 devc->cancel_requested = TRUE;
296 return SR_ERR_BUG;
297 }
298
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299 /* Download of the shutdown bitstream, if any. */
300 ret = (*devc->model->apply_fpga_config)(sdi);
c81069b3 301 if (ret != SR_OK)
be64f90b 302 sr_warn("Unable to shut down device.");
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303
304 libusb_release_interface(usb->devhdl, USB_INTERFACE);
f1ba6b4b 305
c81069b3 306 sr_usb_close(usb);
5874e88d 307
f1ba6b4b 308 return SR_OK;
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309}
310
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311/* Check whether the device options contain a specific key.
312 * Also match against get/set/list bits if specified.
313 */
314static int has_devopt(const struct model_info *model, uint32_t key)
aeaad0b0 315{
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316 unsigned int i;
317
318 for (i = 0; i < model->num_devopts; i++) {
319 if ((model->devopts[i] & (SR_CONF_MASK | key)) == key)
320 return TRUE;
321 }
d64b5f43 322
be64f90b 323 return FALSE;
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324}
325
584560f1 326static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 327 const struct sr_channel_group *cg)
aeaad0b0 328{
5874e88d 329 struct dev_context *devc;
7ed80817 330 unsigned int idx;
aeaad0b0 331
53b4680f 332 (void)cg;
aeaad0b0 333
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334 if (!sdi)
335 return SR_ERR_ARG;
336
337 devc = sdi->priv;
338
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339 if (!has_devopt(devc->model, key | SR_CONF_GET))
340 return SR_ERR_NA;
341
aeaad0b0 342 switch (key) {
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343 case SR_CONF_SAMPLERATE:
344 *data = g_variant_new_uint64(devc->samplerate);
345 break;
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346 case SR_CONF_LIMIT_MSEC:
347 *data = g_variant_new_uint64(devc->limit_msec);
348 break;
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349 case SR_CONF_LIMIT_SAMPLES:
350 *data = g_variant_new_uint64(devc->limit_samples);
351 break;
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352 case SR_CONF_RLE:
353 *data = g_variant_new_boolean(devc->cfg_rle);
354 break;
5874e88d 355 case SR_CONF_EXTERNAL_CLOCK:
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356 *data = g_variant_new_boolean(devc->cfg_clock_source
357 == CLOCK_EXT_CLK);
358 break;
359 case SR_CONF_CLOCK_EDGE:
360 idx = devc->cfg_clock_edge;
ce3ecb70 361 if (idx >= ARRAY_SIZE(signal_edge_names))
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362 return SR_ERR_BUG;
363 *data = g_variant_new_string(signal_edge_names[idx]);
5874e88d 364 break;
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365 case SR_CONF_TRIGGER_SOURCE:
366 idx = devc->cfg_trigger_source;
ce3ecb70 367 if (idx >= ARRAY_SIZE(trigger_source_names))
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368 return SR_ERR_BUG;
369 *data = g_variant_new_string(trigger_source_names[idx]);
370 break;
371 case SR_CONF_TRIGGER_SLOPE:
372 idx = devc->cfg_trigger_slope;
ce3ecb70 373 if (idx >= ARRAY_SIZE(signal_edge_names))
e6e54bd2 374 return SR_ERR_BUG;
6358f0a9 375 *data = g_variant_new_string(signal_edge_names[idx]);
e6e54bd2 376 break;
aeaad0b0 377 default:
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378 /* Must not happen for a key listed in devopts. */
379 return SR_ERR_BUG;
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380 }
381
5874e88d 382 return SR_OK;
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383}
384
e6e54bd2
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385/* Helper for mapping a string-typed configuration value to an index
386 * within a table of possible values.
387 */
388static int lookup_index(GVariant *value, const char *const *table, int len)
389{
390 const char *entry;
391 int i;
392
393 entry = g_variant_get_string(value, NULL);
394 if (!entry)
395 return -1;
396
397 /* Linear search is fine for very small tables. */
0a1f7b09 398 for (i = 0; i < len; i++) {
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399 if (strcmp(entry, table[i]) == 0)
400 return i;
401 }
d64b5f43 402
e6e54bd2
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403 return -1;
404}
405
584560f1 406static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
53b4680f 407 const struct sr_channel_group *cg)
aeaad0b0 408{
29d58767 409 uint64_t value;
5874e88d 410 struct dev_context *devc;
e6e54bd2 411 int idx;
aeaad0b0 412
53b4680f 413 (void)cg;
aeaad0b0 414
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415 if (!sdi)
416 return SR_ERR_ARG;
417
5874e88d 418 devc = sdi->priv;
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419
420 if (!has_devopt(devc->model, key | SR_CONF_SET))
421 return SR_ERR_NA;
aeaad0b0 422
aeaad0b0 423 switch (key) {
5874e88d 424 case SR_CONF_SAMPLERATE:
29d58767 425 value = g_variant_get_uint64(data);
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426 if (value < devc->model->samplerates[devc->model->num_samplerates - 1]
427 || value > devc->model->samplerates[0])
5874e88d 428 return SR_ERR_SAMPLERATE;
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429 devc->samplerate = value;
430 break;
431 case SR_CONF_LIMIT_MSEC:
432 value = g_variant_get_uint64(data);
433 if (value > MAX_LIMIT_MSEC)
434 return SR_ERR_ARG;
435 devc->limit_msec = value;
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436 break;
437 case SR_CONF_LIMIT_SAMPLES:
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438 value = g_variant_get_uint64(data);
439 if (value > MAX_LIMIT_SAMPLES)
440 return SR_ERR_ARG;
441 devc->limit_samples = value;
5874e88d 442 break;
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443 case SR_CONF_RLE:
444 devc->cfg_rle = g_variant_get_boolean(data);
445 break;
5874e88d 446 case SR_CONF_EXTERNAL_CLOCK:
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447 devc->cfg_clock_source = (g_variant_get_boolean(data))
448 ? CLOCK_EXT_CLK : CLOCK_INTERNAL;
449 break;
450 case SR_CONF_CLOCK_EDGE:
53012da6 451 idx = lookup_index(data, ARRAY_AND_SIZE(signal_edge_names));
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452 if (idx < 0)
453 return SR_ERR_ARG;
454 devc->cfg_clock_edge = idx;
5874e88d 455 break;
e6e54bd2 456 case SR_CONF_TRIGGER_SOURCE:
53012da6 457 idx = lookup_index(data, ARRAY_AND_SIZE(trigger_source_names));
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458 if (idx < 0)
459 return SR_ERR_ARG;
460 devc->cfg_trigger_source = idx;
461 break;
462 case SR_CONF_TRIGGER_SLOPE:
53012da6 463 idx = lookup_index(data, ARRAY_AND_SIZE(signal_edge_names));
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464 if (idx < 0)
465 return SR_ERR_ARG;
466 devc->cfg_trigger_slope = idx;
467 break;
aeaad0b0 468 default:
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469 /* Must not happen for a key listed in devopts. */
470 return SR_ERR_BUG;
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471 }
472
5874e88d 473 return SR_OK;
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474}
475
f3ca73ed 476static int config_channel_set(const struct sr_dev_inst *sdi,
be64f90b 477 struct sr_channel *ch, unsigned int changes)
43db3436 478{
ba7dd8bb 479 uint64_t channel_bit;
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480 struct dev_context *devc;
481
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482 if (!sdi)
483 return SR_ERR_ARG;
484
43db3436 485 devc = sdi->priv;
43db3436 486
be64f90b 487 if (ch->index < 0 || ch->index >= devc->model->num_channels) {
ba7dd8bb 488 sr_err("Channel index %d out of range.", ch->index);
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489 return SR_ERR_BUG;
490 }
43db3436 491
3f239f08 492 if ((changes & SR_CHANNEL_SET_ENABLED) != 0) {
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493 channel_bit = UINT64_C(1) << ch->index;
494
495 /* Enable or disable logic input for this channel. */
ba7dd8bb
UH
496 if (ch->enabled)
497 devc->channel_mask |= channel_bit;
43db3436 498 else
ba7dd8bb 499 devc->channel_mask &= ~channel_bit;
43db3436
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500 }
501
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502 return SR_OK;
503}
504
ca314e06 505/* Derive trigger masks from the session's trigger configuration. */
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506static int prepare_trigger_masks(const struct sr_dev_inst *sdi)
507{
d64b5f43 508 uint64_t trigger_mask, trigger_values, trigger_edge_mask;
09ffac33 509 uint64_t level_bit, type_bit;
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510 struct dev_context *devc;
511 struct sr_trigger *trigger;
512 struct sr_trigger_stage *stage;
513 struct sr_trigger_match *match;
514 const GSList *node;
be64f90b 515 int idx;
09ffac33 516 enum sr_trigger_matches trg;
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517
518 devc = sdi->priv;
519
520 trigger = sr_session_trigger_get(sdi->session);
521 if (!trigger || !trigger->stages)
522 return SR_OK;
523
524 if (trigger->stages->next) {
525 sr_err("This device only supports 1 trigger stage.");
526 return SR_ERR_ARG;
527 }
528 stage = trigger->stages->data;
529
530 trigger_mask = 0;
531 trigger_values = 0;
532 trigger_edge_mask = 0;
533
534 for (node = stage->matches; node; node = node->next) {
535 match = node->data;
536
537 if (!match->channel->enabled)
d64b5f43 538 continue; /* Ignore disabled channel. */
225d3cb0 539
be64f90b 540 idx = match->channel->index;
09ffac33 541 trg = match->match;
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542
543 if (idx < 0 || idx >= devc->model->num_channels) {
544 sr_err("Channel index %d out of range.", idx);
d64b5f43 545 return SR_ERR_BUG; /* Should not happen. */
be64f90b 546 }
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547 if (trg != SR_TRIGGER_ZERO
548 && trg != SR_TRIGGER_ONE
549 && trg != SR_TRIGGER_RISING
550 && trg != SR_TRIGGER_FALLING) {
be64f90b 551 sr_err("Unsupported trigger match for CH%d.", idx + 1);
225d3cb0
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552 return SR_ERR_ARG;
553 }
09ffac33
DE
554 level_bit = (trg == SR_TRIGGER_ONE
555 || trg == SR_TRIGGER_RISING) ? 1 : 0;
556 type_bit = (trg == SR_TRIGGER_RISING
557 || trg == SR_TRIGGER_FALLING) ? 1 : 0;
558
559 trigger_mask |= UINT64_C(1) << idx;
560 trigger_values |= level_bit << idx;
561 trigger_edge_mask |= type_bit << idx;
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562 }
563 devc->trigger_mask = trigger_mask;
564 devc->trigger_values = trigger_values;
565 devc->trigger_edge_mask = trigger_edge_mask;
566
567 return SR_OK;
568}
569
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570static int config_commit(const struct sr_dev_inst *sdi)
571{
225d3cb0 572 struct dev_context *devc;
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573 int ret;
574
575 devc = sdi->priv;
225d3cb0 576
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577 if (devc->acquisition) {
578 sr_err("Acquisition still in progress?");
ee38c8ba
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579 return SR_ERR;
580 }
581
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582 ret = prepare_trigger_masks(sdi);
583 if (ret != SR_OK)
584 return ret;
585
586 ret = (*devc->model->apply_fpga_config)(sdi);
587 if (ret != SR_OK) {
588 sr_err("Failed to apply FPGA configuration.");
589 return ret;
590 }
591
592 return SR_OK;
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593}
594
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595static int config_list(uint32_t key, GVariant **data,
596 const struct sr_dev_inst *sdi,
53b4680f 597 const struct sr_channel_group *cg)
aeaad0b0 598{
be64f90b 599 struct dev_context *devc;
aeaad0b0 600
e66d1892 601 devc = (sdi) ? sdi->priv : NULL;
aeaad0b0 602
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603 switch (key) {
604 case SR_CONF_SCAN_OPTIONS:
605 case SR_CONF_DEVICE_OPTIONS:
606 return std_opts_config_list(key, data, sdi, cg,
53012da6 607 ARRAY_AND_SIZE(scanopts), ARRAY_AND_SIZE(drvopts),
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608 (devc) ? devc->model->devopts : NULL,
609 (devc) ? devc->model->num_devopts : 0);
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610 }
611
612 if (!has_devopt(devc->model, key | SR_CONF_LIST))
613 return SR_ERR_NA;
614
615 switch (key) {
5874e88d 616 case SR_CONF_SAMPLERATE:
463160cb 617 *data = std_gvar_samplerates(devc->model->samplerates, devc->model->num_samplerates);
5874e88d 618 break;
bbe7e48a 619 case SR_CONF_TRIGGER_MATCH:
53012da6 620 *data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches));
5874e88d 621 break;
e6e54bd2 622 case SR_CONF_TRIGGER_SOURCE:
53012da6 623 *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_source_names));
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624 break;
625 case SR_CONF_TRIGGER_SLOPE:
6358f0a9 626 case SR_CONF_CLOCK_EDGE:
53012da6 627 *data = g_variant_new_strv(ARRAY_AND_SIZE(signal_edge_names));
e6e54bd2 628 break;
aeaad0b0 629 default:
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630 /* Must not happen for a key listed in devopts. */
631 return SR_ERR_BUG;
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632 }
633
5874e88d 634 return SR_OK;
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635}
636
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637/* Set up the device hardware to begin capturing samples as soon as the
638 * configured trigger conditions are met, or immediately if no triggers
639 * are configured.
640 */
695dc859 641static int dev_acquisition_start(const struct sr_dev_inst *sdi)
5874e88d 642{
be64f90b 643 return lwla_start_acquisition(sdi);
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644}
645
695dc859 646static int dev_acquisition_stop(struct sr_dev_inst *sdi)
aeaad0b0 647{
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648 struct dev_context *devc;
649
c81069b3 650 devc = sdi->priv;
aeaad0b0 651
be64f90b 652 if (devc->state != STATE_IDLE && !devc->cancel_requested) {
c81069b3 653 devc->cancel_requested = TRUE;
d2f7c417 654 sr_dbg("Requesting cancel.");
c81069b3 655 }
d64b5f43 656
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657 return SR_OK;
658}
659
dd5c48a6 660static struct sr_dev_driver sysclk_lwla_driver_info = {
aeaad0b0 661 .name = "sysclk-lwla",
5874e88d 662 .longname = "SysClk LWLA series",
aeaad0b0 663 .api_version = 1,
c2fdcc25 664 .init = std_init,
700d6b64 665 .cleanup = std_cleanup,
aeaad0b0 666 .scan = scan,
c01bf34c 667 .dev_list = std_dev_list,
8bf18daa 668 .dev_clear = std_dev_clear,
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669 .config_get = config_get,
670 .config_set = config_set,
f3ca73ed 671 .config_channel_set = config_channel_set,
ee38c8ba 672 .config_commit = config_commit,
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673 .config_list = config_list,
674 .dev_open = dev_open,
675 .dev_close = dev_close,
676 .dev_acquisition_start = dev_acquisition_start,
677 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 678 .context = NULL,
aeaad0b0 679};
dd5c48a6 680SR_REGISTER_DEV_DRIVER(sysclk_lwla_driver_info);