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scpi-pps: Add profile for HP 6633A supply
[libsigrok.git] / src / hardware / scpi-pps / profiles.c
CommitLineData
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2014 Bert Vermeulen <bert@biot.com>
4ee1e2f3
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5 * Copyright (C) 2015 Google, Inc.
6 * (Written by Alexandru Gagniuc <mrnuke@google.com> for Google, Inc.)
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7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
6ec6c43b 22#include <config.h>
22c18b03 23#include <string.h>
ba464a12 24#include <strings.h>
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25#include "protocol.h"
26
27#define CH_IDX(x) (1 << x)
4264f1c0 28#define FREQ_DC_ONLY {0, 0, 0}
d4eabea8 29
584560f1 30static const uint32_t devopts_none[] = { };
bfc86799 31
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32/* Agilent/Keysight N5700A series */
33static const uint32_t agilent_n5700a_devopts[] = {
e91bb0a6 34 SR_CONF_CONTINUOUS,
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35};
36
37static const uint32_t agilent_n5700a_devopts_cg[] = {
38 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
39 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
40 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
da005885
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41 SR_CONF_VOLTAGE | SR_CONF_GET,
42 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
43 SR_CONF_CURRENT | SR_CONF_GET,
44 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
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AG
45};
46
6cc93128
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47static const struct channel_group_spec agilent_n5700a_cg[] = {
48 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
49};
50
8cb5affe 51static const struct channel_spec agilent_n5767a_ch[] = {
c80cf3e0 52 { "1", { 0, 60, 0.0001 }, { 0, 25, 0.1 }, FREQ_DC_ONLY },
5c9e56c9
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53};
54
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55static const struct channel_spec agilent_n5763a_ch[] = {
56 { "1", { 0, 12.5, 0.001 }, { 0, 25, 0.01 }, FREQ_DC_ONLY },
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57};
58
59/*
60 * TODO: OVER_CURRENT_PROTECTION_ACTIVE status can be determined by the OC bit
562a3490 61 * in STAT:QUES:EVEN?, but this is not implemented.
5c9e56c9 62 */
8cb5affe 63static const struct scpi_command agilent_n5700a_cmd[] = {
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64 { SCPI_CMD_REMOTE, "SYST:COMM:RLST REM" },
65 { SCPI_CMD_LOCAL, "SYST:COMM:RLST LOC" },
66 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
67 { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" },
68 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
69 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
70 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
71 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
72 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP:STAT?" },
73 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
74 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
75 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT?" },
76 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT %.6f" },
77 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":CURR:PROT:STAT?" },
78 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":CURR:PROT:STAT ON?"},
79 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":CURR:PROT:STAT OFF?"},
562a3490 80 /* Current limit (CC mode) and OCP are set using the same command. */
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81 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR?" },
82 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR %.6f" },
91ef511d 83 ALL_ZERO
5c9e56c9
AG
84};
85
4ee1e2f3
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86/* Chroma 61600 series AC source */
87static const uint32_t chroma_61604_devopts[] = {
e91bb0a6 88 SR_CONF_CONTINUOUS,
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89};
90
91static const uint32_t chroma_61604_devopts_cg[] = {
92 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
93 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
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94 SR_CONF_VOLTAGE | SR_CONF_GET,
95 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
6c0c9dd2
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96 SR_CONF_OUTPUT_FREQUENCY | SR_CONF_GET,
97 SR_CONF_OUTPUT_FREQUENCY_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
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98 SR_CONF_CURRENT | SR_CONF_GET,
99 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
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100};
101
8cb5affe 102static const struct channel_spec chroma_61604_ch[] = {
6c0c9dd2 103 { "1", { 0, 300, 0.1 }, { 0, 16, 0.1 }, { 1.0, 1000.0, 0.01 } },
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104};
105
8cb5affe 106static const struct channel_group_spec chroma_61604_cg[] = {
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107 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
108};
109
8cb5affe 110static const struct scpi_command chroma_61604_cmd[] = {
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111 { SCPI_CMD_REMOTE, "SYST:REM" },
112 { SCPI_CMD_LOCAL, "SYST:LOC" },
113 { SCPI_CMD_GET_MEAS_VOLTAGE, ":FETC:VOLT:ACDC?" },
6c0c9dd2 114 { SCPI_CMD_GET_MEAS_FREQUENCY, ":FETC:FREQ?" },
4ee1e2f3
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115 { SCPI_CMD_GET_MEAS_CURRENT, ":FETC:CURR:AC?" },
116 { SCPI_CMD_GET_MEAS_POWER, ":FETC:POW:AC?" },
117 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT:AC?" },
118 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT:AC %.1f" },
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119 { SCPI_CMD_GET_FREQUENCY_TARGET, ":SOUR:FREQ?" },
120 { SCPI_CMD_SET_FREQUENCY_TARGET, ":SOUR:FREQ %.2f" },
4ee1e2f3
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121 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
122 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
123 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
124 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC?" },
125 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC %.1f" },
562a3490 126 /* This is not a current limit mode. It is overcurrent protection. */
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127 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM?" },
128 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM %.2f" },
91ef511d 129 ALL_ZERO
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130};
131
5281993e
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132/* Chroma 62000 series DC source */
133
134static const uint32_t chroma_62000_devopts[] = {
e91bb0a6 135 SR_CONF_CONTINUOUS,
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136};
137
138static const uint32_t chroma_62000_devopts_cg[] = {
139 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
140 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
141 SR_CONF_VOLTAGE | SR_CONF_GET,
142 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
143 SR_CONF_CURRENT | SR_CONF_GET,
144 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
145 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
146};
147
5281993e
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148static const struct channel_group_spec chroma_62000_cg[] = {
149 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
150};
151
152static const struct scpi_command chroma_62000_cmd[] = {
153 { SCPI_CMD_REMOTE, ":CONF:REM ON" },
154 { SCPI_CMD_LOCAL, ":CONF:REM OFF" },
155 { SCPI_CMD_BEEPER, ":CONF:BEEP?" },
156 { SCPI_CMD_BEEPER_ENABLE, ":CONF:BEEP ON" },
157 { SCPI_CMD_BEEPER_DISABLE, ":CONF:BEEP OFF" },
158 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
159 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
160 { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POW?" },
161 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
162 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.2f" },
163 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
164 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
165 { SCPI_CMD_GET_OUTPUT_ENABLED, ":CONF:OUTP?" },
166 { SCPI_CMD_SET_OUTPUT_ENABLE, ":CONF:OUTP ON" },
167 { SCPI_CMD_SET_OUTPUT_DISABLE, ":CONF:OUTP OFF" },
168 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:HIGH?" },
169 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:HIGH %.6f" },
170 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT:HIGH?" },
171 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT:HIGH %.6f" },
91ef511d 172 ALL_ZERO
5281993e
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173};
174
9a5185c7
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175static int chroma_62000p_probe_channels(struct sr_dev_inst *sdi,
176 struct sr_scpi_hw_info *hw_info,
177 struct channel_spec **channels, unsigned int *num_channels,
178 struct channel_group_spec **channel_groups,
179 unsigned int *num_channel_groups)
180{
181 unsigned int volts, amps;
182 struct channel_spec *channel;
183
184 (void)sdi;
185
186 sscanf(hw_info->model, "%*[^P]P-%u-%u", &volts, &amps);
187 sr_dbg("Found device rated for %d V and %d A", volts, amps);
188
189 if (volts > 600) {
190 sr_err("Probed max voltage of %u V is out of spec.", volts);
191 return SR_ERR_BUG;
192 }
193
194 if (volts > 120) {
195 sr_err("Probed max current of %u A is out of spec.", amps);
196 return SR_ERR_BUG;
197 }
198
199 channel = g_malloc0(sizeof(struct channel_spec));
200 channel->name = "1";
201 channel->voltage[0] = channel->current[0] = 0.0;
202 channel->voltage[1] = (float)volts;
203 channel->current[1] = (float)amps;
204 channel->voltage[2] = channel->current[2] = 0.01;
205 *channels = channel;
206 *num_channels = 1;
207
208 *channel_groups = g_malloc(sizeof(struct channel_group_spec));
209 **channel_groups = chroma_62000_cg[0];
210 *num_channel_groups = 1;
211
212 return SR_OK;
213}
214
d4eabea8 215/* Rigol DP800 series */
584560f1 216static const uint32_t rigol_dp800_devopts[] = {
e91bb0a6 217 SR_CONF_CONTINUOUS,
5827f61b 218 SR_CONF_OVER_TEMPERATURE_PROTECTION | SR_CONF_GET | SR_CONF_SET,
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219};
220
584560f1 221static const uint32_t rigol_dp800_devopts_cg[] = {
7a0b98b5 222 SR_CONF_REGULATION | SR_CONF_GET,
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223 SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
224 SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
225 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
226 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
227 SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
228 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
7a0b98b5
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229 SR_CONF_VOLTAGE | SR_CONF_GET,
230 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
231 SR_CONF_CURRENT | SR_CONF_GET,
232 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
233 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
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234};
235
8cb5affe 236static const struct channel_spec rigol_dp821a_ch[] = {
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237 { "1", { 0, 60, 0.001 }, { 0, 1, 0.0001 }, FREQ_DC_ONLY },
238 { "2", { 0, 8, 0.001 }, { 0, 10, 0.001 }, FREQ_DC_ONLY },
cfcdf576
ML
239};
240
8cb5affe 241static const struct channel_spec rigol_dp831_ch[] = {
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242 { "1", { 0, 8, 0.001 }, { 0, 5, 0.0003 }, FREQ_DC_ONLY },
243 { "2", { 0, 30, 0.001 }, { 0, 2, 0.0001 }, FREQ_DC_ONLY },
244 { "3", { 0, -30, 0.001 }, { 0, 2, 0.0001 }, FREQ_DC_ONLY },
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245};
246
8cb5affe 247static const struct channel_spec rigol_dp832_ch[] = {
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248 { "1", { 0, 30, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY },
249 { "2", { 0, 30, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY },
250 { "3", { 0, 5, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY },
3222ee10
BV
251};
252
8cb5affe 253static const struct channel_group_spec rigol_dp820_cg[] = {
cfcdf576
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254 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
255 { "2", CH_IDX(1), PPS_OVP | PPS_OCP },
256};
257
8cb5affe 258static const struct channel_group_spec rigol_dp830_cg[] = {
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259 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
260 { "2", CH_IDX(1), PPS_OVP | PPS_OCP },
261 { "3", CH_IDX(2), PPS_OVP | PPS_OCP },
262};
263
8cb5affe 264static const struct scpi_command rigol_dp800_cmd[] = {
60475cd7
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265 { SCPI_CMD_REMOTE, "SYST:REMOTE" },
266 { SCPI_CMD_LOCAL, "SYST:LOCAL" },
ee2860ee
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267 { SCPI_CMD_BEEPER, "SYST:BEEP:STAT?" },
268 { SCPI_CMD_BEEPER_ENABLE, "SYST:BEEP:STAT ON" },
269 { SCPI_CMD_BEEPER_DISABLE, "SYST:BEEP:STAT OFF" },
60475cd7
BV
270 { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
271 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
272 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
273 { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE?" },
274 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
275 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
276 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
277 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
278 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
279 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
280 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
281 { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" },
d4eabea8 282 { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP?" },
53a81803
BV
283 { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_ENABLE, ":SYST:OTP ON" },
284 { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_DISABLE, ":SYST:OTP OFF" },
60475cd7
BV
285 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP?" },
286 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP ON" },
287 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP OFF" },
288 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES?" },
289 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL?" },
290 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL %.6f" },
291 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP?" },
292 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP:STAT ON" },
293 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP:STAT OFF" },
294 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES?" },
295 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL?" },
296 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL %.6f" },
91ef511d 297 ALL_ZERO
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298};
299
bfc86799 300/* HP 663xx series */
e76a3575
AG
301
302static const uint32_t hp_6630a_devopts[] = {
303 SR_CONF_CONTINUOUS,
304 SR_CONF_ENABLED | SR_CONF_SET,
305 SR_CONF_VOLTAGE | SR_CONF_GET,
306 SR_CONF_CURRENT | SR_CONF_GET,
307 SR_CONF_VOLTAGE_TARGET | SR_CONF_SET | SR_CONF_LIST,
308 SR_CONF_CURRENT_LIMIT | SR_CONF_SET | SR_CONF_LIST,
309 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_SET,
310 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_SET,
311};
312
584560f1 313static const uint32_t hp_6632b_devopts[] = {
e91bb0a6 314 SR_CONF_CONTINUOUS,
7a0b98b5
AJ
315 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
316 SR_CONF_VOLTAGE | SR_CONF_GET,
317 SR_CONF_CURRENT | SR_CONF_GET,
318 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
319 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
bc4a2a46
BV
320};
321
e76a3575
AG
322static const struct channel_spec hp_6633a_ch[] = {
323 { "1", { 0, 51.188, 0.0125 }, { 0, 2.0475, 0.0005 }, FREQ_DC_ONLY },
324};
325
8cb5affe 326static const struct channel_spec hp_6632b_ch[] = {
4264f1c0 327 { "1", { 0, 20.475, 0.005 }, { 0, 5.1188, 0.00132 }, FREQ_DC_ONLY },
bc4a2a46
BV
328};
329
e76a3575 330static const struct channel_group_spec hp_663xx_cg[] = {
bc4a2a46
BV
331 { "1", CH_IDX(0), 0 },
332};
333
e76a3575
AG
334static const struct scpi_command hp_6630a_cmd[] = {
335 { SCPI_CMD_SET_OUTPUT_ENABLE, "OUT 1" },
336 { SCPI_CMD_SET_OUTPUT_DISABLE, "OUT 0" },
337 { SCPI_CMD_GET_MEAS_VOLTAGE, "VOUT?" },
338 { SCPI_CMD_GET_MEAS_CURRENT, "IOUT?" },
339 { SCPI_CMD_SET_VOLTAGE_TARGET, "VSET %.4f" },
340 { SCPI_CMD_SET_CURRENT_LIMIT, "ISET %.4f" },
341 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, "OCP 1" },
342 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, "OCP 0" },
343 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "OVSET %.4f" },
344 ALL_ZERO
345};
346
8cb5affe 347static const struct scpi_command hp_6632b_cmd[] = {
bc4a2a46 348 { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP:STAT?" },
53a81803
BV
349 { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP:STAT ON" },
350 { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP:STAT OFF" },
bc4a2a46
BV
351 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
352 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
ca95e90f
BV
353 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
354 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
355 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
356 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
91ef511d 357 ALL_ZERO
bc4a2a46
BV
358};
359
c3eadb07 360/* Philips/Fluke PM2800 series */
9d9cf1c4 361static const uint32_t philips_pm2800_devopts[] = {
e91bb0a6 362 SR_CONF_CONTINUOUS,
9d9cf1c4
BV
363};
364
c3eadb07 365static const uint32_t philips_pm2800_devopts_cg[] = {
7a0b98b5
AJ
366 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
367 SR_CONF_VOLTAGE | SR_CONF_GET,
368 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
369 SR_CONF_CURRENT | SR_CONF_GET,
370 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
c3eadb07
BV
371 SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
372 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
373 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
374 SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
7a0b98b5 375 SR_CONF_REGULATION | SR_CONF_GET,
c3eadb07
BV
376};
377
378enum philips_pm2800_modules {
379 PM2800_MOD_30V_10A = 1,
380 PM2800_MOD_60V_5A,
381 PM2800_MOD_60V_10A,
382 PM2800_MOD_8V_15A,
383 PM2800_MOD_60V_2A,
384 PM2800_MOD_120V_1A,
385};
386
329733d9 387static const struct philips_pm2800_module_spec {
c3eadb07
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388 /* Min, max, programming resolution. */
389 float voltage[3];
390 float current[3];
391} philips_pm2800_module_specs[] = {
392 /* Autoranging modules. */
393 [PM2800_MOD_30V_10A] = { { 0, 30, 0.0075 }, { 0, 10, 0.0025 } },
394 [PM2800_MOD_60V_5A] = { { 0, 60, 0.015 }, { 0, 5, 0.00125 } },
395 [PM2800_MOD_60V_10A] = { { 0, 60, 0.015 }, { 0, 10, 0.0025 } },
396 /* Linear modules. */
397 [PM2800_MOD_8V_15A] = { { 0, 8, 0.002 }, { -15, 15, 0.00375 } },
398 [PM2800_MOD_60V_2A] = { { 0, 60, 0.015 }, { -2, 2, 0.0005 } },
399 [PM2800_MOD_120V_1A] = { { 0, 120, 0.030 }, { -1, 1, 0.00025 } },
400};
401
329733d9 402static const struct philips_pm2800_model {
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403 unsigned int chassis;
404 unsigned int num_modules;
405 unsigned int set;
406 unsigned int modules[3];
407} philips_pm2800_matrix[] = {
408 /* Autoranging chassis. */
409 { 1, 1, 0, { PM2800_MOD_30V_10A, 0, 0 } },
410 { 1, 1, 1, { PM2800_MOD_60V_5A, 0, 0 } },
411 { 1, 2, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, 0 } },
412 { 1, 2, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, 0 } },
413 { 1, 2, 2, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, 0 } },
414 { 1, 2, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_10A, 0 } },
415 { 1, 2, 4, { PM2800_MOD_60V_5A, PM2800_MOD_60V_10A, 0 } },
416 { 1, 3, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_30V_10A } },
417 { 1, 3, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
418 { 1, 3, 2, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_60V_5A } },
419 { 1, 3, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
420 /* Linear chassis. */
421 { 3, 1, 0, { PM2800_MOD_60V_2A, 0, 0 } },
422 { 3, 1, 1, { PM2800_MOD_120V_1A, 0, 0 } },
423 { 3, 1, 2, { PM2800_MOD_8V_15A, 0, 0 } },
424 { 3, 2, 0, { PM2800_MOD_60V_2A, 0, 0 } },
425 { 3, 2, 1, { PM2800_MOD_120V_1A, 0, 0 } },
426 { 3, 2, 2, { PM2800_MOD_60V_2A, PM2800_MOD_120V_1A, 0 } },
427 { 3, 2, 3, { PM2800_MOD_8V_15A, PM2800_MOD_8V_15A, 0 } },
428};
429
329733d9 430static const char *philips_pm2800_names[] = { "1", "2", "3" };
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431
432static int philips_pm2800_probe_channels(struct sr_dev_inst *sdi,
433 struct sr_scpi_hw_info *hw_info,
434 struct channel_spec **channels, unsigned int *num_channels,
435 struct channel_group_spec **channel_groups, unsigned int *num_channel_groups)
436{
329733d9
UH
437 const struct philips_pm2800_model *model;
438 const struct philips_pm2800_module_spec *spec;
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439 unsigned int chassis, num_modules, set, module, m, i;
440
441 (void)sdi;
442
443 /*
444 * The model number as reported by *IDN? looks like e.g. PM2813/11,
445 * Where "PM28" is fixed, followed by the chassis code (1 = autoranging,
446 * 3 = linear series) and the number of modules: 1-3 for autoranging,
447 * 1-2 for linear.
448 * After the slash, the first digit denotes the module set. The
449 * digit after that denotes front (5) or rear (1) binding posts.
450 */
451 chassis = hw_info->model[4] - 0x30;
452 num_modules = hw_info->model[5] - 0x30;
453 set = hw_info->model[7] - 0x30;
454 for (m = 0; m < ARRAY_SIZE(philips_pm2800_matrix); m++) {
455 model = &philips_pm2800_matrix[m];
456 if (model->chassis == chassis && model->num_modules == num_modules
457 && model->set == set)
458 break;
459 }
460 if (m == ARRAY_SIZE(philips_pm2800_matrix)) {
461 sr_dbg("Model %s not found in matrix.", hw_info->model);
462 return SR_ERR;
463 }
464
465 sr_dbg("Found %d output channel%s:", num_modules, num_modules > 1 ? "s" : "");
466 *channels = g_malloc0(sizeof(struct channel_spec) * num_modules);
467 *channel_groups = g_malloc0(sizeof(struct channel_group_spec) * num_modules);
468 for (i = 0; i < num_modules; i++) {
469 module = model->modules[i];
470 spec = &philips_pm2800_module_specs[module];
471 sr_dbg("output %d: %.0f - %.0fV, %.0f - %.0fA", i + 1,
472 spec->voltage[0], spec->voltage[1],
473 spec->current[0], spec->current[1]);
329733d9 474 (*channels)[i].name = (char *)philips_pm2800_names[i];
c3eadb07 475 memcpy(&((*channels)[i].voltage), spec, sizeof(float) * 6);
329733d9 476 (*channel_groups)[i].name = (char *)philips_pm2800_names[i];
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477 (*channel_groups)[i].channel_index_mask = 1 << i;
478 (*channel_groups)[i].features = PPS_OTP | PPS_OVP | PPS_OCP;
479 }
480 *num_channels = *num_channel_groups = num_modules;
481
482 return SR_OK;
483}
484
8cb5affe 485static const struct scpi_command philips_pm2800_cmd[] = {
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486 { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
487 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
488 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
489 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
490 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
491 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
492 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
493 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
494 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
495 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
496 { SCPI_CMD_GET_OUTPUT_REGULATION, ":SOUR:FUNC:MODE?" },
497 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":SOUR:VOLT:PROT:TRIP?" },
498 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV?" },
499 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV %.6f" },
500 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":SOUR:CURR:PROT:STAT?" },
501 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":SOUR:CURR:PROT:STAT ON" },
502 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":SOUR:CURR:PROT:STAT OFF" },
503 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":SOUR:CURR:PROT:TRIP?" },
91ef511d 504 ALL_ZERO
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505};
506
d4eabea8 507SR_PRIV const struct scpi_pps pps_profiles[] = {
6cc93128
AG
508 /* Agilent N5763A */
509 { "Agilent", "N5763A", 0,
510 ARRAY_AND_SIZE(agilent_n5700a_devopts),
511 ARRAY_AND_SIZE(agilent_n5700a_devopts_cg),
512 ARRAY_AND_SIZE(agilent_n5763a_ch),
513 ARRAY_AND_SIZE(agilent_n5700a_cg),
514 agilent_n5700a_cmd,
515 .probe_channels = NULL,
516 },
5c9e56c9
AG
517 /* Agilent N5767A */
518 { "Agilent", "N5767A", 0,
519 ARRAY_AND_SIZE(agilent_n5700a_devopts),
520 ARRAY_AND_SIZE(agilent_n5700a_devopts_cg),
521 ARRAY_AND_SIZE(agilent_n5767a_ch),
6cc93128 522 ARRAY_AND_SIZE(agilent_n5700a_cg),
91ef511d 523 agilent_n5700a_cmd,
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AG
524 .probe_channels = NULL,
525 },
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AG
526 /* Chroma 61604 */
527 { "Chroma", "61604", 0,
528 ARRAY_AND_SIZE(chroma_61604_devopts),
529 ARRAY_AND_SIZE(chroma_61604_devopts_cg),
530 ARRAY_AND_SIZE(chroma_61604_ch),
531 ARRAY_AND_SIZE(chroma_61604_cg),
91ef511d 532 chroma_61604_cmd,
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AG
533 .probe_channels = NULL,
534 },
5281993e 535 /* Chroma 62000 series */
9a5185c7 536 { "Chroma", "620[0-9]{2}P-[0-9]{2,3}-[0-9]{1,3}", 0,
5281993e
AG
537 ARRAY_AND_SIZE(chroma_62000_devopts),
538 ARRAY_AND_SIZE(chroma_62000_devopts_cg),
9a5185c7
AG
539 NULL, 0,
540 NULL, 0,
91ef511d 541 chroma_62000_cmd,
9a5185c7 542 .probe_channels = chroma_62000p_probe_channels,
5281993e 543 },
e76a3575
AG
544 /* HP 6633A */
545 { "HP", "6633A", 0,
546 ARRAY_AND_SIZE(hp_6630a_devopts),
547 ARRAY_AND_SIZE(devopts_none),
548 ARRAY_AND_SIZE(hp_6633a_ch),
549 ARRAY_AND_SIZE(hp_663xx_cg),
550 hp_6630a_cmd,
551 .probe_channels = NULL,
552 },
553
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554 /* HP 6632B */
555 { "HP", "6632B", 0,
556 ARRAY_AND_SIZE(hp_6632b_devopts),
bfc86799 557 ARRAY_AND_SIZE(devopts_none),
bc4a2a46 558 ARRAY_AND_SIZE(hp_6632b_ch),
e76a3575 559 ARRAY_AND_SIZE(hp_663xx_cg),
91ef511d 560 hp_6632b_cmd,
c3eadb07 561 .probe_channels = NULL,
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BV
562 },
563
d4eabea8 564 /* Rigol DP800 series */
cfcdf576
ML
565 { "Rigol", "^DP821A$", PPS_OTP,
566 ARRAY_AND_SIZE(rigol_dp800_devopts),
567 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
568 ARRAY_AND_SIZE(rigol_dp821a_ch),
569 ARRAY_AND_SIZE(rigol_dp820_cg),
91ef511d 570 rigol_dp800_cmd,
cfcdf576
ML
571 .probe_channels = NULL,
572 },
3222ee10
BV
573 { "Rigol", "^DP831A$", PPS_OTP,
574 ARRAY_AND_SIZE(rigol_dp800_devopts),
575 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
576 ARRAY_AND_SIZE(rigol_dp831_ch),
cfcdf576 577 ARRAY_AND_SIZE(rigol_dp830_cg),
91ef511d 578 rigol_dp800_cmd,
c3eadb07 579 .probe_channels = NULL,
3222ee10
BV
580 },
581 { "Rigol", "^(DP832|DP832A)$", PPS_OTP,
582 ARRAY_AND_SIZE(rigol_dp800_devopts),
583 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
584 ARRAY_AND_SIZE(rigol_dp832_ch),
cfcdf576 585 ARRAY_AND_SIZE(rigol_dp830_cg),
91ef511d 586 rigol_dp800_cmd,
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587 .probe_channels = NULL,
588 },
589
590 /* Philips/Fluke PM2800 series */
591 { "Philips", "^PM28[13][123]/[01234]{1,2}$", 0,
9d9cf1c4 592 ARRAY_AND_SIZE(philips_pm2800_devopts),
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593 ARRAY_AND_SIZE(philips_pm2800_devopts_cg),
594 NULL, 0,
595 NULL, 0,
91ef511d 596 philips_pm2800_cmd,
c3eadb07 597 philips_pm2800_probe_channels,
d4eabea8
BV
598 },
599};
d4eabea8 600
1beccaed 601SR_PRIV unsigned int num_pps_profiles = ARRAY_SIZE(pps_profiles);