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scpi-pps: properly set encoding digits
[libsigrok.git] / src / hardware / scpi-pps / profiles.c
CommitLineData
d4eabea8
BV		 1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2014 Bert Vermeulen <bert@biot.com>
4ee1e2f3
AG		 5 * Copyright (C) 2015 Google, Inc.
6 * (Written by Alexandru Gagniuc <mrnuke@google.com> for Google, Inc.)
d4eabea8
BV		 7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
6ec6c43b 22#include <config.h>
22c18b03 23#include <string.h>
ba464a12 24#include <strings.h>
d4eabea8
BV		 25#include "protocol.h"
26
27#define CH_IDX(x) (1 << x)
6ed709fe 28#define FREQ_DC_ONLY {0, 0, 0, 0, 0}
d4eabea8 29
584560f1 30static const uint32_t devopts_none[] = { };
bfc86799 31
5c9e56c9
AG		 32/* Agilent/Keysight N5700A series */
33static const uint32_t agilent_n5700a_devopts[] = {
e91bb0a6 34 SR_CONF_CONTINUOUS,
5c9e56c9
AG		 35};
36
37static const uint32_t agilent_n5700a_devopts_cg[] = {
38 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
39 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
40 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
da005885
UH		 41 SR_CONF_VOLTAGE | SR_CONF_GET,
42 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
43 SR_CONF_CURRENT | SR_CONF_GET,
44 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
5c9e56c9
AG		 45};
46
6cc93128
AG		 47static const struct channel_group_spec agilent_n5700a_cg[] = {
48 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
49};
50
8cb5affe 51static const struct channel_spec agilent_n5767a_ch[] = {
6ed709fe 52 { "1", { 0, 60, 0.0072, 3, 4 }, { 0, 25, 0.003, 3, 4 }, { 0, 1500 }, FREQ_DC_ONLY },
5c9e56c9
AG		 53};
54
6cc93128 55static const struct channel_spec agilent_n5763a_ch[] = {
6ed709fe 56 { "1", { 0, 12.5, 0.0015, 3, 4 }, { 0, 120, 0.0144, 3, 4 }, { 0, 1500 }, FREQ_DC_ONLY },
5c9e56c9
AG		 57};
58
59/*
60 * TODO: OVER_CURRENT_PROTECTION_ACTIVE status can be determined by the OC bit
562a3490 61 * in STAT:QUES:EVEN?, but this is not implemented.
5c9e56c9 62 */
8cb5affe 63static const struct scpi_command agilent_n5700a_cmd[] = {
5c9e56c9
AG		 64 { SCPI_CMD_REMOTE, "SYST:COMM:RLST REM" },
65 { SCPI_CMD_LOCAL, "SYST:COMM:RLST LOC" },
66 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
67 { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" },
68 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
69 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
70 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
71 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
72 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP:STAT?" },
73 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
74 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
75 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT?" },
76 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT %.6f" },
77 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":CURR:PROT:STAT?" },
78 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":CURR:PROT:STAT ON?"},
79 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":CURR:PROT:STAT OFF?"},
562a3490 80 /* Current limit (CC mode) and OCP are set using the same command. */
5c9e56c9
AG		 81 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR?" },
82 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR %.6f" },
91ef511d 83 ALL_ZERO
5c9e56c9
AG		 84};
85
4ee1e2f3
AG		 86/* Chroma 61600 series AC source */
87static const uint32_t chroma_61604_devopts[] = {
e91bb0a6 88 SR_CONF_CONTINUOUS,
4ee1e2f3
AG		 89};
90
91static const uint32_t chroma_61604_devopts_cg[] = {
92 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
93 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
da005885
UH		 94 SR_CONF_VOLTAGE | SR_CONF_GET,
95 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
6c0c9dd2
AG		 96 SR_CONF_OUTPUT_FREQUENCY | SR_CONF_GET,
97 SR_CONF_OUTPUT_FREQUENCY_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
da005885
UH		 98 SR_CONF_CURRENT | SR_CONF_GET,
99 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
4ee1e2f3
AG		 100};
101
8cb5affe 102static const struct channel_spec chroma_61604_ch[] = {
6ed709fe 103 { "1", { 0, 300, 0.1, 1, 1 }, { 0, 16, 0.1, 2, 2 }, { 0, 2000, 0, 1, 1 }, { 1.0, 1000.0, 0.01 } },
4ee1e2f3
AG		 104};
105
8cb5affe 106static const struct channel_group_spec chroma_61604_cg[] = {
4ee1e2f3
AG		 107 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
108};
109
8cb5affe 110static const struct scpi_command chroma_61604_cmd[] = {
4ee1e2f3
AG		 111 { SCPI_CMD_REMOTE, "SYST:REM" },
112 { SCPI_CMD_LOCAL, "SYST:LOC" },
113 { SCPI_CMD_GET_MEAS_VOLTAGE, ":FETC:VOLT:ACDC?" },
6c0c9dd2 114 { SCPI_CMD_GET_MEAS_FREQUENCY, ":FETC:FREQ?" },
4ee1e2f3
AG		 115 { SCPI_CMD_GET_MEAS_CURRENT, ":FETC:CURR:AC?" },
116 { SCPI_CMD_GET_MEAS_POWER, ":FETC:POW:AC?" },
117 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT:AC?" },
118 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT:AC %.1f" },
6c0c9dd2
AG		 119 { SCPI_CMD_GET_FREQUENCY_TARGET, ":SOUR:FREQ?" },
120 { SCPI_CMD_SET_FREQUENCY_TARGET, ":SOUR:FREQ %.2f" },
4ee1e2f3
AG		 121 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
122 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
123 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
124 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC?" },
125 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC %.1f" },
562a3490 126 /* This is not a current limit mode. It is overcurrent protection. */
4ee1e2f3
AG		 127 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM?" },
128 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM %.2f" },
91ef511d 129 ALL_ZERO
4ee1e2f3
AG		 130};
131
5281993e
AG		 132/* Chroma 62000 series DC source */
133
134static const uint32_t chroma_62000_devopts[] = {
e91bb0a6 135 SR_CONF_CONTINUOUS,
5281993e
AG		 136};
137
138static const uint32_t chroma_62000_devopts_cg[] = {
139 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
140 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
141 SR_CONF_VOLTAGE | SR_CONF_GET,
142 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
143 SR_CONF_CURRENT | SR_CONF_GET,
144 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
145 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
146};
147
5281993e
AG		 148static const struct channel_group_spec chroma_62000_cg[] = {
149 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
150};
151
152static const struct scpi_command chroma_62000_cmd[] = {
153 { SCPI_CMD_REMOTE, ":CONF:REM ON" },
154 { SCPI_CMD_LOCAL, ":CONF:REM OFF" },
155 { SCPI_CMD_BEEPER, ":CONF:BEEP?" },
156 { SCPI_CMD_BEEPER_ENABLE, ":CONF:BEEP ON" },
157 { SCPI_CMD_BEEPER_DISABLE, ":CONF:BEEP OFF" },
158 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
159 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
160 { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POW?" },
161 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
162 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.2f" },
163 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
164 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
165 { SCPI_CMD_GET_OUTPUT_ENABLED, ":CONF:OUTP?" },
166 { SCPI_CMD_SET_OUTPUT_ENABLE, ":CONF:OUTP ON" },
167 { SCPI_CMD_SET_OUTPUT_DISABLE, ":CONF:OUTP OFF" },
168 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:HIGH?" },
169 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:HIGH %.6f" },
170 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT:HIGH?" },
171 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT:HIGH %.6f" },
91ef511d 172 ALL_ZERO
5281993e
AG		 173};
174
9a5185c7
AG		 175static int chroma_62000p_probe_channels(struct sr_dev_inst *sdi,
176 struct sr_scpi_hw_info *hw_info,
177 struct channel_spec **channels, unsigned int *num_channels,
178 struct channel_group_spec **channel_groups,
179 unsigned int *num_channel_groups)
180{
6ed709fe 181 unsigned int volts, amps, watts;
9a5185c7
AG		 182 struct channel_spec *channel;
183
184 (void)sdi;
185
6ed709fe
AJ		 186 sscanf(hw_info->model, "620%uP-%u-%u", &watts, &volts, &amps);
187 watts *= 100;
188 sr_dbg("Found device rated for %d V, %d A and %d W", volts, amps, watts);
9a5185c7
AG		 189
190 if (volts > 600) {
191 sr_err("Probed max voltage of %u V is out of spec.", volts);
192 return SR_ERR_BUG;
193 }
194
6ed709fe 195 if (amps > 120) {
9a5185c7
AG		 196 sr_err("Probed max current of %u A is out of spec.", amps);
197 return SR_ERR_BUG;
198 }
199
6ed709fe
AJ		 200 if (watts > 5000) {
201 sr_err("Probed max power of %u W is out of spec.", watts);
202 return SR_ERR_BUG;
203 }
204
9a5185c7
AG		 205 channel = g_malloc0(sizeof(struct channel_spec));
206 channel->name = "1";
6ed709fe 207 channel->voltage[0] = channel->current[0] = channel->power[0] = 0.0;
9a5185c7
AG		 208 channel->voltage[1] = (float)volts;
209 channel->current[1] = (float)amps;
6ed709fe 210 channel->power[1] = (float)watts;
9a5185c7 211 channel->voltage[2] = channel->current[2] = 0.01;
6ed709fe
AJ		 212 channel->voltage[3] = channel->voltage[4] = 3;
213 channel->current[3] = channel->current[4] = 4;
9a5185c7
AG		 214 *channels = channel;
215 *num_channels = 1;
216
217 *channel_groups = g_malloc(sizeof(struct channel_group_spec));
218 **channel_groups = chroma_62000_cg[0];
219 *num_channel_groups = 1;
220
221 return SR_OK;
222}
223
d4eabea8 224/* Rigol DP800 series */
584560f1 225static const uint32_t rigol_dp800_devopts[] = {
e91bb0a6 226 SR_CONF_CONTINUOUS,
5827f61b 227 SR_CONF_OVER_TEMPERATURE_PROTECTION | SR_CONF_GET | SR_CONF_SET,
d4eabea8
BV		 228};
229
584560f1 230static const uint32_t rigol_dp800_devopts_cg[] = {
7a0b98b5 231 SR_CONF_REGULATION | SR_CONF_GET,
5827f61b
BV		 232 SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
233 SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
234 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
235 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
236 SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
237 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
7a0b98b5
AJ		 238 SR_CONF_VOLTAGE | SR_CONF_GET,
239 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
240 SR_CONF_CURRENT | SR_CONF_GET,
241 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
242 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
d4eabea8
BV		 243};
244
8cb5affe 245static const struct channel_spec rigol_dp821a_ch[] = {
6ed709fe
AJ		 246 { "1", { 0, 60, 0.001, 3, 3 }, { 0, 1, 0.0001, 4, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY },
247 { "2", { 0, 8, 0.001, 3, 3 }, { 0, 10, 0.001, 3, 3 }, { 0, 80, 0, 3, 3 }, FREQ_DC_ONLY },
cfcdf576
ML		 248};
249
8cb5affe 250static const struct channel_spec rigol_dp831_ch[] = {
6ed709fe
AJ		 251 { "1", { 0, 8, 0.001, 3, 4 }, { 0, 5, 0.0003, 3, 4 }, { 0, 40, 0, 3, 4 }, FREQ_DC_ONLY },
252 { "2", { 0, 30, 0.001, 3, 4 }, { 0, 2, 0.0001, 3, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY },
253 { "3", { 0, -30, 0.001, 3, 4 }, { 0, 2, 0.0001, 3, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY },
d4eabea8
BV		 254};
255
8cb5affe 256static const struct channel_spec rigol_dp832_ch[] = {
6ed709fe
AJ		 257 { "1", { 0, 30, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY },
258 { "2", { 0, 30, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY },
259 { "3", { 0, 5, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY },
3222ee10
BV		 260};
261
8cb5affe 262static const struct channel_group_spec rigol_dp820_cg[] = {
cfcdf576
ML		 263 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
264 { "2", CH_IDX(1), PPS_OVP | PPS_OCP },
265};
266
8cb5affe 267static const struct channel_group_spec rigol_dp830_cg[] = {
d4eabea8
BV		 268 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
269 { "2", CH_IDX(1), PPS_OVP | PPS_OCP },
270 { "3", CH_IDX(2), PPS_OVP | PPS_OCP },
271};
272
8cb5affe 273static const struct scpi_command rigol_dp800_cmd[] = {
60475cd7
BV		 274 { SCPI_CMD_REMOTE, "SYST:REMOTE" },
275 { SCPI_CMD_LOCAL, "SYST:LOCAL" },
ee2860ee
BV		 276 { SCPI_CMD_BEEPER, "SYST:BEEP:STAT?" },
277 { SCPI_CMD_BEEPER_ENABLE, "SYST:BEEP:STAT ON" },
278 { SCPI_CMD_BEEPER_DISABLE, "SYST:BEEP:STAT OFF" },
60475cd7
BV		 279 { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
280 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
281 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
282 { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE?" },
283 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
284 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
285 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
286 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
287 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
288 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
289 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
290 { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" },
d4eabea8 291 { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP?" },
53a81803
BV		 292 { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_ENABLE, ":SYST:OTP ON" },
293 { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_DISABLE, ":SYST:OTP OFF" },
60475cd7
BV		 294 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP?" },
295 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP ON" },
296 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP OFF" },
297 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES?" },
298 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL?" },
299 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL %.6f" },
300 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP?" },
301 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP:STAT ON" },
302 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP:STAT OFF" },
303 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES?" },
304 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL?" },
305 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL %.6f" },
91ef511d 306 ALL_ZERO
d4eabea8
BV		 307};
308
bfc86799 309/* HP 663xx series */
e76a3575
AG		 310
311static const uint32_t hp_6630a_devopts[] = {
312 SR_CONF_CONTINUOUS,
313 SR_CONF_ENABLED | SR_CONF_SET,
314 SR_CONF_VOLTAGE | SR_CONF_GET,
315 SR_CONF_CURRENT | SR_CONF_GET,
316 SR_CONF_VOLTAGE_TARGET | SR_CONF_SET | SR_CONF_LIST,
317 SR_CONF_CURRENT_LIMIT | SR_CONF_SET | SR_CONF_LIST,
318 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_SET,
319 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_SET,
320};
321
584560f1 322static const uint32_t hp_6632b_devopts[] = {
e91bb0a6 323 SR_CONF_CONTINUOUS,
7a0b98b5
AJ		 324 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
325 SR_CONF_VOLTAGE | SR_CONF_GET,
326 SR_CONF_CURRENT | SR_CONF_GET,
327 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
328 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
bc4a2a46
BV		 329};
330
e76a3575 331static const struct channel_spec hp_6633a_ch[] = {
6ed709fe 332 { "1", { 0, 51.188, 0.0125, 3, 4 }, { 0, 2.0475, 0.0005, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY },
e76a3575
AG		 333};
334
8cb5affe 335static const struct channel_spec hp_6632b_ch[] = {
6ed709fe 336 { "1", { 0, 20.475, 0.005, 3, 4 }, { 0, 5.1188, 0.00132, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY },
bc4a2a46
BV		 337};
338
e76a3575 339static const struct channel_group_spec hp_663xx_cg[] = {
bc4a2a46
BV		 340 { "1", CH_IDX(0), 0 },
341};
342
e76a3575
AG		 343static const struct scpi_command hp_6630a_cmd[] = {
344 { SCPI_CMD_SET_OUTPUT_ENABLE, "OUT 1" },
345 { SCPI_CMD_SET_OUTPUT_DISABLE, "OUT 0" },
346 { SCPI_CMD_GET_MEAS_VOLTAGE, "VOUT?" },
347 { SCPI_CMD_GET_MEAS_CURRENT, "IOUT?" },
348 { SCPI_CMD_SET_VOLTAGE_TARGET, "VSET %.4f" },
349 { SCPI_CMD_SET_CURRENT_LIMIT, "ISET %.4f" },
350 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, "OCP 1" },
351 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, "OCP 0" },
352 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "OVSET %.4f" },
353 ALL_ZERO
354};
355
8cb5affe 356static const struct scpi_command hp_6632b_cmd[] = {
bc4a2a46 357 { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP:STAT?" },
53a81803
BV		 358 { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP:STAT ON" },
359 { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP:STAT OFF" },
bc4a2a46
BV		 360 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
361 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
ca95e90f
BV		 362 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
363 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
364 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
365 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
91ef511d 366 ALL_ZERO
bc4a2a46
BV		 367};
368
c3eadb07 369/* Philips/Fluke PM2800 series */
9d9cf1c4 370static const uint32_t philips_pm2800_devopts[] = {
e91bb0a6 371 SR_CONF_CONTINUOUS,
9d9cf1c4
BV		 372};
373
c3eadb07 374static const uint32_t philips_pm2800_devopts_cg[] = {
7a0b98b5
AJ		 375 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
376 SR_CONF_VOLTAGE | SR_CONF_GET,
377 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
378 SR_CONF_CURRENT | SR_CONF_GET,
379 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
c3eadb07
BV		 380 SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
381 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
382 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
383 SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
7a0b98b5 384 SR_CONF_REGULATION | SR_CONF_GET,
c3eadb07
BV		 385};
386
387enum philips_pm2800_modules {
388 PM2800_MOD_30V_10A = 1,
389 PM2800_MOD_60V_5A,
390 PM2800_MOD_60V_10A,
391 PM2800_MOD_8V_15A,
392 PM2800_MOD_60V_2A,
393 PM2800_MOD_120V_1A,
394};
395
329733d9 396static const struct philips_pm2800_module_spec {
c3eadb07 397 /* Min, max, programming resolution. */
6ed709fe
AJ		 398 float voltage[5];
399 float current[5];
400 float power[5];
c3eadb07
BV		 401} philips_pm2800_module_specs[] = {
402 /* Autoranging modules. */
6ed709fe
AJ		 403 [PM2800_MOD_30V_10A] = { { 0, 30, 0.0075, 2, 4 }, { 0, 10, 0.0025, 2, 4 }, { 0, 60 } },
404 [PM2800_MOD_60V_5A] = { { 0, 60, 0.015, 2, 3 }, { 0, 5, 0.00125, 2, 5 }, { 0, 60 } },
405 [PM2800_MOD_60V_10A] = { { 0, 60, 0.015, 2, 3 }, { 0, 10, 0.0025, 2, 5 }, { 0, 120 } },
c3eadb07 406 /* Linear modules. */
6ed709fe
AJ		 407 [PM2800_MOD_8V_15A] = { { 0, 8, 0.002, 3, 3 }, { -15, 15, 0.00375, 3, 5 }, { 0, 120 } },
408 [PM2800_MOD_60V_2A] = { { 0, 60, 0.015, 2, 3 }, { -2, 2, 0.0005, 3, 4 }, { 0, 120 } },
409 [PM2800_MOD_120V_1A] = { { 0, 120, 0.030, 2, 2 }, { -1, 1, 0.00025, 3, 5 }, { 0, 120 } },
c3eadb07
BV		 410};
411
329733d9 412static const struct philips_pm2800_model {
c3eadb07
BV		 413 unsigned int chassis;
414 unsigned int num_modules;
415 unsigned int set;
416 unsigned int modules[3];
417} philips_pm2800_matrix[] = {
418 /* Autoranging chassis. */
419 { 1, 1, 0, { PM2800_MOD_30V_10A, 0, 0 } },
420 { 1, 1, 1, { PM2800_MOD_60V_5A, 0, 0 } },
421 { 1, 2, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, 0 } },
422 { 1, 2, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, 0 } },
423 { 1, 2, 2, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, 0 } },
424 { 1, 2, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_10A, 0 } },
425 { 1, 2, 4, { PM2800_MOD_60V_5A, PM2800_MOD_60V_10A, 0 } },
426 { 1, 3, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_30V_10A } },
427 { 1, 3, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
428 { 1, 3, 2, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_60V_5A } },
429 { 1, 3, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
430 /* Linear chassis. */
431 { 3, 1, 0, { PM2800_MOD_60V_2A, 0, 0 } },
432 { 3, 1, 1, { PM2800_MOD_120V_1A, 0, 0 } },
433 { 3, 1, 2, { PM2800_MOD_8V_15A, 0, 0 } },
434 { 3, 2, 0, { PM2800_MOD_60V_2A, 0, 0 } },
435 { 3, 2, 1, { PM2800_MOD_120V_1A, 0, 0 } },
436 { 3, 2, 2, { PM2800_MOD_60V_2A, PM2800_MOD_120V_1A, 0 } },
437 { 3, 2, 3, { PM2800_MOD_8V_15A, PM2800_MOD_8V_15A, 0 } },
438};
439
329733d9 440static const char *philips_pm2800_names[] = { "1", "2", "3" };
c3eadb07
BV		 441
442static int philips_pm2800_probe_channels(struct sr_dev_inst *sdi,
443 struct sr_scpi_hw_info *hw_info,
444 struct channel_spec **channels, unsigned int *num_channels,
445 struct channel_group_spec **channel_groups, unsigned int *num_channel_groups)
446{
329733d9
UH		 447 const struct philips_pm2800_model *model;
448 const struct philips_pm2800_module_spec *spec;
c3eadb07
BV		 449 unsigned int chassis, num_modules, set, module, m, i;
450
451 (void)sdi;
452
453 /*
454 * The model number as reported by *IDN? looks like e.g. PM2813/11,
455 * Where "PM28" is fixed, followed by the chassis code (1 = autoranging,
456 * 3 = linear series) and the number of modules: 1-3 for autoranging,
457 * 1-2 for linear.
458 * After the slash, the first digit denotes the module set. The
459 * digit after that denotes front (5) or rear (1) binding posts.
460 */
461 chassis = hw_info->model[4] - 0x30;
462 num_modules = hw_info->model[5] - 0x30;
463 set = hw_info->model[7] - 0x30;
464 for (m = 0; m < ARRAY_SIZE(philips_pm2800_matrix); m++) {
465 model = &philips_pm2800_matrix[m];
466 if (model->chassis == chassis && model->num_modules == num_modules
467 && model->set == set)
468 break;
469 }
470 if (m == ARRAY_SIZE(philips_pm2800_matrix)) {
471 sr_dbg("Model %s not found in matrix.", hw_info->model);
472 return SR_ERR;
473 }
474
475 sr_dbg("Found %d output channel%s:", num_modules, num_modules > 1 ? "s" : "");
476 *channels = g_malloc0(sizeof(struct channel_spec) * num_modules);
477 *channel_groups = g_malloc0(sizeof(struct channel_group_spec) * num_modules);
478 for (i = 0; i < num_modules; i++) {
479 module = model->modules[i];
480 spec = &philips_pm2800_module_specs[module];
6ed709fe 481 sr_dbg("output %d: %.0f - %.0fV, %.0f - %.0fA, %.0f - %.0fW", i + 1,
c3eadb07 482 spec->voltage[0], spec->voltage[1],
6ed709fe
AJ		 483 spec->current[0], spec->current[1],
484 spec->power[0] , spec->power[1]);
329733d9 485 (*channels)[i].name = (char *)philips_pm2800_names[i];
6ed709fe 486 memcpy(&((*channels)[i].voltage), spec, sizeof(float) * 15);
329733d9 487 (*channel_groups)[i].name = (char *)philips_pm2800_names[i];
c3eadb07
BV		 488 (*channel_groups)[i].channel_index_mask = 1 << i;
489 (*channel_groups)[i].features = PPS_OTP | PPS_OVP | PPS_OCP;
490 }
491 *num_channels = *num_channel_groups = num_modules;
492
493 return SR_OK;
494}
495
8cb5affe 496static const struct scpi_command philips_pm2800_cmd[] = {
c3eadb07
BV		 497 { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
498 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
499 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
500 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
501 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
502 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
503 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
504 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
505 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
506 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
507 { SCPI_CMD_GET_OUTPUT_REGULATION, ":SOUR:FUNC:MODE?" },
508 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":SOUR:VOLT:PROT:TRIP?" },
509 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV?" },
510 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV %.6f" },
511 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":SOUR:CURR:PROT:STAT?" },
512 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":SOUR:CURR:PROT:STAT ON" },
513 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":SOUR:CURR:PROT:STAT OFF" },
514 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":SOUR:CURR:PROT:TRIP?" },
91ef511d 515 ALL_ZERO
c3eadb07
BV		 516};
517
d4eabea8 518SR_PRIV const struct scpi_pps pps_profiles[] = {
6cc93128
AG		 519 /* Agilent N5763A */
520 { "Agilent", "N5763A", 0,
521 ARRAY_AND_SIZE(agilent_n5700a_devopts),
522 ARRAY_AND_SIZE(agilent_n5700a_devopts_cg),
523 ARRAY_AND_SIZE(agilent_n5763a_ch),
524 ARRAY_AND_SIZE(agilent_n5700a_cg),
525 agilent_n5700a_cmd,
526 .probe_channels = NULL,
527 },
5c9e56c9
AG		 528 /* Agilent N5767A */
529 { "Agilent", "N5767A", 0,
530 ARRAY_AND_SIZE(agilent_n5700a_devopts),
531 ARRAY_AND_SIZE(agilent_n5700a_devopts_cg),
532 ARRAY_AND_SIZE(agilent_n5767a_ch),
6cc93128 533 ARRAY_AND_SIZE(agilent_n5700a_cg),
91ef511d 534 agilent_n5700a_cmd,
5c9e56c9
AG		 535 .probe_channels = NULL,
536 },
4ee1e2f3
AG		 537 /* Chroma 61604 */
538 { "Chroma", "61604", 0,
539 ARRAY_AND_SIZE(chroma_61604_devopts),
540 ARRAY_AND_SIZE(chroma_61604_devopts_cg),
541 ARRAY_AND_SIZE(chroma_61604_ch),
542 ARRAY_AND_SIZE(chroma_61604_cg),
91ef511d 543 chroma_61604_cmd,
4ee1e2f3
AG		 544 .probe_channels = NULL,
545 },
5281993e 546 /* Chroma 62000 series */
9a5185c7 547 { "Chroma", "620[0-9]{2}P-[0-9]{2,3}-[0-9]{1,3}", 0,
5281993e
AG		 548 ARRAY_AND_SIZE(chroma_62000_devopts),
549 ARRAY_AND_SIZE(chroma_62000_devopts_cg),
9a5185c7
AG		 550 NULL, 0,
551 NULL, 0,
91ef511d 552 chroma_62000_cmd,
9a5185c7 553 .probe_channels = chroma_62000p_probe_channels,
5281993e 554 },
e76a3575
AG		 555 /* HP 6633A */
556 { "HP", "6633A", 0,
557 ARRAY_AND_SIZE(hp_6630a_devopts),
558 ARRAY_AND_SIZE(devopts_none),
559 ARRAY_AND_SIZE(hp_6633a_ch),
560 ARRAY_AND_SIZE(hp_663xx_cg),
561 hp_6630a_cmd,
562 .probe_channels = NULL,
563 },
564
bc4a2a46
BV		 565 /* HP 6632B */
566 { "HP", "6632B", 0,
567 ARRAY_AND_SIZE(hp_6632b_devopts),
bfc86799 568 ARRAY_AND_SIZE(devopts_none),
bc4a2a46 569 ARRAY_AND_SIZE(hp_6632b_ch),
e76a3575 570 ARRAY_AND_SIZE(hp_663xx_cg),
91ef511d 571 hp_6632b_cmd,
c3eadb07 572 .probe_channels = NULL,
bc4a2a46
BV		 573 },
574
d4eabea8 575 /* Rigol DP800 series */
cfcdf576
ML		 576 { "Rigol", "^DP821A$", PPS_OTP,
577 ARRAY_AND_SIZE(rigol_dp800_devopts),
578 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
579 ARRAY_AND_SIZE(rigol_dp821a_ch),
580 ARRAY_AND_SIZE(rigol_dp820_cg),
91ef511d 581 rigol_dp800_cmd,
cfcdf576
ML		 582 .probe_channels = NULL,
583 },
3222ee10
BV		 584 { "Rigol", "^DP831A$", PPS_OTP,
585 ARRAY_AND_SIZE(rigol_dp800_devopts),
586 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
587 ARRAY_AND_SIZE(rigol_dp831_ch),
cfcdf576 588 ARRAY_AND_SIZE(rigol_dp830_cg),
91ef511d 589 rigol_dp800_cmd,
c3eadb07 590 .probe_channels = NULL,
3222ee10
BV		 591 },
592 { "Rigol", "^(DP832|DP832A)$", PPS_OTP,
593 ARRAY_AND_SIZE(rigol_dp800_devopts),
594 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
595 ARRAY_AND_SIZE(rigol_dp832_ch),
cfcdf576 596 ARRAY_AND_SIZE(rigol_dp830_cg),
91ef511d 597 rigol_dp800_cmd,
c3eadb07
BV		 598 .probe_channels = NULL,
599 },
600
601 /* Philips/Fluke PM2800 series */
602 { "Philips", "^PM28[13][123]/[01234]{1,2}$", 0,
9d9cf1c4 603 ARRAY_AND_SIZE(philips_pm2800_devopts),
c3eadb07
BV		 604 ARRAY_AND_SIZE(philips_pm2800_devopts_cg),
605 NULL, 0,
606 NULL, 0,
91ef511d 607 philips_pm2800_cmd,
c3eadb07 608 philips_pm2800_probe_channels,
d4eabea8
BV		 609 },
610};
d4eabea8 611
1beccaed 612SR_PRIV unsigned int num_pps_profiles = ARRAY_SIZE(pps_profiles);
Hardware access and backend lib