[libsigrok.git] / src / hardware / scpi-pps / profiles.c

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2014 Bert Vermeulen <bert@biot.com>
 * Copyright (C) 2015 Google, Inc.
 * (Written by Alexandru Gagniuc <mrnuke@google.com> for Google, Inc.)
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <string.h>
#include <strings.h>
#include "protocol.h"

#define CH_IDX(x) (1 << x)

const char *pps_vendors[][2] = {
	{ "RIGOL TECHNOLOGIES", "Rigol" },
	{ "HEWLETT-PACKARD", "HP" },
	{ "PHILIPS", "Philips" },
	{ "Chroma ATE", "Chroma" },
};

const char *get_vendor(const char *raw_vendor)
{
	unsigned int i;

	for (i = 0; i < ARRAY_SIZE(pps_vendors); i++) {
		if (!strcasecmp(raw_vendor, pps_vendors[i][0]))
			return pps_vendors[i][1];
	}

	return raw_vendor;
}

static const uint32_t devopts_none[] = { };

/* Chroma 61600 series AC source */
static const uint32_t chroma_61604_devopts[] = {
	SR_CONF_CONTINUOUS | SR_CONF_SET,
};

static const uint32_t chroma_61604_devopts_cg[] = {
	SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_OUTPUT_VOLTAGE | SR_CONF_GET,
	SR_CONF_OUTPUT_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
	SR_CONF_OUTPUT_CURRENT | SR_CONF_GET,
	SR_CONF_OUTPUT_ENABLED | SR_CONF_GET | SR_CONF_SET,
};

const struct channel_spec chroma_61604_ch[] = {
	{ "1", { 0, 300, 0.1 }, { 0, 16, 0.1 } },
};

const struct channel_group_spec chroma_61604_cg[] = {
	{ "1", CH_IDX(0), PPS_OVP | PPS_OCP },
};

const struct scpi_command chroma_61604_cmd[] = {
	{ SCPI_CMD_REMOTE, "SYST:REM" },
	{ SCPI_CMD_LOCAL, "SYST:LOC" },
	{ SCPI_CMD_GET_MEAS_VOLTAGE, ":FETC:VOLT:ACDC?" },
	{ SCPI_CMD_GET_MEAS_CURRENT, ":FETC:CURR:AC?" },
	{ SCPI_CMD_GET_MEAS_POWER, ":FETC:POW:AC?" },
	{ SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT:AC?" },
	{ SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT:AC %.1f" },
	{ SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
	{ SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
	{ SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
	{ SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC?" },
	{ SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC %.1f" },
	/* This is not a current limit mode. It is overcurrent protection */
	{ SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM?" },
	{ SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM %.2f" },
};

/* Rigol DP800 series */
static const uint32_t rigol_dp800_devopts[] = {
	SR_CONF_CONTINUOUS | SR_CONF_SET,
	SR_CONF_OVER_TEMPERATURE_PROTECTION | SR_CONF_GET | SR_CONF_SET,
};

static const uint32_t rigol_dp800_devopts_cg[] = {
	SR_CONF_OUTPUT_REGULATION | SR_CONF_GET,
	SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
	SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
	SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_OUTPUT_VOLTAGE | SR_CONF_GET,
	SR_CONF_OUTPUT_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
	SR_CONF_OUTPUT_CURRENT | SR_CONF_GET,
	SR_CONF_OUTPUT_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
	SR_CONF_OUTPUT_ENABLED | SR_CONF_GET | SR_CONF_SET,
};

const struct channel_spec rigol_dp821a_ch[] = {
	{ "1", { 0, 60, 0.001 }, { 0, 1, 0.0001 } },
	{ "2", { 0, 8, 0.001 }, { 0, 10, 0.001 } },
};

const struct channel_spec rigol_dp831_ch[] = {
	{ "1", { 0, 8, 0.001 }, { 0, 5, 0.0003 } },
	{ "2", { 0, 30, 0.001 }, { 0, 2, 0.0001 } },
	{ "3", { 0, -30, 0.001 }, { 0, 2, 0.0001 } },
};

const struct channel_spec rigol_dp832_ch[] = {
	{ "1", { 0, 30, 0.001 }, { 0, 3, 0.001 } },
	{ "2", { 0, 30, 0.001 }, { 0, 3, 0.001 } },
	{ "3", { 0, 5, 0.001 }, { 0, 3, 0.001 } },
};

const struct channel_group_spec rigol_dp820_cg[] = {
	{ "1", CH_IDX(0), PPS_OVP | PPS_OCP },
	{ "2", CH_IDX(1), PPS_OVP | PPS_OCP },
};

const struct channel_group_spec rigol_dp830_cg[] = {
	{ "1", CH_IDX(0), PPS_OVP | PPS_OCP },
	{ "2", CH_IDX(1), PPS_OVP | PPS_OCP },
	{ "3", CH_IDX(2), PPS_OVP | PPS_OCP },
};

const struct scpi_command rigol_dp800_cmd[] = {
	{ SCPI_CMD_REMOTE, "SYST:REMOTE" },
	{ SCPI_CMD_LOCAL, "SYST:LOCAL" },
	{ SCPI_CMD_BEEPER, "SYST:BEEP:STAT?" },
	{ SCPI_CMD_BEEPER_ENABLE, "SYST:BEEP:STAT ON" },
	{ SCPI_CMD_BEEPER_DISABLE, "SYST:BEEP:STAT OFF" },
	{ SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
	{ SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
	{ SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
	{ SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE?" },
	{ SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
	{ SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
	{ SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
	{ SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
	{ SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
	{ SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
	{ SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
	{ SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" },
	{ SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP?" },
	{ SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_ENABLE, ":SYST:OTP ON" },
	{ SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_DISABLE, ":SYST:OTP OFF" },
	{ SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP?" },
	{ SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP ON" },
	{ SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP OFF" },
	{ SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES?" },
	{ SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL?" },
	{ SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL %.6f" },
	{ SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP?" },
	{ SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP:STAT ON" },
	{ SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP:STAT OFF" },
	{ SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES?" },
	{ SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL?" },
	{ SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL %.6f" },
};

/* HP 663xx series */
static const uint32_t hp_6632b_devopts[] = {
	SR_CONF_CONTINUOUS | SR_CONF_SET,
	SR_CONF_OUTPUT_ENABLED | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_OUTPUT_VOLTAGE | SR_CONF_GET,
	SR_CONF_OUTPUT_CURRENT | SR_CONF_GET,
	SR_CONF_OUTPUT_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
	SR_CONF_OUTPUT_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
};

const struct channel_spec hp_6632b_ch[] = {
	{ "1", { 0, 20.475, 0.005 }, { 0, 5.1188, 0.00132 } },
};

const struct channel_group_spec hp_6632b_cg[] = {
	{ "1", CH_IDX(0), 0 },
};

const struct scpi_command hp_6632b_cmd[] = {
	{ SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP:STAT?" },
	{ SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP:STAT ON" },
	{ SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP:STAT OFF" },
	{ SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
	{ SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
	{ SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
	{ SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
	{ SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
	{ SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
};

/* Philips/Fluke PM2800 series */
static const uint32_t philips_pm2800_devopts[] = {
	SR_CONF_CONTINUOUS | SR_CONF_SET,
};

static const uint32_t philips_pm2800_devopts_cg[] = {
	SR_CONF_OUTPUT_ENABLED | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_OUTPUT_VOLTAGE | SR_CONF_GET,
	SR_CONF_OUTPUT_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
	SR_CONF_OUTPUT_CURRENT | SR_CONF_GET,
	SR_CONF_OUTPUT_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
	SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
	SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
	SR_CONF_OUTPUT_REGULATION | SR_CONF_GET,
};

enum philips_pm2800_modules {
	PM2800_MOD_30V_10A = 1,
	PM2800_MOD_60V_5A,
	PM2800_MOD_60V_10A,
	PM2800_MOD_8V_15A,
	PM2800_MOD_60V_2A,
	PM2800_MOD_120V_1A,
};

static const struct philips_pm2800_module_spec {
	/* Min, max, programming resolution. */
	float voltage[3];
	float current[3];
} philips_pm2800_module_specs[] = {
	/* Autoranging modules. */
	[PM2800_MOD_30V_10A] = { { 0, 30, 0.0075 }, { 0, 10, 0.0025 } },
	[PM2800_MOD_60V_5A] = { { 0, 60, 0.015 }, { 0, 5, 0.00125 } },
	[PM2800_MOD_60V_10A] = { { 0, 60, 0.015 }, { 0, 10, 0.0025 } },
	/* Linear modules. */
	[PM2800_MOD_8V_15A] = { { 0, 8, 0.002 }, { -15, 15, 0.00375 } },
	[PM2800_MOD_60V_2A] = { { 0, 60, 0.015 }, { -2, 2, 0.0005 } },
	[PM2800_MOD_120V_1A] = { { 0, 120, 0.030 }, { -1, 1, 0.00025 } },
};

static const struct philips_pm2800_model {
	unsigned int chassis;
	unsigned int num_modules;
	unsigned int set;
	unsigned int modules[3];
} philips_pm2800_matrix[] = {
	/* Autoranging chassis. */
	{ 1, 1, 0, { PM2800_MOD_30V_10A, 0, 0 } },
	{ 1, 1, 1, { PM2800_MOD_60V_5A, 0, 0 } },
	{ 1, 2, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, 0 } },
	{ 1, 2, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, 0 } },
	{ 1, 2, 2, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, 0 } },
	{ 1, 2, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_10A, 0 } },
	{ 1, 2, 4, { PM2800_MOD_60V_5A, PM2800_MOD_60V_10A, 0 } },
	{ 1, 3, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_30V_10A } },
	{ 1, 3, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
	{ 1, 3, 2, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_60V_5A } },
	{ 1, 3, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
	/* Linear chassis. */
	{ 3, 1, 0, { PM2800_MOD_60V_2A, 0, 0 } },
	{ 3, 1, 1, { PM2800_MOD_120V_1A, 0, 0 } },
	{ 3, 1, 2, { PM2800_MOD_8V_15A, 0, 0 } },
	{ 3, 2, 0, { PM2800_MOD_60V_2A, 0, 0 } },
	{ 3, 2, 1, { PM2800_MOD_120V_1A, 0, 0 } },
	{ 3, 2, 2, { PM2800_MOD_60V_2A, PM2800_MOD_120V_1A, 0 } },
	{ 3, 2, 3, { PM2800_MOD_8V_15A, PM2800_MOD_8V_15A, 0 } },
};

static const char *philips_pm2800_names[] = { "1", "2", "3" };

static int philips_pm2800_probe_channels(struct sr_dev_inst *sdi,
		struct sr_scpi_hw_info *hw_info,
		struct channel_spec **channels, unsigned int *num_channels,
		struct channel_group_spec **channel_groups, unsigned int *num_channel_groups)
{
	const struct philips_pm2800_model *model;
	const struct philips_pm2800_module_spec *spec;
	unsigned int chassis, num_modules, set, module, m, i;

	(void)sdi;

	/*
	 * The model number as reported by *IDN? looks like e.g. PM2813/11,
	 * Where "PM28" is fixed, followed by the chassis code (1 = autoranging,
	 * 3 = linear series) and the number of modules: 1-3 for autoranging,
	 * 1-2 for linear.
	 * After the slash, the first digit denotes the module set. The
	 * digit after that denotes front (5) or rear (1) binding posts.
	 */
	chassis = hw_info->model[4] - 0x30;
	num_modules = hw_info->model[5] - 0x30;
	set = hw_info->model[7] - 0x30;
	for (m = 0; m < ARRAY_SIZE(philips_pm2800_matrix); m++) {
		model = &philips_pm2800_matrix[m];
		if (model->chassis == chassis && model->num_modules == num_modules
				&& model->set == set)
			break;
	}
	if (m == ARRAY_SIZE(philips_pm2800_matrix)) {
		sr_dbg("Model %s not found in matrix.", hw_info->model);
		return SR_ERR;
	}

	sr_dbg("Found %d output channel%s:", num_modules, num_modules > 1 ? "s" : "");
	*channels = g_malloc0(sizeof(struct channel_spec) * num_modules);
	*channel_groups = g_malloc0(sizeof(struct channel_group_spec) * num_modules);
	for (i = 0; i < num_modules; i++) {
		module = model->modules[i];
		spec = &philips_pm2800_module_specs[module];
		sr_dbg("output %d: %.0f - %.0fV, %.0f - %.0fA", i + 1,
				spec->voltage[0], spec->voltage[1],
				spec->current[0], spec->current[1]);
		(*channels)[i].name = (char *)philips_pm2800_names[i];
		memcpy(&((*channels)[i].voltage), spec, sizeof(float) * 6);
		(*channel_groups)[i].name = (char *)philips_pm2800_names[i];
		(*channel_groups)[i].channel_index_mask = 1 << i;
		(*channel_groups)[i].features = PPS_OTP | PPS_OVP | PPS_OCP;
	}
	*num_channels = *num_channel_groups = num_modules;

	return SR_OK;
}

const struct scpi_command philips_pm2800_cmd[] = {
	{ SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
	{ SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
	{ SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
	{ SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
	{ SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
	{ SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
	{ SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
	{ SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
	{ SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
	{ SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
	{ SCPI_CMD_GET_OUTPUT_REGULATION, ":SOUR:FUNC:MODE?" },
	{ SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":SOUR:VOLT:PROT:TRIP?" },
	{ SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV?" },
	{ SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV %.6f" },
	{ SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":SOUR:CURR:PROT:STAT?" },
	{ SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":SOUR:CURR:PROT:STAT ON" },
	{ SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":SOUR:CURR:PROT:STAT OFF" },
	{ SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":SOUR:CURR:PROT:TRIP?" },
};

SR_PRIV const struct scpi_pps pps_profiles[] = {
	/* Chroma 61604 */
	{ "Chroma", "61604", 0,
		ARRAY_AND_SIZE(chroma_61604_devopts),
		ARRAY_AND_SIZE(chroma_61604_devopts_cg),
		ARRAY_AND_SIZE(chroma_61604_ch),
		ARRAY_AND_SIZE(chroma_61604_cg),
		ARRAY_AND_SIZE(chroma_61604_cmd),
		.probe_channels = NULL,
	},
	/* HP 6632B */
	{ "HP", "6632B", 0,
		ARRAY_AND_SIZE(hp_6632b_devopts),
		ARRAY_AND_SIZE(devopts_none),
		ARRAY_AND_SIZE(hp_6632b_ch),
		ARRAY_AND_SIZE(hp_6632b_cg),
		ARRAY_AND_SIZE(hp_6632b_cmd),
		.probe_channels = NULL,
	},

	/* Rigol DP800 series */
	{ "Rigol", "^DP821A$", PPS_OTP,
		ARRAY_AND_SIZE(rigol_dp800_devopts),
		ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
		ARRAY_AND_SIZE(rigol_dp821a_ch),
		ARRAY_AND_SIZE(rigol_dp820_cg),
		ARRAY_AND_SIZE(rigol_dp800_cmd),
		.probe_channels = NULL,
	},
	{ "Rigol", "^DP831A$", PPS_OTP,
		ARRAY_AND_SIZE(rigol_dp800_devopts),
		ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
		ARRAY_AND_SIZE(rigol_dp831_ch),
		ARRAY_AND_SIZE(rigol_dp830_cg),
		ARRAY_AND_SIZE(rigol_dp800_cmd),
		.probe_channels = NULL,
	},
	{ "Rigol", "^(DP832|DP832A)$", PPS_OTP,
		ARRAY_AND_SIZE(rigol_dp800_devopts),
		ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
		ARRAY_AND_SIZE(rigol_dp832_ch),
		ARRAY_AND_SIZE(rigol_dp830_cg),
		ARRAY_AND_SIZE(rigol_dp800_cmd),
		.probe_channels = NULL,
	},

	/* Philips/Fluke PM2800 series */
	{ "Philips", "^PM28[13][123]/[01234]{1,2}$", 0,
		ARRAY_AND_SIZE(philips_pm2800_devopts),
		ARRAY_AND_SIZE(philips_pm2800_devopts_cg),
		NULL, 0,
		NULL, 0,
		ARRAY_AND_SIZE(philips_pm2800_cmd),
		philips_pm2800_probe_channels,
	},
};

SR_PRIV unsigned int num_pps_profiles = ARRAY_SIZE(pps_profiles);
Commit	Line	Data
d4eabea8 BV	1	/*
	2	* This file is part of the libsigrok project.
	3	*
	4	* Copyright (C) 2014 Bert Vermeulen <bert@biot.com>
4ee1e2f3 AG	5	* Copyright (C) 2015 Google, Inc.
4ee1e2f3 AG	6	* (Written by Alexandru Gagniuc <mrnuke@google.com> for Google, Inc.)
d4eabea8 BV	7	*
	8	* This program is free software: you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation, either version 3 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	20	*/
	21
22c18b03	22	#include <string.h>
ba464a12	23	#include <strings.h>
d4eabea8 BV	24	#include "protocol.h"
	25
	26	#define CH_IDX(x) (1 << x)
	27
22c18b03 BV	28	const char *pps_vendors[][2] = {
22c18b03 BV	29	{ "RIGOL TECHNOLOGIES", "Rigol" },
bc4a2a46	30	{ "HEWLETT-PACKARD", "HP" },
c3eadb07	31	{ "PHILIPS", "Philips" },
4ee1e2f3	32	{ "Chroma ATE", "Chroma" },
d4eabea8 BV	33	};
d4eabea8 BV	34
22c18b03 BV	35	const char get_vendor(const char raw_vendor)
	36	{
	37	unsigned int i;
	38
	39	for (i = 0; i < ARRAY_SIZE(pps_vendors); i++) {
	40	if (!strcasecmp(raw_vendor, pps_vendors[i][0]))
	41	return pps_vendors[i][1];
	42	}
	43
	44	return raw_vendor;
	45	}
	46
584560f1	47	static const uint32_t devopts_none[] = { };
bfc86799	48
4ee1e2f3 AG	49	/* Chroma 61600 series AC source */
	50	static const uint32_t chroma_61604_devopts[] = {
	51	SR_CONF_CONTINUOUS \| SR_CONF_SET,
	52	};
	53
	54	static const uint32_t chroma_61604_devopts_cg[] = {
	55	SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD \| SR_CONF_GET \| SR_CONF_SET,
	56	SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD \| SR_CONF_GET \| SR_CONF_SET,
	57	SR_CONF_OUTPUT_VOLTAGE \| SR_CONF_GET,
	58	SR_CONF_OUTPUT_VOLTAGE_TARGET \| SR_CONF_GET \| SR_CONF_SET \| SR_CONF_LIST,
	59	SR_CONF_OUTPUT_CURRENT \| SR_CONF_GET,
	60	SR_CONF_OUTPUT_ENABLED \| SR_CONF_GET \| SR_CONF_SET,
	61	};
	62
	63	const struct channel_spec chroma_61604_ch[] = {
	64	{ "1", { 0, 300, 0.1 }, { 0, 16, 0.1 } },
	65	};
	66
	67	const struct channel_group_spec chroma_61604_cg[] = {
	68	{ "1", CH_IDX(0), PPS_OVP \| PPS_OCP },
	69	};
	70
	71	const struct scpi_command chroma_61604_cmd[] = {
	72	{ SCPI_CMD_REMOTE, "SYST:REM" },
	73	{ SCPI_CMD_LOCAL, "SYST:LOC" },
	74	{ SCPI_CMD_GET_MEAS_VOLTAGE, ":FETC:VOLT:ACDC?" },
	75	{ SCPI_CMD_GET_MEAS_CURRENT, ":FETC:CURR:AC?" },
	76	{ SCPI_CMD_GET_MEAS_POWER, ":FETC:POW:AC?" },
	77	{ SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT:AC?" },
	78	{ SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT:AC %.1f" },
	79	{ SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
	80	{ SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
	81	{ SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
	82	{ SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC?" },
	83	{ SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC %.1f" },
	84	/* This is not a current limit mode. It is overcurrent protection */
	85	{ SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM?" },
	86	{ SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM %.2f" },
	87	};
	88
d4eabea8	89	/* Rigol DP800 series */
584560f1	90	static const uint32_t rigol_dp800_devopts[] = {
9d9cf1c4	91	SR_CONF_CONTINUOUS \| SR_CONF_SET,
5827f61b	92	SR_CONF_OVER_TEMPERATURE_PROTECTION \| SR_CONF_GET \| SR_CONF_SET,
d4eabea8 BV	93	};
d4eabea8 BV	94
584560f1	95	static const uint32_t rigol_dp800_devopts_cg[] = {
5827f61b BV	96	SR_CONF_OUTPUT_REGULATION \| SR_CONF_GET,
	97	SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED \| SR_CONF_GET \| SR_CONF_SET,
	98	SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE \| SR_CONF_GET,
	99	SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD \| SR_CONF_GET \| SR_CONF_SET,
	100	SR_CONF_OVER_CURRENT_PROTECTION_ENABLED \| SR_CONF_GET \| SR_CONF_SET,
	101	SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE \| SR_CONF_GET,
	102	SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD \| SR_CONF_GET \| SR_CONF_SET,
	103	SR_CONF_OUTPUT_VOLTAGE \| SR_CONF_GET,
ca95e90f	104	SR_CONF_OUTPUT_VOLTAGE_TARGET \| SR_CONF_GET \| SR_CONF_SET \| SR_CONF_LIST,
5827f61b	105	SR_CONF_OUTPUT_CURRENT \| SR_CONF_GET,
ca95e90f	106	SR_CONF_OUTPUT_CURRENT_LIMIT \| SR_CONF_GET \| SR_CONF_SET \| SR_CONF_LIST,
5827f61b	107	SR_CONF_OUTPUT_ENABLED \| SR_CONF_GET \| SR_CONF_SET,
d4eabea8 BV	108	};
d4eabea8 BV	109
329733d9	110	const struct channel_spec rigol_dp821a_ch[] = {
cfcdf576 ML	111	{ "1", { 0, 60, 0.001 }, { 0, 1, 0.0001 } },
	112	{ "2", { 0, 8, 0.001 }, { 0, 10, 0.001 } },
	113	};
	114
329733d9	115	const struct channel_spec rigol_dp831_ch[] = {
3222ee10 BV	116	{ "1", { 0, 8, 0.001 }, { 0, 5, 0.0003 } },
	117	{ "2", { 0, 30, 0.001 }, { 0, 2, 0.0001 } },
	118	{ "3", { 0, -30, 0.001 }, { 0, 2, 0.0001 } },
d4eabea8 BV	119	};
d4eabea8 BV	120
329733d9	121	const struct channel_spec rigol_dp832_ch[] = {
3222ee10 BV	122	{ "1", { 0, 30, 0.001 }, { 0, 3, 0.001 } },
	123	{ "2", { 0, 30, 0.001 }, { 0, 3, 0.001 } },
	124	{ "3", { 0, 5, 0.001 }, { 0, 3, 0.001 } },
	125	};
	126
329733d9	127	const struct channel_group_spec rigol_dp820_cg[] = {
cfcdf576 ML	128	{ "1", CH_IDX(0), PPS_OVP \| PPS_OCP },
	129	{ "2", CH_IDX(1), PPS_OVP \| PPS_OCP },
	130	};
	131
329733d9	132	const struct channel_group_spec rigol_dp830_cg[] = {
d4eabea8 BV	133	{ "1", CH_IDX(0), PPS_OVP \| PPS_OCP },
	134	{ "2", CH_IDX(1), PPS_OVP \| PPS_OCP },
	135	{ "3", CH_IDX(2), PPS_OVP \| PPS_OCP },
	136	};
	137
329733d9	138	const struct scpi_command rigol_dp800_cmd[] = {
60475cd7 BV	139	{ SCPI_CMD_REMOTE, "SYST:REMOTE" },
60475cd7 BV	140	{ SCPI_CMD_LOCAL, "SYST:LOCAL" },
ee2860ee BV	141	{ SCPI_CMD_BEEPER, "SYST:BEEP:STAT?" },
	142	{ SCPI_CMD_BEEPER_ENABLE, "SYST:BEEP:STAT ON" },
	143	{ SCPI_CMD_BEEPER_DISABLE, "SYST:BEEP:STAT OFF" },
60475cd7 BV	144	{ SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
	145	{ SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
	146	{ SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
	147	{ SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE?" },
	148	{ SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
	149	{ SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
	150	{ SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
	151	{ SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
	152	{ SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
	153	{ SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
	154	{ SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
	155	{ SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" },
d4eabea8	156	{ SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP?" },
53a81803 BV	157	{ SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_ENABLE, ":SYST:OTP ON" },
53a81803 BV	158	{ SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_DISABLE, ":SYST:OTP OFF" },
60475cd7 BV	159	{ SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP?" },
	160	{ SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP ON" },
	161	{ SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP OFF" },
	162	{ SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES?" },
	163	{ SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL?" },
	164	{ SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL %.6f" },
	165	{ SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP?" },
	166	{ SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP:STAT ON" },
	167	{ SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP:STAT OFF" },
	168	{ SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES?" },
	169	{ SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL?" },
	170	{ SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL %.6f" },
d4eabea8 BV	171	};
d4eabea8 BV	172
bfc86799	173	/* HP 663xx series */
584560f1	174	static const uint32_t hp_6632b_devopts[] = {
9d9cf1c4	175	SR_CONF_CONTINUOUS \| SR_CONF_SET,
5827f61b BV	176	SR_CONF_OUTPUT_ENABLED \| SR_CONF_GET \| SR_CONF_SET,
	177	SR_CONF_OUTPUT_VOLTAGE \| SR_CONF_GET,
	178	SR_CONF_OUTPUT_CURRENT \| SR_CONF_GET,
ca95e90f BV	179	SR_CONF_OUTPUT_VOLTAGE_TARGET \| SR_CONF_GET \| SR_CONF_SET \| SR_CONF_LIST,
ca95e90f BV	180	SR_CONF_OUTPUT_CURRENT_LIMIT \| SR_CONF_GET \| SR_CONF_SET \| SR_CONF_LIST,
bc4a2a46 BV	181	};
bc4a2a46 BV	182
329733d9	183	const struct channel_spec hp_6632b_ch[] = {
bc4a2a46 BV	184	{ "1", { 0, 20.475, 0.005 }, { 0, 5.1188, 0.00132 } },
	185	};
	186
329733d9	187	const struct channel_group_spec hp_6632b_cg[] = {
bc4a2a46 BV	188	{ "1", CH_IDX(0), 0 },
	189	};
	190
329733d9	191	const struct scpi_command hp_6632b_cmd[] = {
bc4a2a46	192	{ SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP:STAT?" },
53a81803 BV	193	{ SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP:STAT ON" },
53a81803 BV	194	{ SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP:STAT OFF" },
bc4a2a46 BV	195	{ SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
bc4a2a46 BV	196	{ SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
ca95e90f BV	197	{ SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
	198	{ SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
	199	{ SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
	200	{ SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
bc4a2a46 BV	201	};
bc4a2a46 BV	202
c3eadb07	203	/* Philips/Fluke PM2800 series */
9d9cf1c4 BV	204	static const uint32_t philips_pm2800_devopts[] = {
	205	SR_CONF_CONTINUOUS \| SR_CONF_SET,
	206	};
	207
c3eadb07 BV	208	static const uint32_t philips_pm2800_devopts_cg[] = {
	209	SR_CONF_OUTPUT_ENABLED \| SR_CONF_GET \| SR_CONF_SET,
	210	SR_CONF_OUTPUT_VOLTAGE \| SR_CONF_GET,
	211	SR_CONF_OUTPUT_VOLTAGE_TARGET \| SR_CONF_GET \| SR_CONF_SET \| SR_CONF_LIST,
	212	SR_CONF_OUTPUT_CURRENT \| SR_CONF_GET,
	213	SR_CONF_OUTPUT_CURRENT_LIMIT \| SR_CONF_GET \| SR_CONF_SET \| SR_CONF_LIST,
	214	SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE \| SR_CONF_GET,
	215	SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD \| SR_CONF_GET \| SR_CONF_SET,
	216	SR_CONF_OVER_CURRENT_PROTECTION_ENABLED \| SR_CONF_GET \| SR_CONF_SET,
	217	SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE \| SR_CONF_GET,
	218	SR_CONF_OUTPUT_REGULATION \| SR_CONF_GET,
	219	};
	220
	221	enum philips_pm2800_modules {
	222	PM2800_MOD_30V_10A = 1,
	223	PM2800_MOD_60V_5A,
	224	PM2800_MOD_60V_10A,
	225	PM2800_MOD_8V_15A,
	226	PM2800_MOD_60V_2A,
	227	PM2800_MOD_120V_1A,
	228	};
	229
329733d9	230	static const struct philips_pm2800_module_spec {
c3eadb07 BV	231	/* Min, max, programming resolution. */
	232	float voltage[3];
	233	float current[3];
	234	} philips_pm2800_module_specs[] = {
	235	/* Autoranging modules. */
	236	[PM2800_MOD_30V_10A] = { { 0, 30, 0.0075 }, { 0, 10, 0.0025 } },
	237	[PM2800_MOD_60V_5A] = { { 0, 60, 0.015 }, { 0, 5, 0.00125 } },
	238	[PM2800_MOD_60V_10A] = { { 0, 60, 0.015 }, { 0, 10, 0.0025 } },
	239	/* Linear modules. */
	240	[PM2800_MOD_8V_15A] = { { 0, 8, 0.002 }, { -15, 15, 0.00375 } },
	241	[PM2800_MOD_60V_2A] = { { 0, 60, 0.015 }, { -2, 2, 0.0005 } },
	242	[PM2800_MOD_120V_1A] = { { 0, 120, 0.030 }, { -1, 1, 0.00025 } },
	243	};
	244
329733d9	245	static const struct philips_pm2800_model {
c3eadb07 BV	246	unsigned int chassis;
	247	unsigned int num_modules;
	248	unsigned int set;
	249	unsigned int modules[3];
	250	} philips_pm2800_matrix[] = {
	251	/* Autoranging chassis. */
	252	{ 1, 1, 0, { PM2800_MOD_30V_10A, 0, 0 } },
	253	{ 1, 1, 1, { PM2800_MOD_60V_5A, 0, 0 } },
	254	{ 1, 2, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, 0 } },
	255	{ 1, 2, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, 0 } },
	256	{ 1, 2, 2, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, 0 } },
	257	{ 1, 2, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_10A, 0 } },
	258	{ 1, 2, 4, { PM2800_MOD_60V_5A, PM2800_MOD_60V_10A, 0 } },
	259	{ 1, 3, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_30V_10A } },
	260	{ 1, 3, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
	261	{ 1, 3, 2, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_60V_5A } },
	262	{ 1, 3, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
	263	/* Linear chassis. */
	264	{ 3, 1, 0, { PM2800_MOD_60V_2A, 0, 0 } },
	265	{ 3, 1, 1, { PM2800_MOD_120V_1A, 0, 0 } },
	266	{ 3, 1, 2, { PM2800_MOD_8V_15A, 0, 0 } },
	267	{ 3, 2, 0, { PM2800_MOD_60V_2A, 0, 0 } },
	268	{ 3, 2, 1, { PM2800_MOD_120V_1A, 0, 0 } },
	269	{ 3, 2, 2, { PM2800_MOD_60V_2A, PM2800_MOD_120V_1A, 0 } },
	270	{ 3, 2, 3, { PM2800_MOD_8V_15A, PM2800_MOD_8V_15A, 0 } },
	271	};
	272
329733d9	273	static const char *philips_pm2800_names[] = { "1", "2", "3" };
c3eadb07 BV	274
	275	static int philips_pm2800_probe_channels(struct sr_dev_inst *sdi,
	276	struct sr_scpi_hw_info *hw_info,
	277	struct channel_spec *channels, unsigned int num_channels,
	278	struct channel_group_spec *channel_groups, unsigned int num_channel_groups)
	279	{
329733d9 UH	280	const struct philips_pm2800_model *model;
329733d9 UH	281	const struct philips_pm2800_module_spec *spec;
c3eadb07 BV	282	unsigned int chassis, num_modules, set, module, m, i;
	283
	284	(void)sdi;
	285
	286	/*
	287	* The model number as reported by *IDN? looks like e.g. PM2813/11,
	288	* Where "PM28" is fixed, followed by the chassis code (1 = autoranging,
	289	* 3 = linear series) and the number of modules: 1-3 for autoranging,
	290	* 1-2 for linear.
	291	* After the slash, the first digit denotes the module set. The
	292	* digit after that denotes front (5) or rear (1) binding posts.
	293	*/
	294	chassis = hw_info->model[4] - 0x30;
	295	num_modules = hw_info->model[5] - 0x30;
	296	set = hw_info->model[7] - 0x30;
	297	for (m = 0; m < ARRAY_SIZE(philips_pm2800_matrix); m++) {
	298	model = &philips_pm2800_matrix[m];
	299	if (model->chassis == chassis && model->num_modules == num_modules
	300	&& model->set == set)
	301	break;
	302	}
	303	if (m == ARRAY_SIZE(philips_pm2800_matrix)) {
	304	sr_dbg("Model %s not found in matrix.", hw_info->model);
	305	return SR_ERR;
	306	}
	307
	308	sr_dbg("Found %d output channel%s:", num_modules, num_modules > 1 ? "s" : "");
	309	channels = g_malloc0(sizeof(struct channel_spec) num_modules);
	310	channel_groups = g_malloc0(sizeof(struct channel_group_spec) num_modules);
	311	for (i = 0; i < num_modules; i++) {
	312	module = model->modules[i];
	313	spec = &philips_pm2800_module_specs[module];
	314	sr_dbg("output %d: %.0f - %.0fV, %.0f - %.0fA", i + 1,
	315	spec->voltage[0], spec->voltage[1],
	316	spec->current[0], spec->current[1]);
329733d9	317	(channels)[i].name = (char )philips_pm2800_names[i];
c3eadb07	318	memcpy(&((channels)[i].voltage), spec, sizeof(float) 6);
329733d9	319	(channel_groups)[i].name = (char )philips_pm2800_names[i];
c3eadb07 BV	320	(*channel_groups)[i].channel_index_mask = 1 << i;
	321	(*channel_groups)[i].features = PPS_OTP \| PPS_OVP \| PPS_OCP;
	322	}
	323	num_channels = num_channel_groups = num_modules;
	324
	325	return SR_OK;
	326	}
	327
329733d9	328	const struct scpi_command philips_pm2800_cmd[] = {
c3eadb07 BV	329	{ SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
	330	{ SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
	331	{ SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
	332	{ SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
	333	{ SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
	334	{ SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
	335	{ SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
	336	{ SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
	337	{ SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
	338	{ SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
	339	{ SCPI_CMD_GET_OUTPUT_REGULATION, ":SOUR:FUNC:MODE?" },
	340	{ SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":SOUR:VOLT:PROT:TRIP?" },
	341	{ SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV?" },
	342	{ SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV %.6f" },
	343	{ SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":SOUR:CURR:PROT:STAT?" },
	344	{ SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":SOUR:CURR:PROT:STAT ON" },
	345	{ SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":SOUR:CURR:PROT:STAT OFF" },
	346	{ SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":SOUR:CURR:PROT:TRIP?" },
	347	};
	348
d4eabea8	349	SR_PRIV const struct scpi_pps pps_profiles[] = {
4ee1e2f3 AG	350	/* Chroma 61604 */
	351	{ "Chroma", "61604", 0,
	352	ARRAY_AND_SIZE(chroma_61604_devopts),
	353	ARRAY_AND_SIZE(chroma_61604_devopts_cg),
	354	ARRAY_AND_SIZE(chroma_61604_ch),
	355	ARRAY_AND_SIZE(chroma_61604_cg),
	356	ARRAY_AND_SIZE(chroma_61604_cmd),
	357	.probe_channels = NULL,
	358	},
bc4a2a46 BV	359	/* HP 6632B */
	360	{ "HP", "6632B", 0,
	361	ARRAY_AND_SIZE(hp_6632b_devopts),
bfc86799	362	ARRAY_AND_SIZE(devopts_none),
bc4a2a46 BV	363	ARRAY_AND_SIZE(hp_6632b_ch),
	364	ARRAY_AND_SIZE(hp_6632b_cg),
	365	ARRAY_AND_SIZE(hp_6632b_cmd),
c3eadb07	366	.probe_channels = NULL,
bc4a2a46 BV	367	},
bc4a2a46 BV	368
d4eabea8	369	/* Rigol DP800 series */
cfcdf576 ML	370	{ "Rigol", "^DP821A$", PPS_OTP,
	371	ARRAY_AND_SIZE(rigol_dp800_devopts),
	372	ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
	373	ARRAY_AND_SIZE(rigol_dp821a_ch),
	374	ARRAY_AND_SIZE(rigol_dp820_cg),
	375	ARRAY_AND_SIZE(rigol_dp800_cmd),
	376	.probe_channels = NULL,
	377	},
3222ee10 BV	378	{ "Rigol", "^DP831A$", PPS_OTP,
	379	ARRAY_AND_SIZE(rigol_dp800_devopts),
	380	ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
	381	ARRAY_AND_SIZE(rigol_dp831_ch),
cfcdf576	382	ARRAY_AND_SIZE(rigol_dp830_cg),
3222ee10	383	ARRAY_AND_SIZE(rigol_dp800_cmd),
c3eadb07	384	.probe_channels = NULL,
3222ee10 BV	385	},
	386	{ "Rigol", "^(DP832\|DP832A)$", PPS_OTP,
	387	ARRAY_AND_SIZE(rigol_dp800_devopts),
	388	ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
	389	ARRAY_AND_SIZE(rigol_dp832_ch),
cfcdf576	390	ARRAY_AND_SIZE(rigol_dp830_cg),
3222ee10	391	ARRAY_AND_SIZE(rigol_dp800_cmd),
c3eadb07 BV	392	.probe_channels = NULL,
	393	},
	394
	395	/* Philips/Fluke PM2800 series */
	396	{ "Philips", "^PM28[13][123]/[01234]{1,2}$", 0,
9d9cf1c4	397	ARRAY_AND_SIZE(philips_pm2800_devopts),
c3eadb07 BV	398	ARRAY_AND_SIZE(philips_pm2800_devopts_cg),
	399	NULL, 0,
	400	NULL, 0,
	401	ARRAY_AND_SIZE(philips_pm2800_cmd),
	402	philips_pm2800_probe_channels,
d4eabea8 BV	403	},
d4eabea8 BV	404	};
d4eabea8	405
1beccaed	406	SR_PRIV unsigned int num_pps_profiles = ARRAY_SIZE(pps_profiles);