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drivers: Factor out std_gvar_min_max_step{,_array}().
[libsigrok.git] / src / hardware / scpi-pps / profiles.c
CommitLineData
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2014 Bert Vermeulen <bert@biot.com>
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5 * Copyright (C) 2015 Google, Inc.
6 * (Written by Alexandru Gagniuc <mrnuke@google.com> for Google, Inc.)
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7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
6ec6c43b 22#include <config.h>
22c18b03 23#include <string.h>
ba464a12 24#include <strings.h>
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25#include "protocol.h"
26
27#define CH_IDX(x) (1 << x)
6ed709fe 28#define FREQ_DC_ONLY {0, 0, 0, 0, 0}
d4eabea8 29
584560f1 30static const uint32_t devopts_none[] = { };
bfc86799 31
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32/* Agilent/Keysight N5700A series */
33static const uint32_t agilent_n5700a_devopts[] = {
e91bb0a6 34 SR_CONF_CONTINUOUS,
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35};
36
37static const uint32_t agilent_n5700a_devopts_cg[] = {
38 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
39 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
40 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
da005885
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41 SR_CONF_VOLTAGE | SR_CONF_GET,
42 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
43 SR_CONF_CURRENT | SR_CONF_GET,
44 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
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45};
46
6cc93128
AG
47static const struct channel_group_spec agilent_n5700a_cg[] = {
48 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
49};
50
8cb5affe 51static const struct channel_spec agilent_n5767a_ch[] = {
6ed709fe 52 { "1", { 0, 60, 0.0072, 3, 4 }, { 0, 25, 0.003, 3, 4 }, { 0, 1500 }, FREQ_DC_ONLY },
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53};
54
6cc93128 55static const struct channel_spec agilent_n5763a_ch[] = {
6ed709fe 56 { "1", { 0, 12.5, 0.0015, 3, 4 }, { 0, 120, 0.0144, 3, 4 }, { 0, 1500 }, FREQ_DC_ONLY },
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57};
58
59/*
60 * TODO: OVER_CURRENT_PROTECTION_ACTIVE status can be determined by the OC bit
562a3490 61 * in STAT:QUES:EVEN?, but this is not implemented.
5c9e56c9 62 */
8cb5affe 63static const struct scpi_command agilent_n5700a_cmd[] = {
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64 { SCPI_CMD_REMOTE, "SYST:COMM:RLST REM" },
65 { SCPI_CMD_LOCAL, "SYST:COMM:RLST LOC" },
66 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
67 { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" },
68 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
69 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
70 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
71 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
72 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP:STAT?" },
73 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
74 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
75 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT?" },
76 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT %.6f" },
77 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":CURR:PROT:STAT?" },
78 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":CURR:PROT:STAT ON?"},
79 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":CURR:PROT:STAT OFF?"},
562a3490 80 /* Current limit (CC mode) and OCP are set using the same command. */
5c9e56c9
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81 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR?" },
82 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR %.6f" },
91ef511d 83 ALL_ZERO
5c9e56c9
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84};
85
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86/* Chroma 61600 series AC source */
87static const uint32_t chroma_61604_devopts[] = {
e91bb0a6 88 SR_CONF_CONTINUOUS,
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89};
90
91static const uint32_t chroma_61604_devopts_cg[] = {
92 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
93 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
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94 SR_CONF_VOLTAGE | SR_CONF_GET,
95 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
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96 SR_CONF_OUTPUT_FREQUENCY | SR_CONF_GET,
97 SR_CONF_OUTPUT_FREQUENCY_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
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98 SR_CONF_CURRENT | SR_CONF_GET,
99 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
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100};
101
8cb5affe 102static const struct channel_spec chroma_61604_ch[] = {
6ed709fe 103 { "1", { 0, 300, 0.1, 1, 1 }, { 0, 16, 0.1, 2, 2 }, { 0, 2000, 0, 1, 1 }, { 1.0, 1000.0, 0.01 } },
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104};
105
8cb5affe 106static const struct channel_group_spec chroma_61604_cg[] = {
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107 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
108};
109
8cb5affe 110static const struct scpi_command chroma_61604_cmd[] = {
4ee1e2f3
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111 { SCPI_CMD_REMOTE, "SYST:REM" },
112 { SCPI_CMD_LOCAL, "SYST:LOC" },
113 { SCPI_CMD_GET_MEAS_VOLTAGE, ":FETC:VOLT:ACDC?" },
6c0c9dd2 114 { SCPI_CMD_GET_MEAS_FREQUENCY, ":FETC:FREQ?" },
4ee1e2f3
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115 { SCPI_CMD_GET_MEAS_CURRENT, ":FETC:CURR:AC?" },
116 { SCPI_CMD_GET_MEAS_POWER, ":FETC:POW:AC?" },
117 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT:AC?" },
118 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT:AC %.1f" },
6c0c9dd2
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119 { SCPI_CMD_GET_FREQUENCY_TARGET, ":SOUR:FREQ?" },
120 { SCPI_CMD_SET_FREQUENCY_TARGET, ":SOUR:FREQ %.2f" },
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121 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
122 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
123 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
124 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC?" },
125 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC %.1f" },
562a3490 126 /* This is not a current limit mode. It is overcurrent protection. */
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127 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM?" },
128 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM %.2f" },
91ef511d 129 ALL_ZERO
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130};
131
5281993e 132/* Chroma 62000 series DC source */
5281993e 133static const uint32_t chroma_62000_devopts[] = {
e91bb0a6 134 SR_CONF_CONTINUOUS,
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135};
136
137static const uint32_t chroma_62000_devopts_cg[] = {
138 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
139 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
140 SR_CONF_VOLTAGE | SR_CONF_GET,
141 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
142 SR_CONF_CURRENT | SR_CONF_GET,
143 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
144 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
145};
146
5281993e
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147static const struct channel_group_spec chroma_62000_cg[] = {
148 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
149};
150
151static const struct scpi_command chroma_62000_cmd[] = {
152 { SCPI_CMD_REMOTE, ":CONF:REM ON" },
153 { SCPI_CMD_LOCAL, ":CONF:REM OFF" },
154 { SCPI_CMD_BEEPER, ":CONF:BEEP?" },
155 { SCPI_CMD_BEEPER_ENABLE, ":CONF:BEEP ON" },
156 { SCPI_CMD_BEEPER_DISABLE, ":CONF:BEEP OFF" },
157 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
158 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
159 { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POW?" },
160 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
161 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.2f" },
162 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
163 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
164 { SCPI_CMD_GET_OUTPUT_ENABLED, ":CONF:OUTP?" },
165 { SCPI_CMD_SET_OUTPUT_ENABLE, ":CONF:OUTP ON" },
166 { SCPI_CMD_SET_OUTPUT_DISABLE, ":CONF:OUTP OFF" },
167 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:HIGH?" },
168 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:HIGH %.6f" },
169 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT:HIGH?" },
170 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT:HIGH %.6f" },
91ef511d 171 ALL_ZERO
5281993e
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172};
173
9a5185c7
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174static int chroma_62000p_probe_channels(struct sr_dev_inst *sdi,
175 struct sr_scpi_hw_info *hw_info,
176 struct channel_spec **channels, unsigned int *num_channels,
177 struct channel_group_spec **channel_groups,
178 unsigned int *num_channel_groups)
179{
6ed709fe 180 unsigned int volts, amps, watts;
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181 struct channel_spec *channel;
182
183 (void)sdi;
184
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185 sscanf(hw_info->model, "620%uP-%u-%u", &watts, &volts, &amps);
186 watts *= 100;
187 sr_dbg("Found device rated for %d V, %d A and %d W", volts, amps, watts);
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188
189 if (volts > 600) {
190 sr_err("Probed max voltage of %u V is out of spec.", volts);
191 return SR_ERR_BUG;
192 }
193
6ed709fe 194 if (amps > 120) {
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195 sr_err("Probed max current of %u A is out of spec.", amps);
196 return SR_ERR_BUG;
197 }
198
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199 if (watts > 5000) {
200 sr_err("Probed max power of %u W is out of spec.", watts);
201 return SR_ERR_BUG;
202 }
203
9a5185c7
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204 channel = g_malloc0(sizeof(struct channel_spec));
205 channel->name = "1";
6ed709fe 206 channel->voltage[0] = channel->current[0] = channel->power[0] = 0.0;
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207 channel->voltage[1] = (float)volts;
208 channel->current[1] = (float)amps;
6ed709fe 209 channel->power[1] = (float)watts;
9a5185c7 210 channel->voltage[2] = channel->current[2] = 0.01;
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211 channel->voltage[3] = channel->voltage[4] = 3;
212 channel->current[3] = channel->current[4] = 4;
9a5185c7
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213 *channels = channel;
214 *num_channels = 1;
215
216 *channel_groups = g_malloc(sizeof(struct channel_group_spec));
217 **channel_groups = chroma_62000_cg[0];
218 *num_channel_groups = 1;
219
220 return SR_OK;
221}
222
d4eabea8 223/* Rigol DP800 series */
584560f1 224static const uint32_t rigol_dp800_devopts[] = {
e91bb0a6 225 SR_CONF_CONTINUOUS,
5827f61b 226 SR_CONF_OVER_TEMPERATURE_PROTECTION | SR_CONF_GET | SR_CONF_SET,
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227};
228
584560f1 229static const uint32_t rigol_dp800_devopts_cg[] = {
7a0b98b5 230 SR_CONF_REGULATION | SR_CONF_GET,
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231 SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
232 SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
233 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
234 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
235 SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
236 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
7a0b98b5
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237 SR_CONF_VOLTAGE | SR_CONF_GET,
238 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
239 SR_CONF_CURRENT | SR_CONF_GET,
240 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
241 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
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242};
243
8cb5affe 244static const struct channel_spec rigol_dp821a_ch[] = {
6ed709fe
AJ
245 { "1", { 0, 60, 0.001, 3, 3 }, { 0, 1, 0.0001, 4, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY },
246 { "2", { 0, 8, 0.001, 3, 3 }, { 0, 10, 0.001, 3, 3 }, { 0, 80, 0, 3, 3 }, FREQ_DC_ONLY },
cfcdf576
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247};
248
8cb5affe 249static const struct channel_spec rigol_dp831_ch[] = {
6ed709fe
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250 { "1", { 0, 8, 0.001, 3, 4 }, { 0, 5, 0.0003, 3, 4 }, { 0, 40, 0, 3, 4 }, FREQ_DC_ONLY },
251 { "2", { 0, 30, 0.001, 3, 4 }, { 0, 2, 0.0001, 3, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY },
252 { "3", { 0, -30, 0.001, 3, 4 }, { 0, 2, 0.0001, 3, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY },
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253};
254
8cb5affe 255static const struct channel_spec rigol_dp832_ch[] = {
6ed709fe
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256 { "1", { 0, 30, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY },
257 { "2", { 0, 30, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY },
258 { "3", { 0, 5, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY },
3222ee10
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259};
260
8cb5affe 261static const struct channel_group_spec rigol_dp820_cg[] = {
cfcdf576
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262 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
263 { "2", CH_IDX(1), PPS_OVP | PPS_OCP },
264};
265
8cb5affe 266static const struct channel_group_spec rigol_dp830_cg[] = {
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267 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
268 { "2", CH_IDX(1), PPS_OVP | PPS_OCP },
269 { "3", CH_IDX(2), PPS_OVP | PPS_OCP },
270};
271
8cb5affe 272static const struct scpi_command rigol_dp800_cmd[] = {
60475cd7
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273 { SCPI_CMD_REMOTE, "SYST:REMOTE" },
274 { SCPI_CMD_LOCAL, "SYST:LOCAL" },
ee2860ee
BV
275 { SCPI_CMD_BEEPER, "SYST:BEEP:STAT?" },
276 { SCPI_CMD_BEEPER_ENABLE, "SYST:BEEP:STAT ON" },
277 { SCPI_CMD_BEEPER_DISABLE, "SYST:BEEP:STAT OFF" },
60475cd7
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278 { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
279 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
280 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
281 { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE?" },
282 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
283 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
284 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
285 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
286 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
287 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
288 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
289 { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" },
d4eabea8 290 { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP?" },
53a81803
BV
291 { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_ENABLE, ":SYST:OTP ON" },
292 { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_DISABLE, ":SYST:OTP OFF" },
60475cd7
BV
293 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP?" },
294 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP ON" },
295 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP OFF" },
296 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES?" },
297 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL?" },
298 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL %.6f" },
299 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP?" },
300 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP:STAT ON" },
301 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP:STAT OFF" },
302 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES?" },
303 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL?" },
304 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL %.6f" },
91ef511d 305 ALL_ZERO
d4eabea8
BV
306};
307
bfc86799 308/* HP 663xx series */
e76a3575
AG
309static const uint32_t hp_6630a_devopts[] = {
310 SR_CONF_CONTINUOUS,
311 SR_CONF_ENABLED | SR_CONF_SET,
312 SR_CONF_VOLTAGE | SR_CONF_GET,
313 SR_CONF_CURRENT | SR_CONF_GET,
314 SR_CONF_VOLTAGE_TARGET | SR_CONF_SET | SR_CONF_LIST,
315 SR_CONF_CURRENT_LIMIT | SR_CONF_SET | SR_CONF_LIST,
316 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_SET,
317 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_SET,
318};
319
584560f1 320static const uint32_t hp_6632b_devopts[] = {
e91bb0a6 321 SR_CONF_CONTINUOUS,
7a0b98b5
AJ
322 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
323 SR_CONF_VOLTAGE | SR_CONF_GET,
324 SR_CONF_CURRENT | SR_CONF_GET,
325 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
326 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
bc4a2a46
BV
327};
328
e76a3575 329static const struct channel_spec hp_6633a_ch[] = {
6ed709fe 330 { "1", { 0, 51.188, 0.0125, 3, 4 }, { 0, 2.0475, 0.0005, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY },
e76a3575
AG
331};
332
8cb5affe 333static const struct channel_spec hp_6632b_ch[] = {
6ed709fe 334 { "1", { 0, 20.475, 0.005, 3, 4 }, { 0, 5.1188, 0.00132, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY },
bc4a2a46
BV
335};
336
e76a3575 337static const struct channel_group_spec hp_663xx_cg[] = {
bc4a2a46
BV
338 { "1", CH_IDX(0), 0 },
339};
340
e76a3575
AG
341static const struct scpi_command hp_6630a_cmd[] = {
342 { SCPI_CMD_SET_OUTPUT_ENABLE, "OUT 1" },
343 { SCPI_CMD_SET_OUTPUT_DISABLE, "OUT 0" },
344 { SCPI_CMD_GET_MEAS_VOLTAGE, "VOUT?" },
345 { SCPI_CMD_GET_MEAS_CURRENT, "IOUT?" },
346 { SCPI_CMD_SET_VOLTAGE_TARGET, "VSET %.4f" },
347 { SCPI_CMD_SET_CURRENT_LIMIT, "ISET %.4f" },
348 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, "OCP 1" },
349 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, "OCP 0" },
350 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "OVSET %.4f" },
351 ALL_ZERO
352};
353
8cb5affe 354static const struct scpi_command hp_6632b_cmd[] = {
bc4a2a46 355 { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP:STAT?" },
53a81803
BV
356 { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP:STAT ON" },
357 { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP:STAT OFF" },
bc4a2a46
BV
358 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
359 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
ca95e90f
BV
360 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
361 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
362 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
363 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
91ef511d 364 ALL_ZERO
bc4a2a46
BV
365};
366
c3eadb07 367/* Philips/Fluke PM2800 series */
9d9cf1c4 368static const uint32_t philips_pm2800_devopts[] = {
e91bb0a6 369 SR_CONF_CONTINUOUS,
9d9cf1c4
BV
370};
371
c3eadb07 372static const uint32_t philips_pm2800_devopts_cg[] = {
7a0b98b5
AJ
373 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
374 SR_CONF_VOLTAGE | SR_CONF_GET,
375 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
376 SR_CONF_CURRENT | SR_CONF_GET,
377 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
c3eadb07
BV
378 SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
379 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
380 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
381 SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
7a0b98b5 382 SR_CONF_REGULATION | SR_CONF_GET,
c3eadb07
BV
383};
384
385enum philips_pm2800_modules {
386 PM2800_MOD_30V_10A = 1,
387 PM2800_MOD_60V_5A,
388 PM2800_MOD_60V_10A,
389 PM2800_MOD_8V_15A,
390 PM2800_MOD_60V_2A,
391 PM2800_MOD_120V_1A,
392};
393
329733d9 394static const struct philips_pm2800_module_spec {
c3eadb07 395 /* Min, max, programming resolution. */
6ed709fe
AJ
396 float voltage[5];
397 float current[5];
398 float power[5];
c3eadb07
BV
399} philips_pm2800_module_specs[] = {
400 /* Autoranging modules. */
6ed709fe
AJ
401 [PM2800_MOD_30V_10A] = { { 0, 30, 0.0075, 2, 4 }, { 0, 10, 0.0025, 2, 4 }, { 0, 60 } },
402 [PM2800_MOD_60V_5A] = { { 0, 60, 0.015, 2, 3 }, { 0, 5, 0.00125, 2, 5 }, { 0, 60 } },
403 [PM2800_MOD_60V_10A] = { { 0, 60, 0.015, 2, 3 }, { 0, 10, 0.0025, 2, 5 }, { 0, 120 } },
c3eadb07 404 /* Linear modules. */
6ed709fe
AJ
405 [PM2800_MOD_8V_15A] = { { 0, 8, 0.002, 3, 3 }, { -15, 15, 0.00375, 3, 5 }, { 0, 120 } },
406 [PM2800_MOD_60V_2A] = { { 0, 60, 0.015, 2, 3 }, { -2, 2, 0.0005, 3, 4 }, { 0, 120 } },
407 [PM2800_MOD_120V_1A] = { { 0, 120, 0.030, 2, 2 }, { -1, 1, 0.00025, 3, 5 }, { 0, 120 } },
c3eadb07
BV
408};
409
329733d9 410static const struct philips_pm2800_model {
c3eadb07
BV
411 unsigned int chassis;
412 unsigned int num_modules;
413 unsigned int set;
414 unsigned int modules[3];
415} philips_pm2800_matrix[] = {
416 /* Autoranging chassis. */
417 { 1, 1, 0, { PM2800_MOD_30V_10A, 0, 0 } },
418 { 1, 1, 1, { PM2800_MOD_60V_5A, 0, 0 } },
419 { 1, 2, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, 0 } },
420 { 1, 2, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, 0 } },
421 { 1, 2, 2, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, 0 } },
422 { 1, 2, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_10A, 0 } },
423 { 1, 2, 4, { PM2800_MOD_60V_5A, PM2800_MOD_60V_10A, 0 } },
424 { 1, 3, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_30V_10A } },
425 { 1, 3, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
426 { 1, 3, 2, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_60V_5A } },
427 { 1, 3, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
428 /* Linear chassis. */
429 { 3, 1, 0, { PM2800_MOD_60V_2A, 0, 0 } },
430 { 3, 1, 1, { PM2800_MOD_120V_1A, 0, 0 } },
431 { 3, 1, 2, { PM2800_MOD_8V_15A, 0, 0 } },
432 { 3, 2, 0, { PM2800_MOD_60V_2A, 0, 0 } },
433 { 3, 2, 1, { PM2800_MOD_120V_1A, 0, 0 } },
434 { 3, 2, 2, { PM2800_MOD_60V_2A, PM2800_MOD_120V_1A, 0 } },
435 { 3, 2, 3, { PM2800_MOD_8V_15A, PM2800_MOD_8V_15A, 0 } },
436};
437
329733d9 438static const char *philips_pm2800_names[] = { "1", "2", "3" };
c3eadb07
BV
439
440static int philips_pm2800_probe_channels(struct sr_dev_inst *sdi,
441 struct sr_scpi_hw_info *hw_info,
442 struct channel_spec **channels, unsigned int *num_channels,
443 struct channel_group_spec **channel_groups, unsigned int *num_channel_groups)
444{
329733d9
UH
445 const struct philips_pm2800_model *model;
446 const struct philips_pm2800_module_spec *spec;
c3eadb07
BV
447 unsigned int chassis, num_modules, set, module, m, i;
448
449 (void)sdi;
450
451 /*
452 * The model number as reported by *IDN? looks like e.g. PM2813/11,
453 * Where "PM28" is fixed, followed by the chassis code (1 = autoranging,
454 * 3 = linear series) and the number of modules: 1-3 for autoranging,
455 * 1-2 for linear.
456 * After the slash, the first digit denotes the module set. The
457 * digit after that denotes front (5) or rear (1) binding posts.
458 */
459 chassis = hw_info->model[4] - 0x30;
460 num_modules = hw_info->model[5] - 0x30;
461 set = hw_info->model[7] - 0x30;
462 for (m = 0; m < ARRAY_SIZE(philips_pm2800_matrix); m++) {
463 model = &philips_pm2800_matrix[m];
464 if (model->chassis == chassis && model->num_modules == num_modules
465 && model->set == set)
466 break;
467 }
468 if (m == ARRAY_SIZE(philips_pm2800_matrix)) {
469 sr_dbg("Model %s not found in matrix.", hw_info->model);
470 return SR_ERR;
471 }
472
473 sr_dbg("Found %d output channel%s:", num_modules, num_modules > 1 ? "s" : "");
474 *channels = g_malloc0(sizeof(struct channel_spec) * num_modules);
475 *channel_groups = g_malloc0(sizeof(struct channel_group_spec) * num_modules);
476 for (i = 0; i < num_modules; i++) {
477 module = model->modules[i];
478 spec = &philips_pm2800_module_specs[module];
6ed709fe 479 sr_dbg("output %d: %.0f - %.0fV, %.0f - %.0fA, %.0f - %.0fW", i + 1,
c3eadb07 480 spec->voltage[0], spec->voltage[1],
6ed709fe 481 spec->current[0], spec->current[1],
d9251a2c 482 spec->power[0], spec->power[1]);
329733d9 483 (*channels)[i].name = (char *)philips_pm2800_names[i];
6ed709fe 484 memcpy(&((*channels)[i].voltage), spec, sizeof(float) * 15);
329733d9 485 (*channel_groups)[i].name = (char *)philips_pm2800_names[i];
c3eadb07
BV
486 (*channel_groups)[i].channel_index_mask = 1 << i;
487 (*channel_groups)[i].features = PPS_OTP | PPS_OVP | PPS_OCP;
488 }
489 *num_channels = *num_channel_groups = num_modules;
490
491 return SR_OK;
492}
493
8cb5affe 494static const struct scpi_command philips_pm2800_cmd[] = {
c3eadb07
BV
495 { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
496 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
497 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
498 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
499 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
500 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
501 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
502 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
503 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
504 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
505 { SCPI_CMD_GET_OUTPUT_REGULATION, ":SOUR:FUNC:MODE?" },
506 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":SOUR:VOLT:PROT:TRIP?" },
507 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV?" },
508 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV %.6f" },
509 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":SOUR:CURR:PROT:STAT?" },
510 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":SOUR:CURR:PROT:STAT ON" },
511 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":SOUR:CURR:PROT:STAT OFF" },
512 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":SOUR:CURR:PROT:TRIP?" },
91ef511d 513 ALL_ZERO
c3eadb07
BV
514};
515
81eb36d6
MS
516static const uint32_t rs_hmc8043_devopts[] = {
517 SR_CONF_CONTINUOUS,
518};
519
520static const uint32_t rs_hmc8043_devopts_cg[] = {
521 SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
522 SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
523 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
524 SR_CONF_VOLTAGE | SR_CONF_GET,
525 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
526 SR_CONF_CURRENT | SR_CONF_GET,
527 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
528 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
529};
530
531static const struct channel_spec rs_hmc8043_ch[] = {
532 { "1", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 3, 0.001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY },
533 { "2", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 3, 0.001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY },
534 { "3", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 3, 0.001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY },
535};
536
537static const struct channel_group_spec rs_hmc8043_cg[] = {
538 { "1", CH_IDX(0), PPS_OVP },
539 { "2", CH_IDX(1), PPS_OVP },
540 { "3", CH_IDX(2), PPS_OVP },
541};
542
543static const struct scpi_command rs_hmc8043_cmd[] = {
544 { SCPI_CMD_SELECT_CHANNEL, "INST:NSEL %s" },
545 { SCPI_CMD_GET_MEAS_VOLTAGE, "MEAS:VOLT?" },
546 { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" },
547 { SCPI_CMD_GET_VOLTAGE_TARGET, "VOLT?" },
548 { SCPI_CMD_SET_VOLTAGE_TARGET, "VOLT %.6f" },
549 { SCPI_CMD_GET_CURRENT_LIMIT, "CURR?" },
550 { SCPI_CMD_SET_CURRENT_LIMIT, "CURR %.6f" },
551 { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP?" },
552 { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP ON" },
553 { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP OFF" },
554 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, "VOLT:PROT:TRIP?" },
555 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:PROT:LEV?" },
556 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:PROT:LEV %.6f" },
557 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, "VOLT:PROT:STAT?" },
558 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, "VOLT:PROT:STAT ON" },
559 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, "VOLT:PROT:STAT OFF" },
560 ALL_ZERO
561};
562
d4eabea8 563SR_PRIV const struct scpi_pps pps_profiles[] = {
6cc93128
AG
564 /* Agilent N5763A */
565 { "Agilent", "N5763A", 0,
566 ARRAY_AND_SIZE(agilent_n5700a_devopts),
567 ARRAY_AND_SIZE(agilent_n5700a_devopts_cg),
568 ARRAY_AND_SIZE(agilent_n5763a_ch),
569 ARRAY_AND_SIZE(agilent_n5700a_cg),
570 agilent_n5700a_cmd,
571 .probe_channels = NULL,
572 },
ca314e06 573
5c9e56c9
AG
574 /* Agilent N5767A */
575 { "Agilent", "N5767A", 0,
576 ARRAY_AND_SIZE(agilent_n5700a_devopts),
577 ARRAY_AND_SIZE(agilent_n5700a_devopts_cg),
578 ARRAY_AND_SIZE(agilent_n5767a_ch),
6cc93128 579 ARRAY_AND_SIZE(agilent_n5700a_cg),
91ef511d 580 agilent_n5700a_cmd,
5c9e56c9
AG
581 .probe_channels = NULL,
582 },
ca314e06 583
4ee1e2f3
AG
584 /* Chroma 61604 */
585 { "Chroma", "61604", 0,
586 ARRAY_AND_SIZE(chroma_61604_devopts),
587 ARRAY_AND_SIZE(chroma_61604_devopts_cg),
588 ARRAY_AND_SIZE(chroma_61604_ch),
589 ARRAY_AND_SIZE(chroma_61604_cg),
91ef511d 590 chroma_61604_cmd,
4ee1e2f3
AG
591 .probe_channels = NULL,
592 },
ca314e06 593
5281993e 594 /* Chroma 62000 series */
9a5185c7 595 { "Chroma", "620[0-9]{2}P-[0-9]{2,3}-[0-9]{1,3}", 0,
5281993e
AG
596 ARRAY_AND_SIZE(chroma_62000_devopts),
597 ARRAY_AND_SIZE(chroma_62000_devopts_cg),
9a5185c7
AG
598 NULL, 0,
599 NULL, 0,
91ef511d 600 chroma_62000_cmd,
9a5185c7 601 .probe_channels = chroma_62000p_probe_channels,
5281993e 602 },
ca314e06 603
e76a3575
AG
604 /* HP 6633A */
605 { "HP", "6633A", 0,
606 ARRAY_AND_SIZE(hp_6630a_devopts),
607 ARRAY_AND_SIZE(devopts_none),
608 ARRAY_AND_SIZE(hp_6633a_ch),
609 ARRAY_AND_SIZE(hp_663xx_cg),
610 hp_6630a_cmd,
611 .probe_channels = NULL,
612 },
613
bc4a2a46
BV
614 /* HP 6632B */
615 { "HP", "6632B", 0,
616 ARRAY_AND_SIZE(hp_6632b_devopts),
bfc86799 617 ARRAY_AND_SIZE(devopts_none),
bc4a2a46 618 ARRAY_AND_SIZE(hp_6632b_ch),
e76a3575 619 ARRAY_AND_SIZE(hp_663xx_cg),
91ef511d 620 hp_6632b_cmd,
c3eadb07 621 .probe_channels = NULL,
bc4a2a46
BV
622 },
623
d4eabea8 624 /* Rigol DP800 series */
cfcdf576
ML
625 { "Rigol", "^DP821A$", PPS_OTP,
626 ARRAY_AND_SIZE(rigol_dp800_devopts),
627 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
628 ARRAY_AND_SIZE(rigol_dp821a_ch),
629 ARRAY_AND_SIZE(rigol_dp820_cg),
91ef511d 630 rigol_dp800_cmd,
cfcdf576
ML
631 .probe_channels = NULL,
632 },
3222ee10
BV
633 { "Rigol", "^DP831A$", PPS_OTP,
634 ARRAY_AND_SIZE(rigol_dp800_devopts),
635 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
636 ARRAY_AND_SIZE(rigol_dp831_ch),
cfcdf576 637 ARRAY_AND_SIZE(rigol_dp830_cg),
91ef511d 638 rigol_dp800_cmd,
c3eadb07 639 .probe_channels = NULL,
3222ee10
BV
640 },
641 { "Rigol", "^(DP832|DP832A)$", PPS_OTP,
642 ARRAY_AND_SIZE(rigol_dp800_devopts),
643 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
644 ARRAY_AND_SIZE(rigol_dp832_ch),
cfcdf576 645 ARRAY_AND_SIZE(rigol_dp830_cg),
91ef511d 646 rigol_dp800_cmd,
c3eadb07
BV
647 .probe_channels = NULL,
648 },
649
650 /* Philips/Fluke PM2800 series */
651 { "Philips", "^PM28[13][123]/[01234]{1,2}$", 0,
9d9cf1c4 652 ARRAY_AND_SIZE(philips_pm2800_devopts),
c3eadb07
BV
653 ARRAY_AND_SIZE(philips_pm2800_devopts_cg),
654 NULL, 0,
655 NULL, 0,
91ef511d 656 philips_pm2800_cmd,
c3eadb07 657 philips_pm2800_probe_channels,
d4eabea8 658 },
81eb36d6
MS
659
660 /* Rohde & Schwarz HMC8043 */
661 { "Rohde&Schwarz", "HMC8043", 0,
662 ARRAY_AND_SIZE(rs_hmc8043_devopts),
663 ARRAY_AND_SIZE(rs_hmc8043_devopts_cg),
664 ARRAY_AND_SIZE(rs_hmc8043_ch),
665 ARRAY_AND_SIZE(rs_hmc8043_cg),
666 rs_hmc8043_cmd,
667 .probe_channels = NULL,
668 },
d4eabea8 669};
d4eabea8 670
1beccaed 671SR_PRIV unsigned int num_pps_profiles = ARRAY_SIZE(pps_profiles);