]> sigrok.org Git - libsigrok.git/blame - src/hardware/scpi-pps/profiles.c
Make sr_next_enabled_channel() from scpi-pps available library-wide.
[libsigrok.git] / src / hardware / scpi-pps / profiles.c
CommitLineData
d4eabea8
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2014 Bert Vermeulen <bert@biot.com>
4ee1e2f3
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5 * Copyright (C) 2015 Google, Inc.
6 * (Written by Alexandru Gagniuc <mrnuke@google.com> for Google, Inc.)
d4eabea8
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7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22c18b03 22#include <string.h>
ba464a12 23#include <strings.h>
d4eabea8
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24#include "protocol.h"
25
26#define CH_IDX(x) (1 << x)
4264f1c0 27#define FREQ_DC_ONLY {0, 0, 0}
d4eabea8 28
584560f1 29static const uint32_t devopts_none[] = { };
bfc86799 30
5c9e56c9
AG
31/* Agilent/Keysight N5700A series */
32static const uint32_t agilent_n5700a_devopts[] = {
33 SR_CONF_CONTINUOUS | SR_CONF_SET,
34};
35
36static const uint32_t agilent_n5700a_devopts_cg[] = {
37 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
38 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
39 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
da005885
UH
40 SR_CONF_VOLTAGE | SR_CONF_GET,
41 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
42 SR_CONF_CURRENT | SR_CONF_GET,
43 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
5c9e56c9
AG
44};
45
8cb5affe 46static const struct channel_spec agilent_n5767a_ch[] = {
c80cf3e0 47 { "1", { 0, 60, 0.0001 }, { 0, 25, 0.1 }, FREQ_DC_ONLY },
5c9e56c9
AG
48};
49
8cb5affe 50static const struct channel_group_spec agilent_n5767a_cg[] = {
5c9e56c9
AG
51 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
52};
53
54/*
55 * TODO: OVER_CURRENT_PROTECTION_ACTIVE status can be determined by the OC bit
562a3490 56 * in STAT:QUES:EVEN?, but this is not implemented.
5c9e56c9 57 */
8cb5affe 58static const struct scpi_command agilent_n5700a_cmd[] = {
5c9e56c9
AG
59 { SCPI_CMD_REMOTE, "SYST:COMM:RLST REM" },
60 { SCPI_CMD_LOCAL, "SYST:COMM:RLST LOC" },
61 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
62 { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" },
63 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
64 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
65 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
66 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
67 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP:STAT?" },
68 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
69 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
70 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT?" },
71 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT %.6f" },
72 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":CURR:PROT:STAT?" },
73 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":CURR:PROT:STAT ON?"},
74 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":CURR:PROT:STAT OFF?"},
562a3490 75 /* Current limit (CC mode) and OCP are set using the same command. */
5c9e56c9
AG
76 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR?" },
77 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR %.6f" },
91ef511d 78 ALL_ZERO
5c9e56c9
AG
79};
80
4ee1e2f3
AG
81/* Chroma 61600 series AC source */
82static const uint32_t chroma_61604_devopts[] = {
83 SR_CONF_CONTINUOUS | SR_CONF_SET,
84};
85
86static const uint32_t chroma_61604_devopts_cg[] = {
87 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
88 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
da005885
UH
89 SR_CONF_VOLTAGE | SR_CONF_GET,
90 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
6c0c9dd2
AG
91 SR_CONF_OUTPUT_FREQUENCY | SR_CONF_GET,
92 SR_CONF_OUTPUT_FREQUENCY_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
da005885
UH
93 SR_CONF_CURRENT | SR_CONF_GET,
94 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
4ee1e2f3
AG
95};
96
8cb5affe 97static const struct channel_spec chroma_61604_ch[] = {
6c0c9dd2 98 { "1", { 0, 300, 0.1 }, { 0, 16, 0.1 }, { 1.0, 1000.0, 0.01 } },
4ee1e2f3
AG
99};
100
8cb5affe 101static const struct channel_group_spec chroma_61604_cg[] = {
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102 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
103};
104
8cb5affe 105static const struct scpi_command chroma_61604_cmd[] = {
4ee1e2f3
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106 { SCPI_CMD_REMOTE, "SYST:REM" },
107 { SCPI_CMD_LOCAL, "SYST:LOC" },
108 { SCPI_CMD_GET_MEAS_VOLTAGE, ":FETC:VOLT:ACDC?" },
6c0c9dd2 109 { SCPI_CMD_GET_MEAS_FREQUENCY, ":FETC:FREQ?" },
4ee1e2f3
AG
110 { SCPI_CMD_GET_MEAS_CURRENT, ":FETC:CURR:AC?" },
111 { SCPI_CMD_GET_MEAS_POWER, ":FETC:POW:AC?" },
112 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT:AC?" },
113 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT:AC %.1f" },
6c0c9dd2
AG
114 { SCPI_CMD_GET_FREQUENCY_TARGET, ":SOUR:FREQ?" },
115 { SCPI_CMD_SET_FREQUENCY_TARGET, ":SOUR:FREQ %.2f" },
4ee1e2f3
AG
116 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
117 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
118 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
119 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC?" },
120 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC %.1f" },
562a3490 121 /* This is not a current limit mode. It is overcurrent protection. */
4ee1e2f3
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122 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM?" },
123 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM %.2f" },
91ef511d 124 ALL_ZERO
4ee1e2f3
AG
125};
126
5281993e
AG
127/* Chroma 62000 series DC source */
128
129static const uint32_t chroma_62000_devopts[] = {
130 SR_CONF_CONTINUOUS | SR_CONF_SET,
131};
132
133static const uint32_t chroma_62000_devopts_cg[] = {
134 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
135 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
136 SR_CONF_VOLTAGE | SR_CONF_GET,
137 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
138 SR_CONF_CURRENT | SR_CONF_GET,
139 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
140 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
141};
142
5281993e
AG
143static const struct channel_group_spec chroma_62000_cg[] = {
144 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
145};
146
147static const struct scpi_command chroma_62000_cmd[] = {
148 { SCPI_CMD_REMOTE, ":CONF:REM ON" },
149 { SCPI_CMD_LOCAL, ":CONF:REM OFF" },
150 { SCPI_CMD_BEEPER, ":CONF:BEEP?" },
151 { SCPI_CMD_BEEPER_ENABLE, ":CONF:BEEP ON" },
152 { SCPI_CMD_BEEPER_DISABLE, ":CONF:BEEP OFF" },
153 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
154 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
155 { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POW?" },
156 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
157 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.2f" },
158 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
159 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
160 { SCPI_CMD_GET_OUTPUT_ENABLED, ":CONF:OUTP?" },
161 { SCPI_CMD_SET_OUTPUT_ENABLE, ":CONF:OUTP ON" },
162 { SCPI_CMD_SET_OUTPUT_DISABLE, ":CONF:OUTP OFF" },
163 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:HIGH?" },
164 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:HIGH %.6f" },
165 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT:HIGH?" },
166 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT:HIGH %.6f" },
91ef511d 167 ALL_ZERO
5281993e
AG
168};
169
9a5185c7
AG
170static int chroma_62000p_probe_channels(struct sr_dev_inst *sdi,
171 struct sr_scpi_hw_info *hw_info,
172 struct channel_spec **channels, unsigned int *num_channels,
173 struct channel_group_spec **channel_groups,
174 unsigned int *num_channel_groups)
175{
176 unsigned int volts, amps;
177 struct channel_spec *channel;
178
179 (void)sdi;
180
181 sscanf(hw_info->model, "%*[^P]P-%u-%u", &volts, &amps);
182 sr_dbg("Found device rated for %d V and %d A", volts, amps);
183
184 if (volts > 600) {
185 sr_err("Probed max voltage of %u V is out of spec.", volts);
186 return SR_ERR_BUG;
187 }
188
189 if (volts > 120) {
190 sr_err("Probed max current of %u A is out of spec.", amps);
191 return SR_ERR_BUG;
192 }
193
194 channel = g_malloc0(sizeof(struct channel_spec));
195 channel->name = "1";
196 channel->voltage[0] = channel->current[0] = 0.0;
197 channel->voltage[1] = (float)volts;
198 channel->current[1] = (float)amps;
199 channel->voltage[2] = channel->current[2] = 0.01;
200 *channels = channel;
201 *num_channels = 1;
202
203 *channel_groups = g_malloc(sizeof(struct channel_group_spec));
204 **channel_groups = chroma_62000_cg[0];
205 *num_channel_groups = 1;
206
207 return SR_OK;
208}
209
d4eabea8 210/* Rigol DP800 series */
584560f1 211static const uint32_t rigol_dp800_devopts[] = {
9d9cf1c4 212 SR_CONF_CONTINUOUS | SR_CONF_SET,
5827f61b 213 SR_CONF_OVER_TEMPERATURE_PROTECTION | SR_CONF_GET | SR_CONF_SET,
d4eabea8
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214};
215
584560f1 216static const uint32_t rigol_dp800_devopts_cg[] = {
7a0b98b5 217 SR_CONF_REGULATION | SR_CONF_GET,
5827f61b
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218 SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
219 SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
220 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
221 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
222 SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
223 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
7a0b98b5
AJ
224 SR_CONF_VOLTAGE | SR_CONF_GET,
225 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
226 SR_CONF_CURRENT | SR_CONF_GET,
227 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
228 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
d4eabea8
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229};
230
8cb5affe 231static const struct channel_spec rigol_dp821a_ch[] = {
4264f1c0
AG
232 { "1", { 0, 60, 0.001 }, { 0, 1, 0.0001 }, FREQ_DC_ONLY },
233 { "2", { 0, 8, 0.001 }, { 0, 10, 0.001 }, FREQ_DC_ONLY },
cfcdf576
ML
234};
235
8cb5affe 236static const struct channel_spec rigol_dp831_ch[] = {
4264f1c0
AG
237 { "1", { 0, 8, 0.001 }, { 0, 5, 0.0003 }, FREQ_DC_ONLY },
238 { "2", { 0, 30, 0.001 }, { 0, 2, 0.0001 }, FREQ_DC_ONLY },
239 { "3", { 0, -30, 0.001 }, { 0, 2, 0.0001 }, FREQ_DC_ONLY },
d4eabea8
BV
240};
241
8cb5affe 242static const struct channel_spec rigol_dp832_ch[] = {
4264f1c0
AG
243 { "1", { 0, 30, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY },
244 { "2", { 0, 30, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY },
245 { "3", { 0, 5, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY },
3222ee10
BV
246};
247
8cb5affe 248static const struct channel_group_spec rigol_dp820_cg[] = {
cfcdf576
ML
249 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
250 { "2", CH_IDX(1), PPS_OVP | PPS_OCP },
251};
252
8cb5affe 253static const struct channel_group_spec rigol_dp830_cg[] = {
d4eabea8
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254 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
255 { "2", CH_IDX(1), PPS_OVP | PPS_OCP },
256 { "3", CH_IDX(2), PPS_OVP | PPS_OCP },
257};
258
8cb5affe 259static const struct scpi_command rigol_dp800_cmd[] = {
60475cd7
BV
260 { SCPI_CMD_REMOTE, "SYST:REMOTE" },
261 { SCPI_CMD_LOCAL, "SYST:LOCAL" },
ee2860ee
BV
262 { SCPI_CMD_BEEPER, "SYST:BEEP:STAT?" },
263 { SCPI_CMD_BEEPER_ENABLE, "SYST:BEEP:STAT ON" },
264 { SCPI_CMD_BEEPER_DISABLE, "SYST:BEEP:STAT OFF" },
60475cd7
BV
265 { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
266 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
267 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
268 { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE?" },
269 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
270 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
271 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
272 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
273 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
274 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
275 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
276 { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" },
d4eabea8 277 { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP?" },
53a81803
BV
278 { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_ENABLE, ":SYST:OTP ON" },
279 { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_DISABLE, ":SYST:OTP OFF" },
60475cd7
BV
280 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP?" },
281 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP ON" },
282 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP OFF" },
283 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES?" },
284 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL?" },
285 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL %.6f" },
286 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP?" },
287 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP:STAT ON" },
288 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP:STAT OFF" },
289 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES?" },
290 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL?" },
291 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL %.6f" },
91ef511d 292 ALL_ZERO
d4eabea8
BV
293};
294
bfc86799 295/* HP 663xx series */
584560f1 296static const uint32_t hp_6632b_devopts[] = {
9d9cf1c4 297 SR_CONF_CONTINUOUS | SR_CONF_SET,
7a0b98b5
AJ
298 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
299 SR_CONF_VOLTAGE | SR_CONF_GET,
300 SR_CONF_CURRENT | SR_CONF_GET,
301 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
302 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
bc4a2a46
BV
303};
304
8cb5affe 305static const struct channel_spec hp_6632b_ch[] = {
4264f1c0 306 { "1", { 0, 20.475, 0.005 }, { 0, 5.1188, 0.00132 }, FREQ_DC_ONLY },
bc4a2a46
BV
307};
308
8cb5affe 309static const struct channel_group_spec hp_6632b_cg[] = {
bc4a2a46
BV
310 { "1", CH_IDX(0), 0 },
311};
312
8cb5affe 313static const struct scpi_command hp_6632b_cmd[] = {
bc4a2a46 314 { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP:STAT?" },
53a81803
BV
315 { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP:STAT ON" },
316 { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP:STAT OFF" },
bc4a2a46
BV
317 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
318 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
ca95e90f
BV
319 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
320 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
321 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
322 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
91ef511d 323 ALL_ZERO
bc4a2a46
BV
324};
325
c3eadb07 326/* Philips/Fluke PM2800 series */
9d9cf1c4
BV
327static const uint32_t philips_pm2800_devopts[] = {
328 SR_CONF_CONTINUOUS | SR_CONF_SET,
329};
330
c3eadb07 331static const uint32_t philips_pm2800_devopts_cg[] = {
7a0b98b5
AJ
332 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
333 SR_CONF_VOLTAGE | SR_CONF_GET,
334 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
335 SR_CONF_CURRENT | SR_CONF_GET,
336 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
c3eadb07
BV
337 SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
338 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
339 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
340 SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
7a0b98b5 341 SR_CONF_REGULATION | SR_CONF_GET,
c3eadb07
BV
342};
343
344enum philips_pm2800_modules {
345 PM2800_MOD_30V_10A = 1,
346 PM2800_MOD_60V_5A,
347 PM2800_MOD_60V_10A,
348 PM2800_MOD_8V_15A,
349 PM2800_MOD_60V_2A,
350 PM2800_MOD_120V_1A,
351};
352
329733d9 353static const struct philips_pm2800_module_spec {
c3eadb07
BV
354 /* Min, max, programming resolution. */
355 float voltage[3];
356 float current[3];
357} philips_pm2800_module_specs[] = {
358 /* Autoranging modules. */
359 [PM2800_MOD_30V_10A] = { { 0, 30, 0.0075 }, { 0, 10, 0.0025 } },
360 [PM2800_MOD_60V_5A] = { { 0, 60, 0.015 }, { 0, 5, 0.00125 } },
361 [PM2800_MOD_60V_10A] = { { 0, 60, 0.015 }, { 0, 10, 0.0025 } },
362 /* Linear modules. */
363 [PM2800_MOD_8V_15A] = { { 0, 8, 0.002 }, { -15, 15, 0.00375 } },
364 [PM2800_MOD_60V_2A] = { { 0, 60, 0.015 }, { -2, 2, 0.0005 } },
365 [PM2800_MOD_120V_1A] = { { 0, 120, 0.030 }, { -1, 1, 0.00025 } },
366};
367
329733d9 368static const struct philips_pm2800_model {
c3eadb07
BV
369 unsigned int chassis;
370 unsigned int num_modules;
371 unsigned int set;
372 unsigned int modules[3];
373} philips_pm2800_matrix[] = {
374 /* Autoranging chassis. */
375 { 1, 1, 0, { PM2800_MOD_30V_10A, 0, 0 } },
376 { 1, 1, 1, { PM2800_MOD_60V_5A, 0, 0 } },
377 { 1, 2, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, 0 } },
378 { 1, 2, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, 0 } },
379 { 1, 2, 2, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, 0 } },
380 { 1, 2, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_10A, 0 } },
381 { 1, 2, 4, { PM2800_MOD_60V_5A, PM2800_MOD_60V_10A, 0 } },
382 { 1, 3, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_30V_10A } },
383 { 1, 3, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
384 { 1, 3, 2, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_60V_5A } },
385 { 1, 3, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
386 /* Linear chassis. */
387 { 3, 1, 0, { PM2800_MOD_60V_2A, 0, 0 } },
388 { 3, 1, 1, { PM2800_MOD_120V_1A, 0, 0 } },
389 { 3, 1, 2, { PM2800_MOD_8V_15A, 0, 0 } },
390 { 3, 2, 0, { PM2800_MOD_60V_2A, 0, 0 } },
391 { 3, 2, 1, { PM2800_MOD_120V_1A, 0, 0 } },
392 { 3, 2, 2, { PM2800_MOD_60V_2A, PM2800_MOD_120V_1A, 0 } },
393 { 3, 2, 3, { PM2800_MOD_8V_15A, PM2800_MOD_8V_15A, 0 } },
394};
395
329733d9 396static const char *philips_pm2800_names[] = { "1", "2", "3" };
c3eadb07
BV
397
398static int philips_pm2800_probe_channels(struct sr_dev_inst *sdi,
399 struct sr_scpi_hw_info *hw_info,
400 struct channel_spec **channels, unsigned int *num_channels,
401 struct channel_group_spec **channel_groups, unsigned int *num_channel_groups)
402{
329733d9
UH
403 const struct philips_pm2800_model *model;
404 const struct philips_pm2800_module_spec *spec;
c3eadb07
BV
405 unsigned int chassis, num_modules, set, module, m, i;
406
407 (void)sdi;
408
409 /*
410 * The model number as reported by *IDN? looks like e.g. PM2813/11,
411 * Where "PM28" is fixed, followed by the chassis code (1 = autoranging,
412 * 3 = linear series) and the number of modules: 1-3 for autoranging,
413 * 1-2 for linear.
414 * After the slash, the first digit denotes the module set. The
415 * digit after that denotes front (5) or rear (1) binding posts.
416 */
417 chassis = hw_info->model[4] - 0x30;
418 num_modules = hw_info->model[5] - 0x30;
419 set = hw_info->model[7] - 0x30;
420 for (m = 0; m < ARRAY_SIZE(philips_pm2800_matrix); m++) {
421 model = &philips_pm2800_matrix[m];
422 if (model->chassis == chassis && model->num_modules == num_modules
423 && model->set == set)
424 break;
425 }
426 if (m == ARRAY_SIZE(philips_pm2800_matrix)) {
427 sr_dbg("Model %s not found in matrix.", hw_info->model);
428 return SR_ERR;
429 }
430
431 sr_dbg("Found %d output channel%s:", num_modules, num_modules > 1 ? "s" : "");
432 *channels = g_malloc0(sizeof(struct channel_spec) * num_modules);
433 *channel_groups = g_malloc0(sizeof(struct channel_group_spec) * num_modules);
434 for (i = 0; i < num_modules; i++) {
435 module = model->modules[i];
436 spec = &philips_pm2800_module_specs[module];
437 sr_dbg("output %d: %.0f - %.0fV, %.0f - %.0fA", i + 1,
438 spec->voltage[0], spec->voltage[1],
439 spec->current[0], spec->current[1]);
329733d9 440 (*channels)[i].name = (char *)philips_pm2800_names[i];
c3eadb07 441 memcpy(&((*channels)[i].voltage), spec, sizeof(float) * 6);
329733d9 442 (*channel_groups)[i].name = (char *)philips_pm2800_names[i];
c3eadb07
BV
443 (*channel_groups)[i].channel_index_mask = 1 << i;
444 (*channel_groups)[i].features = PPS_OTP | PPS_OVP | PPS_OCP;
445 }
446 *num_channels = *num_channel_groups = num_modules;
447
448 return SR_OK;
449}
450
8cb5affe 451static const struct scpi_command philips_pm2800_cmd[] = {
c3eadb07
BV
452 { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
453 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
454 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
455 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
456 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
457 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
458 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
459 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
460 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
461 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
462 { SCPI_CMD_GET_OUTPUT_REGULATION, ":SOUR:FUNC:MODE?" },
463 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":SOUR:VOLT:PROT:TRIP?" },
464 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV?" },
465 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV %.6f" },
466 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":SOUR:CURR:PROT:STAT?" },
467 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":SOUR:CURR:PROT:STAT ON" },
468 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":SOUR:CURR:PROT:STAT OFF" },
469 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":SOUR:CURR:PROT:TRIP?" },
91ef511d 470 ALL_ZERO
c3eadb07
BV
471};
472
d4eabea8 473SR_PRIV const struct scpi_pps pps_profiles[] = {
5c9e56c9
AG
474 /* Agilent N5767A */
475 { "Agilent", "N5767A", 0,
476 ARRAY_AND_SIZE(agilent_n5700a_devopts),
477 ARRAY_AND_SIZE(agilent_n5700a_devopts_cg),
478 ARRAY_AND_SIZE(agilent_n5767a_ch),
479 ARRAY_AND_SIZE(agilent_n5767a_cg),
91ef511d 480 agilent_n5700a_cmd,
5c9e56c9
AG
481 .probe_channels = NULL,
482 },
4ee1e2f3
AG
483 /* Chroma 61604 */
484 { "Chroma", "61604", 0,
485 ARRAY_AND_SIZE(chroma_61604_devopts),
486 ARRAY_AND_SIZE(chroma_61604_devopts_cg),
487 ARRAY_AND_SIZE(chroma_61604_ch),
488 ARRAY_AND_SIZE(chroma_61604_cg),
91ef511d 489 chroma_61604_cmd,
4ee1e2f3
AG
490 .probe_channels = NULL,
491 },
5281993e 492 /* Chroma 62000 series */
9a5185c7 493 { "Chroma", "620[0-9]{2}P-[0-9]{2,3}-[0-9]{1,3}", 0,
5281993e
AG
494 ARRAY_AND_SIZE(chroma_62000_devopts),
495 ARRAY_AND_SIZE(chroma_62000_devopts_cg),
9a5185c7
AG
496 NULL, 0,
497 NULL, 0,
91ef511d 498 chroma_62000_cmd,
9a5185c7 499 .probe_channels = chroma_62000p_probe_channels,
5281993e 500 },
bc4a2a46
BV
501 /* HP 6632B */
502 { "HP", "6632B", 0,
503 ARRAY_AND_SIZE(hp_6632b_devopts),
bfc86799 504 ARRAY_AND_SIZE(devopts_none),
bc4a2a46
BV
505 ARRAY_AND_SIZE(hp_6632b_ch),
506 ARRAY_AND_SIZE(hp_6632b_cg),
91ef511d 507 hp_6632b_cmd,
c3eadb07 508 .probe_channels = NULL,
bc4a2a46
BV
509 },
510
d4eabea8 511 /* Rigol DP800 series */
cfcdf576
ML
512 { "Rigol", "^DP821A$", PPS_OTP,
513 ARRAY_AND_SIZE(rigol_dp800_devopts),
514 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
515 ARRAY_AND_SIZE(rigol_dp821a_ch),
516 ARRAY_AND_SIZE(rigol_dp820_cg),
91ef511d 517 rigol_dp800_cmd,
cfcdf576
ML
518 .probe_channels = NULL,
519 },
3222ee10
BV
520 { "Rigol", "^DP831A$", PPS_OTP,
521 ARRAY_AND_SIZE(rigol_dp800_devopts),
522 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
523 ARRAY_AND_SIZE(rigol_dp831_ch),
cfcdf576 524 ARRAY_AND_SIZE(rigol_dp830_cg),
91ef511d 525 rigol_dp800_cmd,
c3eadb07 526 .probe_channels = NULL,
3222ee10
BV
527 },
528 { "Rigol", "^(DP832|DP832A)$", PPS_OTP,
529 ARRAY_AND_SIZE(rigol_dp800_devopts),
530 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
531 ARRAY_AND_SIZE(rigol_dp832_ch),
cfcdf576 532 ARRAY_AND_SIZE(rigol_dp830_cg),
91ef511d 533 rigol_dp800_cmd,
c3eadb07
BV
534 .probe_channels = NULL,
535 },
536
537 /* Philips/Fluke PM2800 series */
538 { "Philips", "^PM28[13][123]/[01234]{1,2}$", 0,
9d9cf1c4 539 ARRAY_AND_SIZE(philips_pm2800_devopts),
c3eadb07
BV
540 ARRAY_AND_SIZE(philips_pm2800_devopts_cg),
541 NULL, 0,
542 NULL, 0,
91ef511d 543 philips_pm2800_cmd,
c3eadb07 544 philips_pm2800_probe_channels,
d4eabea8
BV
545 },
546};
d4eabea8 547
1beccaed 548SR_PRIV unsigned int num_pps_profiles = ARRAY_SIZE(pps_profiles);