]> sigrok.org Git - libsigrok.git/blame - src/hardware/scpi-pps/profiles.c
scpi-pps: Chroma 62000P: Get capabilities from device name
[libsigrok.git] / src / hardware / scpi-pps / profiles.c
CommitLineData
d4eabea8
BV
1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2014 Bert Vermeulen <bert@biot.com>
4ee1e2f3
AG
5 * Copyright (C) 2015 Google, Inc.
6 * (Written by Alexandru Gagniuc <mrnuke@google.com> for Google, Inc.)
d4eabea8
BV
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22c18b03 22#include <string.h>
ba464a12 23#include <strings.h>
d4eabea8
BV
24#include "protocol.h"
25
26#define CH_IDX(x) (1 << x)
4264f1c0 27#define FREQ_DC_ONLY {0, 0, 0}
d4eabea8 28
8cb5affe 29static const char *pps_vendors[][2] = {
22c18b03 30 { "RIGOL TECHNOLOGIES", "Rigol" },
bc4a2a46 31 { "HEWLETT-PACKARD", "HP" },
c3eadb07 32 { "PHILIPS", "Philips" },
5281993e 33 { "CHROMA", "Chroma" },
4ee1e2f3 34 { "Chroma ATE", "Chroma" },
5c9e56c9 35 { "Agilent Technologies", "Agilent" },
d4eabea8
BV
36};
37
562a3490 38SR_PRIV const char *get_vendor(const char *raw_vendor)
22c18b03
BV
39{
40 unsigned int i;
41
42 for (i = 0; i < ARRAY_SIZE(pps_vendors); i++) {
43 if (!strcasecmp(raw_vendor, pps_vendors[i][0]))
44 return pps_vendors[i][1];
45 }
46
47 return raw_vendor;
48}
49
584560f1 50static const uint32_t devopts_none[] = { };
bfc86799 51
5c9e56c9
AG
52/* Agilent/Keysight N5700A series */
53static const uint32_t agilent_n5700a_devopts[] = {
54 SR_CONF_CONTINUOUS | SR_CONF_SET,
55};
56
57static const uint32_t agilent_n5700a_devopts_cg[] = {
58 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
59 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
60 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
da005885
UH
61 SR_CONF_VOLTAGE | SR_CONF_GET,
62 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
63 SR_CONF_CURRENT | SR_CONF_GET,
64 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
5c9e56c9
AG
65};
66
8cb5affe 67static const struct channel_spec agilent_n5767a_ch[] = {
c80cf3e0 68 { "1", { 0, 60, 0.0001 }, { 0, 25, 0.1 }, FREQ_DC_ONLY },
5c9e56c9
AG
69};
70
8cb5affe 71static const struct channel_group_spec agilent_n5767a_cg[] = {
5c9e56c9
AG
72 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
73};
74
75/*
76 * TODO: OVER_CURRENT_PROTECTION_ACTIVE status can be determined by the OC bit
562a3490 77 * in STAT:QUES:EVEN?, but this is not implemented.
5c9e56c9 78 */
8cb5affe 79static const struct scpi_command agilent_n5700a_cmd[] = {
5c9e56c9
AG
80 { SCPI_CMD_REMOTE, "SYST:COMM:RLST REM" },
81 { SCPI_CMD_LOCAL, "SYST:COMM:RLST LOC" },
82 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
83 { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" },
84 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
85 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
86 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
87 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
88 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP:STAT?" },
89 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
90 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
91 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT?" },
92 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT %.6f" },
93 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":CURR:PROT:STAT?" },
94 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":CURR:PROT:STAT ON?"},
95 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":CURR:PROT:STAT OFF?"},
562a3490 96 /* Current limit (CC mode) and OCP are set using the same command. */
5c9e56c9
AG
97 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR?" },
98 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR %.6f" },
99};
100
4ee1e2f3
AG
101/* Chroma 61600 series AC source */
102static const uint32_t chroma_61604_devopts[] = {
103 SR_CONF_CONTINUOUS | SR_CONF_SET,
104};
105
106static const uint32_t chroma_61604_devopts_cg[] = {
107 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
108 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
da005885
UH
109 SR_CONF_VOLTAGE | SR_CONF_GET,
110 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
6c0c9dd2
AG
111 SR_CONF_OUTPUT_FREQUENCY | SR_CONF_GET,
112 SR_CONF_OUTPUT_FREQUENCY_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
da005885
UH
113 SR_CONF_CURRENT | SR_CONF_GET,
114 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
4ee1e2f3
AG
115};
116
8cb5affe 117static const struct channel_spec chroma_61604_ch[] = {
6c0c9dd2 118 { "1", { 0, 300, 0.1 }, { 0, 16, 0.1 }, { 1.0, 1000.0, 0.01 } },
4ee1e2f3
AG
119};
120
8cb5affe 121static const struct channel_group_spec chroma_61604_cg[] = {
4ee1e2f3
AG
122 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
123};
124
8cb5affe 125static const struct scpi_command chroma_61604_cmd[] = {
4ee1e2f3
AG
126 { SCPI_CMD_REMOTE, "SYST:REM" },
127 { SCPI_CMD_LOCAL, "SYST:LOC" },
128 { SCPI_CMD_GET_MEAS_VOLTAGE, ":FETC:VOLT:ACDC?" },
6c0c9dd2 129 { SCPI_CMD_GET_MEAS_FREQUENCY, ":FETC:FREQ?" },
4ee1e2f3
AG
130 { SCPI_CMD_GET_MEAS_CURRENT, ":FETC:CURR:AC?" },
131 { SCPI_CMD_GET_MEAS_POWER, ":FETC:POW:AC?" },
132 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT:AC?" },
133 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT:AC %.1f" },
6c0c9dd2
AG
134 { SCPI_CMD_GET_FREQUENCY_TARGET, ":SOUR:FREQ?" },
135 { SCPI_CMD_SET_FREQUENCY_TARGET, ":SOUR:FREQ %.2f" },
4ee1e2f3
AG
136 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
137 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
138 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
139 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC?" },
140 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC %.1f" },
562a3490 141 /* This is not a current limit mode. It is overcurrent protection. */
4ee1e2f3
AG
142 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM?" },
143 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM %.2f" },
144};
145
5281993e
AG
146/* Chroma 62000 series DC source */
147
148static const uint32_t chroma_62000_devopts[] = {
149 SR_CONF_CONTINUOUS | SR_CONF_SET,
150};
151
152static const uint32_t chroma_62000_devopts_cg[] = {
153 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
154 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
155 SR_CONF_VOLTAGE | SR_CONF_GET,
156 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
157 SR_CONF_CURRENT | SR_CONF_GET,
158 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
159 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
160};
161
5281993e
AG
162static const struct channel_group_spec chroma_62000_cg[] = {
163 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
164};
165
166static const struct scpi_command chroma_62000_cmd[] = {
167 { SCPI_CMD_REMOTE, ":CONF:REM ON" },
168 { SCPI_CMD_LOCAL, ":CONF:REM OFF" },
169 { SCPI_CMD_BEEPER, ":CONF:BEEP?" },
170 { SCPI_CMD_BEEPER_ENABLE, ":CONF:BEEP ON" },
171 { SCPI_CMD_BEEPER_DISABLE, ":CONF:BEEP OFF" },
172 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
173 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
174 { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POW?" },
175 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
176 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.2f" },
177 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
178 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
179 { SCPI_CMD_GET_OUTPUT_ENABLED, ":CONF:OUTP?" },
180 { SCPI_CMD_SET_OUTPUT_ENABLE, ":CONF:OUTP ON" },
181 { SCPI_CMD_SET_OUTPUT_DISABLE, ":CONF:OUTP OFF" },
182 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:HIGH?" },
183 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:HIGH %.6f" },
184 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT:HIGH?" },
185 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT:HIGH %.6f" },
186};
187
9a5185c7
AG
188static int chroma_62000p_probe_channels(struct sr_dev_inst *sdi,
189 struct sr_scpi_hw_info *hw_info,
190 struct channel_spec **channels, unsigned int *num_channels,
191 struct channel_group_spec **channel_groups,
192 unsigned int *num_channel_groups)
193{
194 unsigned int volts, amps;
195 struct channel_spec *channel;
196
197 (void)sdi;
198
199 sscanf(hw_info->model, "%*[^P]P-%u-%u", &volts, &amps);
200 sr_dbg("Found device rated for %d V and %d A", volts, amps);
201
202 if (volts > 600) {
203 sr_err("Probed max voltage of %u V is out of spec.", volts);
204 return SR_ERR_BUG;
205 }
206
207 if (volts > 120) {
208 sr_err("Probed max current of %u A is out of spec.", amps);
209 return SR_ERR_BUG;
210 }
211
212 channel = g_malloc0(sizeof(struct channel_spec));
213 channel->name = "1";
214 channel->voltage[0] = channel->current[0] = 0.0;
215 channel->voltage[1] = (float)volts;
216 channel->current[1] = (float)amps;
217 channel->voltage[2] = channel->current[2] = 0.01;
218 *channels = channel;
219 *num_channels = 1;
220
221 *channel_groups = g_malloc(sizeof(struct channel_group_spec));
222 **channel_groups = chroma_62000_cg[0];
223 *num_channel_groups = 1;
224
225 return SR_OK;
226}
227
d4eabea8 228/* Rigol DP800 series */
584560f1 229static const uint32_t rigol_dp800_devopts[] = {
9d9cf1c4 230 SR_CONF_CONTINUOUS | SR_CONF_SET,
5827f61b 231 SR_CONF_OVER_TEMPERATURE_PROTECTION | SR_CONF_GET | SR_CONF_SET,
d4eabea8
BV
232};
233
584560f1 234static const uint32_t rigol_dp800_devopts_cg[] = {
7a0b98b5 235 SR_CONF_REGULATION | SR_CONF_GET,
5827f61b
BV
236 SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
237 SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
238 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
239 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
240 SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
241 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
7a0b98b5
AJ
242 SR_CONF_VOLTAGE | SR_CONF_GET,
243 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
244 SR_CONF_CURRENT | SR_CONF_GET,
245 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
246 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
d4eabea8
BV
247};
248
8cb5affe 249static const struct channel_spec rigol_dp821a_ch[] = {
4264f1c0
AG
250 { "1", { 0, 60, 0.001 }, { 0, 1, 0.0001 }, FREQ_DC_ONLY },
251 { "2", { 0, 8, 0.001 }, { 0, 10, 0.001 }, FREQ_DC_ONLY },
cfcdf576
ML
252};
253
8cb5affe 254static const struct channel_spec rigol_dp831_ch[] = {
4264f1c0
AG
255 { "1", { 0, 8, 0.001 }, { 0, 5, 0.0003 }, FREQ_DC_ONLY },
256 { "2", { 0, 30, 0.001 }, { 0, 2, 0.0001 }, FREQ_DC_ONLY },
257 { "3", { 0, -30, 0.001 }, { 0, 2, 0.0001 }, FREQ_DC_ONLY },
d4eabea8
BV
258};
259
8cb5affe 260static const struct channel_spec rigol_dp832_ch[] = {
4264f1c0
AG
261 { "1", { 0, 30, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY },
262 { "2", { 0, 30, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY },
263 { "3", { 0, 5, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY },
3222ee10
BV
264};
265
8cb5affe 266static const struct channel_group_spec rigol_dp820_cg[] = {
cfcdf576
ML
267 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
268 { "2", CH_IDX(1), PPS_OVP | PPS_OCP },
269};
270
8cb5affe 271static const struct channel_group_spec rigol_dp830_cg[] = {
d4eabea8
BV
272 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
273 { "2", CH_IDX(1), PPS_OVP | PPS_OCP },
274 { "3", CH_IDX(2), PPS_OVP | PPS_OCP },
275};
276
8cb5affe 277static const struct scpi_command rigol_dp800_cmd[] = {
60475cd7
BV
278 { SCPI_CMD_REMOTE, "SYST:REMOTE" },
279 { SCPI_CMD_LOCAL, "SYST:LOCAL" },
ee2860ee
BV
280 { SCPI_CMD_BEEPER, "SYST:BEEP:STAT?" },
281 { SCPI_CMD_BEEPER_ENABLE, "SYST:BEEP:STAT ON" },
282 { SCPI_CMD_BEEPER_DISABLE, "SYST:BEEP:STAT OFF" },
60475cd7
BV
283 { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
284 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
285 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
286 { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE?" },
287 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
288 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
289 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
290 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
291 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
292 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
293 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
294 { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" },
d4eabea8 295 { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP?" },
53a81803
BV
296 { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_ENABLE, ":SYST:OTP ON" },
297 { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_DISABLE, ":SYST:OTP OFF" },
60475cd7
BV
298 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP?" },
299 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP ON" },
300 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP OFF" },
301 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES?" },
302 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL?" },
303 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL %.6f" },
304 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP?" },
305 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP:STAT ON" },
306 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP:STAT OFF" },
307 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES?" },
308 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL?" },
309 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL %.6f" },
d4eabea8
BV
310};
311
bfc86799 312/* HP 663xx series */
584560f1 313static const uint32_t hp_6632b_devopts[] = {
9d9cf1c4 314 SR_CONF_CONTINUOUS | SR_CONF_SET,
7a0b98b5
AJ
315 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
316 SR_CONF_VOLTAGE | SR_CONF_GET,
317 SR_CONF_CURRENT | SR_CONF_GET,
318 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
319 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
bc4a2a46
BV
320};
321
8cb5affe 322static const struct channel_spec hp_6632b_ch[] = {
4264f1c0 323 { "1", { 0, 20.475, 0.005 }, { 0, 5.1188, 0.00132 }, FREQ_DC_ONLY },
bc4a2a46
BV
324};
325
8cb5affe 326static const struct channel_group_spec hp_6632b_cg[] = {
bc4a2a46
BV
327 { "1", CH_IDX(0), 0 },
328};
329
8cb5affe 330static const struct scpi_command hp_6632b_cmd[] = {
bc4a2a46 331 { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP:STAT?" },
53a81803
BV
332 { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP:STAT ON" },
333 { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP:STAT OFF" },
bc4a2a46
BV
334 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
335 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
ca95e90f
BV
336 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
337 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
338 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
339 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
bc4a2a46
BV
340};
341
c3eadb07 342/* Philips/Fluke PM2800 series */
9d9cf1c4
BV
343static const uint32_t philips_pm2800_devopts[] = {
344 SR_CONF_CONTINUOUS | SR_CONF_SET,
345};
346
c3eadb07 347static const uint32_t philips_pm2800_devopts_cg[] = {
7a0b98b5
AJ
348 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
349 SR_CONF_VOLTAGE | SR_CONF_GET,
350 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
351 SR_CONF_CURRENT | SR_CONF_GET,
352 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
c3eadb07
BV
353 SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
354 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
355 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
356 SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
7a0b98b5 357 SR_CONF_REGULATION | SR_CONF_GET,
c3eadb07
BV
358};
359
360enum philips_pm2800_modules {
361 PM2800_MOD_30V_10A = 1,
362 PM2800_MOD_60V_5A,
363 PM2800_MOD_60V_10A,
364 PM2800_MOD_8V_15A,
365 PM2800_MOD_60V_2A,
366 PM2800_MOD_120V_1A,
367};
368
329733d9 369static const struct philips_pm2800_module_spec {
c3eadb07
BV
370 /* Min, max, programming resolution. */
371 float voltage[3];
372 float current[3];
373} philips_pm2800_module_specs[] = {
374 /* Autoranging modules. */
375 [PM2800_MOD_30V_10A] = { { 0, 30, 0.0075 }, { 0, 10, 0.0025 } },
376 [PM2800_MOD_60V_5A] = { { 0, 60, 0.015 }, { 0, 5, 0.00125 } },
377 [PM2800_MOD_60V_10A] = { { 0, 60, 0.015 }, { 0, 10, 0.0025 } },
378 /* Linear modules. */
379 [PM2800_MOD_8V_15A] = { { 0, 8, 0.002 }, { -15, 15, 0.00375 } },
380 [PM2800_MOD_60V_2A] = { { 0, 60, 0.015 }, { -2, 2, 0.0005 } },
381 [PM2800_MOD_120V_1A] = { { 0, 120, 0.030 }, { -1, 1, 0.00025 } },
382};
383
329733d9 384static const struct philips_pm2800_model {
c3eadb07
BV
385 unsigned int chassis;
386 unsigned int num_modules;
387 unsigned int set;
388 unsigned int modules[3];
389} philips_pm2800_matrix[] = {
390 /* Autoranging chassis. */
391 { 1, 1, 0, { PM2800_MOD_30V_10A, 0, 0 } },
392 { 1, 1, 1, { PM2800_MOD_60V_5A, 0, 0 } },
393 { 1, 2, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, 0 } },
394 { 1, 2, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, 0 } },
395 { 1, 2, 2, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, 0 } },
396 { 1, 2, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_10A, 0 } },
397 { 1, 2, 4, { PM2800_MOD_60V_5A, PM2800_MOD_60V_10A, 0 } },
398 { 1, 3, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_30V_10A } },
399 { 1, 3, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
400 { 1, 3, 2, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_60V_5A } },
401 { 1, 3, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
402 /* Linear chassis. */
403 { 3, 1, 0, { PM2800_MOD_60V_2A, 0, 0 } },
404 { 3, 1, 1, { PM2800_MOD_120V_1A, 0, 0 } },
405 { 3, 1, 2, { PM2800_MOD_8V_15A, 0, 0 } },
406 { 3, 2, 0, { PM2800_MOD_60V_2A, 0, 0 } },
407 { 3, 2, 1, { PM2800_MOD_120V_1A, 0, 0 } },
408 { 3, 2, 2, { PM2800_MOD_60V_2A, PM2800_MOD_120V_1A, 0 } },
409 { 3, 2, 3, { PM2800_MOD_8V_15A, PM2800_MOD_8V_15A, 0 } },
410};
411
329733d9 412static const char *philips_pm2800_names[] = { "1", "2", "3" };
c3eadb07
BV
413
414static int philips_pm2800_probe_channels(struct sr_dev_inst *sdi,
415 struct sr_scpi_hw_info *hw_info,
416 struct channel_spec **channels, unsigned int *num_channels,
417 struct channel_group_spec **channel_groups, unsigned int *num_channel_groups)
418{
329733d9
UH
419 const struct philips_pm2800_model *model;
420 const struct philips_pm2800_module_spec *spec;
c3eadb07
BV
421 unsigned int chassis, num_modules, set, module, m, i;
422
423 (void)sdi;
424
425 /*
426 * The model number as reported by *IDN? looks like e.g. PM2813/11,
427 * Where "PM28" is fixed, followed by the chassis code (1 = autoranging,
428 * 3 = linear series) and the number of modules: 1-3 for autoranging,
429 * 1-2 for linear.
430 * After the slash, the first digit denotes the module set. The
431 * digit after that denotes front (5) or rear (1) binding posts.
432 */
433 chassis = hw_info->model[4] - 0x30;
434 num_modules = hw_info->model[5] - 0x30;
435 set = hw_info->model[7] - 0x30;
436 for (m = 0; m < ARRAY_SIZE(philips_pm2800_matrix); m++) {
437 model = &philips_pm2800_matrix[m];
438 if (model->chassis == chassis && model->num_modules == num_modules
439 && model->set == set)
440 break;
441 }
442 if (m == ARRAY_SIZE(philips_pm2800_matrix)) {
443 sr_dbg("Model %s not found in matrix.", hw_info->model);
444 return SR_ERR;
445 }
446
447 sr_dbg("Found %d output channel%s:", num_modules, num_modules > 1 ? "s" : "");
448 *channels = g_malloc0(sizeof(struct channel_spec) * num_modules);
449 *channel_groups = g_malloc0(sizeof(struct channel_group_spec) * num_modules);
450 for (i = 0; i < num_modules; i++) {
451 module = model->modules[i];
452 spec = &philips_pm2800_module_specs[module];
453 sr_dbg("output %d: %.0f - %.0fV, %.0f - %.0fA", i + 1,
454 spec->voltage[0], spec->voltage[1],
455 spec->current[0], spec->current[1]);
329733d9 456 (*channels)[i].name = (char *)philips_pm2800_names[i];
c3eadb07 457 memcpy(&((*channels)[i].voltage), spec, sizeof(float) * 6);
329733d9 458 (*channel_groups)[i].name = (char *)philips_pm2800_names[i];
c3eadb07
BV
459 (*channel_groups)[i].channel_index_mask = 1 << i;
460 (*channel_groups)[i].features = PPS_OTP | PPS_OVP | PPS_OCP;
461 }
462 *num_channels = *num_channel_groups = num_modules;
463
464 return SR_OK;
465}
466
8cb5affe 467static const struct scpi_command philips_pm2800_cmd[] = {
c3eadb07
BV
468 { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
469 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
470 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
471 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
472 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
473 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
474 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
475 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
476 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
477 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
478 { SCPI_CMD_GET_OUTPUT_REGULATION, ":SOUR:FUNC:MODE?" },
479 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":SOUR:VOLT:PROT:TRIP?" },
480 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV?" },
481 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV %.6f" },
482 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":SOUR:CURR:PROT:STAT?" },
483 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":SOUR:CURR:PROT:STAT ON" },
484 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":SOUR:CURR:PROT:STAT OFF" },
485 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":SOUR:CURR:PROT:TRIP?" },
486};
487
d4eabea8 488SR_PRIV const struct scpi_pps pps_profiles[] = {
5c9e56c9
AG
489 /* Agilent N5767A */
490 { "Agilent", "N5767A", 0,
491 ARRAY_AND_SIZE(agilent_n5700a_devopts),
492 ARRAY_AND_SIZE(agilent_n5700a_devopts_cg),
493 ARRAY_AND_SIZE(agilent_n5767a_ch),
494 ARRAY_AND_SIZE(agilent_n5767a_cg),
495 ARRAY_AND_SIZE(agilent_n5700a_cmd),
496 .probe_channels = NULL,
497 },
4ee1e2f3
AG
498 /* Chroma 61604 */
499 { "Chroma", "61604", 0,
500 ARRAY_AND_SIZE(chroma_61604_devopts),
501 ARRAY_AND_SIZE(chroma_61604_devopts_cg),
502 ARRAY_AND_SIZE(chroma_61604_ch),
503 ARRAY_AND_SIZE(chroma_61604_cg),
504 ARRAY_AND_SIZE(chroma_61604_cmd),
505 .probe_channels = NULL,
506 },
5281993e 507 /* Chroma 62000 series */
9a5185c7 508 { "Chroma", "620[0-9]{2}P-[0-9]{2,3}-[0-9]{1,3}", 0,
5281993e
AG
509 ARRAY_AND_SIZE(chroma_62000_devopts),
510 ARRAY_AND_SIZE(chroma_62000_devopts_cg),
9a5185c7
AG
511 NULL, 0,
512 NULL, 0,
5281993e 513 ARRAY_AND_SIZE(chroma_62000_cmd),
9a5185c7 514 .probe_channels = chroma_62000p_probe_channels,
5281993e 515 },
bc4a2a46
BV
516 /* HP 6632B */
517 { "HP", "6632B", 0,
518 ARRAY_AND_SIZE(hp_6632b_devopts),
bfc86799 519 ARRAY_AND_SIZE(devopts_none),
bc4a2a46
BV
520 ARRAY_AND_SIZE(hp_6632b_ch),
521 ARRAY_AND_SIZE(hp_6632b_cg),
522 ARRAY_AND_SIZE(hp_6632b_cmd),
c3eadb07 523 .probe_channels = NULL,
bc4a2a46
BV
524 },
525
d4eabea8 526 /* Rigol DP800 series */
cfcdf576
ML
527 { "Rigol", "^DP821A$", PPS_OTP,
528 ARRAY_AND_SIZE(rigol_dp800_devopts),
529 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
530 ARRAY_AND_SIZE(rigol_dp821a_ch),
531 ARRAY_AND_SIZE(rigol_dp820_cg),
532 ARRAY_AND_SIZE(rigol_dp800_cmd),
533 .probe_channels = NULL,
534 },
3222ee10
BV
535 { "Rigol", "^DP831A$", PPS_OTP,
536 ARRAY_AND_SIZE(rigol_dp800_devopts),
537 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
538 ARRAY_AND_SIZE(rigol_dp831_ch),
cfcdf576 539 ARRAY_AND_SIZE(rigol_dp830_cg),
3222ee10 540 ARRAY_AND_SIZE(rigol_dp800_cmd),
c3eadb07 541 .probe_channels = NULL,
3222ee10
BV
542 },
543 { "Rigol", "^(DP832|DP832A)$", PPS_OTP,
544 ARRAY_AND_SIZE(rigol_dp800_devopts),
545 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
546 ARRAY_AND_SIZE(rigol_dp832_ch),
cfcdf576 547 ARRAY_AND_SIZE(rigol_dp830_cg),
3222ee10 548 ARRAY_AND_SIZE(rigol_dp800_cmd),
c3eadb07
BV
549 .probe_channels = NULL,
550 },
551
552 /* Philips/Fluke PM2800 series */
553 { "Philips", "^PM28[13][123]/[01234]{1,2}$", 0,
9d9cf1c4 554 ARRAY_AND_SIZE(philips_pm2800_devopts),
c3eadb07
BV
555 ARRAY_AND_SIZE(philips_pm2800_devopts_cg),
556 NULL, 0,
557 NULL, 0,
558 ARRAY_AND_SIZE(philips_pm2800_cmd),
559 philips_pm2800_probe_channels,
d4eabea8
BV
560 },
561};
d4eabea8 562
1beccaed 563SR_PRIV unsigned int num_pps_profiles = ARRAY_SIZE(pps_profiles);