[libsigrok.git] / src / hardware / scpi-pps / profiles.c

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2014 Bert Vermeulen <bert@biot.com>
 * Copyright (C) 2015 Google, Inc.
 * (Written by Alexandru Gagniuc <mrnuke@google.com> for Google, Inc.)
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <string.h>
#include <strings.h>
#include "protocol.h"

#define CH_IDX(x) (1 << x)
#define FREQ_DC_ONLY {0, 0, 0}

const char *pps_vendors[][2] = {
	{ "RIGOL TECHNOLOGIES", "Rigol" },
	{ "HEWLETT-PACKARD", "HP" },
	{ "PHILIPS", "Philips" },
	{ "Chroma ATE", "Chroma" },
};

const char *get_vendor(const char *raw_vendor)
{
	unsigned int i;

	for (i = 0; i < ARRAY_SIZE(pps_vendors); i++) {
		if (!strcasecmp(raw_vendor, pps_vendors[i][0]))
			return pps_vendors[i][1];
	}

	return raw_vendor;
}

static const uint32_t devopts_none[] = { };

/* Chroma 61600 series AC source */
static const uint32_t chroma_61604_devopts[] = {
	SR_CONF_CONTINUOUS | SR_CONF_SET,
};

static const uint32_t chroma_61604_devopts_cg[] = {
	SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_OUTPUT_VOLTAGE | SR_CONF_GET,
	SR_CONF_OUTPUT_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
	SR_CONF_OUTPUT_CURRENT | SR_CONF_GET,
	SR_CONF_OUTPUT_ENABLED | SR_CONF_GET | SR_CONF_SET,
};

const struct channel_spec chroma_61604_ch[] = {
	{ "1", { 0, 300, 0.1 }, { 0, 16, 0.1 }, FREQ_DC_ONLY },
};

const struct channel_group_spec chroma_61604_cg[] = {
	{ "1", CH_IDX(0), PPS_OVP | PPS_OCP },
};

const struct scpi_command chroma_61604_cmd[] = {
	{ SCPI_CMD_REMOTE, "SYST:REM" },
	{ SCPI_CMD_LOCAL, "SYST:LOC" },
	{ SCPI_CMD_GET_MEAS_VOLTAGE, ":FETC:VOLT:ACDC?" },
	{ SCPI_CMD_GET_MEAS_CURRENT, ":FETC:CURR:AC?" },
	{ SCPI_CMD_GET_MEAS_POWER, ":FETC:POW:AC?" },
	{ SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT:AC?" },
	{ SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT:AC %.1f" },
	{ SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
	{ SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
	{ SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
	{ SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC?" },
	{ SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC %.1f" },
	/* This is not a current limit mode. It is overcurrent protection */
	{ SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM?" },
	{ SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM %.2f" },
};

/* Rigol DP800 series */
static const uint32_t rigol_dp800_devopts[] = {
	SR_CONF_CONTINUOUS | SR_CONF_SET,
	SR_CONF_OVER_TEMPERATURE_PROTECTION | SR_CONF_GET | SR_CONF_SET,
};

static const uint32_t rigol_dp800_devopts_cg[] = {
	SR_CONF_OUTPUT_REGULATION | SR_CONF_GET,
	SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
	SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
	SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_OUTPUT_VOLTAGE | SR_CONF_GET,
	SR_CONF_OUTPUT_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
	SR_CONF_OUTPUT_CURRENT | SR_CONF_GET,
	SR_CONF_OUTPUT_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
	SR_CONF_OUTPUT_ENABLED | SR_CONF_GET | SR_CONF_SET,
};

const struct channel_spec rigol_dp821a_ch[] = {
	{ "1", { 0, 60, 0.001 }, { 0, 1, 0.0001 }, FREQ_DC_ONLY },
	{ "2", { 0, 8, 0.001 }, { 0, 10, 0.001 }, FREQ_DC_ONLY },
};

const struct channel_spec rigol_dp831_ch[] = {
	{ "1", { 0, 8, 0.001 }, { 0, 5, 0.0003 }, FREQ_DC_ONLY },
	{ "2", { 0, 30, 0.001 }, { 0, 2, 0.0001 }, FREQ_DC_ONLY },
	{ "3", { 0, -30, 0.001 }, { 0, 2, 0.0001 }, FREQ_DC_ONLY },
};

const struct channel_spec rigol_dp832_ch[] = {
	{ "1", { 0, 30, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY },
	{ "2", { 0, 30, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY },
	{ "3", { 0, 5, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY },
};

const struct channel_group_spec rigol_dp820_cg[] = {
	{ "1", CH_IDX(0), PPS_OVP | PPS_OCP },
	{ "2", CH_IDX(1), PPS_OVP | PPS_OCP },
};

const struct channel_group_spec rigol_dp830_cg[] = {
	{ "1", CH_IDX(0), PPS_OVP | PPS_OCP },
	{ "2", CH_IDX(1), PPS_OVP | PPS_OCP },
	{ "3", CH_IDX(2), PPS_OVP | PPS_OCP },
};

const struct scpi_command rigol_dp800_cmd[] = {
	{ SCPI_CMD_REMOTE, "SYST:REMOTE" },
	{ SCPI_CMD_LOCAL, "SYST:LOCAL" },
	{ SCPI_CMD_BEEPER, "SYST:BEEP:STAT?" },
	{ SCPI_CMD_BEEPER_ENABLE, "SYST:BEEP:STAT ON" },
	{ SCPI_CMD_BEEPER_DISABLE, "SYST:BEEP:STAT OFF" },
	{ SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
	{ SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
	{ SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
	{ SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE?" },
	{ SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
	{ SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
	{ SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
	{ SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
	{ SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
	{ SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
	{ SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
	{ SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" },
	{ SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP?" },
	{ SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_ENABLE, ":SYST:OTP ON" },
	{ SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_DISABLE, ":SYST:OTP OFF" },
	{ SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP?" },
	{ SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP ON" },
	{ SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP OFF" },
	{ SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES?" },
	{ SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL?" },
	{ SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL %.6f" },
	{ SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP?" },
	{ SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP:STAT ON" },
	{ SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP:STAT OFF" },
	{ SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES?" },
	{ SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL?" },
	{ SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL %.6f" },
};

/* HP 663xx series */
static const uint32_t hp_6632b_devopts[] = {
	SR_CONF_CONTINUOUS | SR_CONF_SET,
	SR_CONF_OUTPUT_ENABLED | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_OUTPUT_VOLTAGE | SR_CONF_GET,
	SR_CONF_OUTPUT_CURRENT | SR_CONF_GET,
	SR_CONF_OUTPUT_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
	SR_CONF_OUTPUT_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
};

const struct channel_spec hp_6632b_ch[] = {
	{ "1", { 0, 20.475, 0.005 }, { 0, 5.1188, 0.00132 }, FREQ_DC_ONLY },
};

const struct channel_group_spec hp_6632b_cg[] = {
	{ "1", CH_IDX(0), 0 },
};

const struct scpi_command hp_6632b_cmd[] = {
	{ SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP:STAT?" },
	{ SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP:STAT ON" },
	{ SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP:STAT OFF" },
	{ SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
	{ SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
	{ SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
	{ SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
	{ SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
	{ SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
};

/* Philips/Fluke PM2800 series */
static const uint32_t philips_pm2800_devopts[] = {
	SR_CONF_CONTINUOUS | SR_CONF_SET,
};

static const uint32_t philips_pm2800_devopts_cg[] = {
	SR_CONF_OUTPUT_ENABLED | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_OUTPUT_VOLTAGE | SR_CONF_GET,
	SR_CONF_OUTPUT_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
	SR_CONF_OUTPUT_CURRENT | SR_CONF_GET,
	SR_CONF_OUTPUT_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
	SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
	SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
	SR_CONF_OUTPUT_REGULATION | SR_CONF_GET,
};

enum philips_pm2800_modules {
	PM2800_MOD_30V_10A = 1,
	PM2800_MOD_60V_5A,
	PM2800_MOD_60V_10A,
	PM2800_MOD_8V_15A,
	PM2800_MOD_60V_2A,
	PM2800_MOD_120V_1A,
};

static const struct philips_pm2800_module_spec {
	/* Min, max, programming resolution. */
	float voltage[3];
	float current[3];
} philips_pm2800_module_specs[] = {
	/* Autoranging modules. */
	[PM2800_MOD_30V_10A] = { { 0, 30, 0.0075 }, { 0, 10, 0.0025 } },
	[PM2800_MOD_60V_5A] = { { 0, 60, 0.015 }, { 0, 5, 0.00125 } },
	[PM2800_MOD_60V_10A] = { { 0, 60, 0.015 }, { 0, 10, 0.0025 } },
	/* Linear modules. */
	[PM2800_MOD_8V_15A] = { { 0, 8, 0.002 }, { -15, 15, 0.00375 } },
	[PM2800_MOD_60V_2A] = { { 0, 60, 0.015 }, { -2, 2, 0.0005 } },
	[PM2800_MOD_120V_1A] = { { 0, 120, 0.030 }, { -1, 1, 0.00025 } },
};

static const struct philips_pm2800_model {
	unsigned int chassis;
	unsigned int num_modules;
	unsigned int set;
	unsigned int modules[3];
} philips_pm2800_matrix[] = {
	/* Autoranging chassis. */
	{ 1, 1, 0, { PM2800_MOD_30V_10A, 0, 0 } },
	{ 1, 1, 1, { PM2800_MOD_60V_5A, 0, 0 } },
	{ 1, 2, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, 0 } },
	{ 1, 2, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, 0 } },
	{ 1, 2, 2, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, 0 } },
	{ 1, 2, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_10A, 0 } },
	{ 1, 2, 4, { PM2800_MOD_60V_5A, PM2800_MOD_60V_10A, 0 } },
	{ 1, 3, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_30V_10A } },
	{ 1, 3, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
	{ 1, 3, 2, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_60V_5A } },
	{ 1, 3, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
	/* Linear chassis. */
	{ 3, 1, 0, { PM2800_MOD_60V_2A, 0, 0 } },
	{ 3, 1, 1, { PM2800_MOD_120V_1A, 0, 0 } },
	{ 3, 1, 2, { PM2800_MOD_8V_15A, 0, 0 } },
	{ 3, 2, 0, { PM2800_MOD_60V_2A, 0, 0 } },
	{ 3, 2, 1, { PM2800_MOD_120V_1A, 0, 0 } },
	{ 3, 2, 2, { PM2800_MOD_60V_2A, PM2800_MOD_120V_1A, 0 } },
	{ 3, 2, 3, { PM2800_MOD_8V_15A, PM2800_MOD_8V_15A, 0 } },
};

static const char *philips_pm2800_names[] = { "1", "2", "3" };

static int philips_pm2800_probe_channels(struct sr_dev_inst *sdi,
		struct sr_scpi_hw_info *hw_info,
		struct channel_spec **channels, unsigned int *num_channels,
		struct channel_group_spec **channel_groups, unsigned int *num_channel_groups)
{
	const struct philips_pm2800_model *model;
	const struct philips_pm2800_module_spec *spec;
	unsigned int chassis, num_modules, set, module, m, i;

	(void)sdi;

	/*
	 * The model number as reported by *IDN? looks like e.g. PM2813/11,
	 * Where "PM28" is fixed, followed by the chassis code (1 = autoranging,
	 * 3 = linear series) and the number of modules: 1-3 for autoranging,
	 * 1-2 for linear.
	 * After the slash, the first digit denotes the module set. The
	 * digit after that denotes front (5) or rear (1) binding posts.
	 */
	chassis = hw_info->model[4] - 0x30;
	num_modules = hw_info->model[5] - 0x30;
	set = hw_info->model[7] - 0x30;
	for (m = 0; m < ARRAY_SIZE(philips_pm2800_matrix); m++) {
		model = &philips_pm2800_matrix[m];
		if (model->chassis == chassis && model->num_modules == num_modules
				&& model->set == set)
			break;
	}
	if (m == ARRAY_SIZE(philips_pm2800_matrix)) {
		sr_dbg("Model %s not found in matrix.", hw_info->model);
		return SR_ERR;
	}

	sr_dbg("Found %d output channel%s:", num_modules, num_modules > 1 ? "s" : "");
	*channels = g_malloc0(sizeof(struct channel_spec) * num_modules);
	*channel_groups = g_malloc0(sizeof(struct channel_group_spec) * num_modules);
	for (i = 0; i < num_modules; i++) {
		module = model->modules[i];
		spec = &philips_pm2800_module_specs[module];
		sr_dbg("output %d: %.0f - %.0fV, %.0f - %.0fA", i + 1,
				spec->voltage[0], spec->voltage[1],
				spec->current[0], spec->current[1]);
		(*channels)[i].name = (char *)philips_pm2800_names[i];
		memcpy(&((*channels)[i].voltage), spec, sizeof(float) * 6);
		(*channel_groups)[i].name = (char *)philips_pm2800_names[i];
		(*channel_groups)[i].channel_index_mask = 1 << i;
		(*channel_groups)[i].features = PPS_OTP | PPS_OVP | PPS_OCP;
	}
	*num_channels = *num_channel_groups = num_modules;

	return SR_OK;
}

const struct scpi_command philips_pm2800_cmd[] = {
	{ SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
	{ SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
	{ SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
	{ SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
	{ SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
	{ SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
	{ SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
	{ SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
	{ SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
	{ SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
	{ SCPI_CMD_GET_OUTPUT_REGULATION, ":SOUR:FUNC:MODE?" },
	{ SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":SOUR:VOLT:PROT:TRIP?" },
	{ SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV?" },
	{ SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV %.6f" },
	{ SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":SOUR:CURR:PROT:STAT?" },
	{ SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":SOUR:CURR:PROT:STAT ON" },
	{ SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":SOUR:CURR:PROT:STAT OFF" },
	{ SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":SOUR:CURR:PROT:TRIP?" },
};

SR_PRIV const struct scpi_pps pps_profiles[] = {
	/* Chroma 61604 */
	{ "Chroma", "61604", 0,
		ARRAY_AND_SIZE(chroma_61604_devopts),
		ARRAY_AND_SIZE(chroma_61604_devopts_cg),
		ARRAY_AND_SIZE(chroma_61604_ch),
		ARRAY_AND_SIZE(chroma_61604_cg),
		ARRAY_AND_SIZE(chroma_61604_cmd),
		.probe_channels = NULL,
	},
	/* HP 6632B */
	{ "HP", "6632B", 0,
		ARRAY_AND_SIZE(hp_6632b_devopts),
		ARRAY_AND_SIZE(devopts_none),
		ARRAY_AND_SIZE(hp_6632b_ch),
		ARRAY_AND_SIZE(hp_6632b_cg),
		ARRAY_AND_SIZE(hp_6632b_cmd),
		.probe_channels = NULL,
	},

	/* Rigol DP800 series */
	{ "Rigol", "^DP821A$", PPS_OTP,
		ARRAY_AND_SIZE(rigol_dp800_devopts),
		ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
		ARRAY_AND_SIZE(rigol_dp821a_ch),
		ARRAY_AND_SIZE(rigol_dp820_cg),
		ARRAY_AND_SIZE(rigol_dp800_cmd),
		.probe_channels = NULL,
	},
	{ "Rigol", "^DP831A$", PPS_OTP,
		ARRAY_AND_SIZE(rigol_dp800_devopts),
		ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
		ARRAY_AND_SIZE(rigol_dp831_ch),
		ARRAY_AND_SIZE(rigol_dp830_cg),
		ARRAY_AND_SIZE(rigol_dp800_cmd),
		.probe_channels = NULL,
	},
	{ "Rigol", "^(DP832|DP832A)$", PPS_OTP,
		ARRAY_AND_SIZE(rigol_dp800_devopts),
		ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
		ARRAY_AND_SIZE(rigol_dp832_ch),
		ARRAY_AND_SIZE(rigol_dp830_cg),
		ARRAY_AND_SIZE(rigol_dp800_cmd),
		.probe_channels = NULL,
	},

	/* Philips/Fluke PM2800 series */
	{ "Philips", "^PM28[13][123]/[01234]{1,2}$", 0,
		ARRAY_AND_SIZE(philips_pm2800_devopts),
		ARRAY_AND_SIZE(philips_pm2800_devopts_cg),
		NULL, 0,
		NULL, 0,
		ARRAY_AND_SIZE(philips_pm2800_cmd),
		philips_pm2800_probe_channels,
	},
};

SR_PRIV unsigned int num_pps_profiles = ARRAY_SIZE(pps_profiles);
Commit	Line	Data
d4eabea8 BV	1	/*
	2	* This file is part of the libsigrok project.
	3	*
	4	* Copyright (C) 2014 Bert Vermeulen <bert@biot.com>
4ee1e2f3 AG	5	* Copyright (C) 2015 Google, Inc.
4ee1e2f3 AG	6	* (Written by Alexandru Gagniuc <mrnuke@google.com> for Google, Inc.)
d4eabea8 BV	7	*
	8	* This program is free software: you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation, either version 3 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	20	*/
	21
22c18b03	22	#include <string.h>
ba464a12	23	#include <strings.h>
d4eabea8 BV	24	#include "protocol.h"
	25
	26	#define CH_IDX(x) (1 << x)
4264f1c0	27	#define FREQ_DC_ONLY {0, 0, 0}
d4eabea8	28
22c18b03 BV	29	const char *pps_vendors[][2] = {
22c18b03 BV	30	{ "RIGOL TECHNOLOGIES", "Rigol" },
bc4a2a46	31	{ "HEWLETT-PACKARD", "HP" },
c3eadb07	32	{ "PHILIPS", "Philips" },
4ee1e2f3	33	{ "Chroma ATE", "Chroma" },
d4eabea8 BV	34	};
d4eabea8 BV	35
22c18b03 BV	36	const char get_vendor(const char raw_vendor)
	37	{
	38	unsigned int i;
	39
	40	for (i = 0; i < ARRAY_SIZE(pps_vendors); i++) {
	41	if (!strcasecmp(raw_vendor, pps_vendors[i][0]))
	42	return pps_vendors[i][1];
	43	}
	44
	45	return raw_vendor;
	46	}
	47
584560f1	48	static const uint32_t devopts_none[] = { };
bfc86799	49
4ee1e2f3 AG	50	/* Chroma 61600 series AC source */
	51	static const uint32_t chroma_61604_devopts[] = {
	52	SR_CONF_CONTINUOUS \| SR_CONF_SET,
	53	};
	54
	55	static const uint32_t chroma_61604_devopts_cg[] = {
	56	SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD \| SR_CONF_GET \| SR_CONF_SET,
	57	SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD \| SR_CONF_GET \| SR_CONF_SET,
	58	SR_CONF_OUTPUT_VOLTAGE \| SR_CONF_GET,
	59	SR_CONF_OUTPUT_VOLTAGE_TARGET \| SR_CONF_GET \| SR_CONF_SET \| SR_CONF_LIST,
	60	SR_CONF_OUTPUT_CURRENT \| SR_CONF_GET,
	61	SR_CONF_OUTPUT_ENABLED \| SR_CONF_GET \| SR_CONF_SET,
	62	};
	63
	64	const struct channel_spec chroma_61604_ch[] = {
4264f1c0	65	{ "1", { 0, 300, 0.1 }, { 0, 16, 0.1 }, FREQ_DC_ONLY },
4ee1e2f3 AG	66	};
	67
	68	const struct channel_group_spec chroma_61604_cg[] = {
	69	{ "1", CH_IDX(0), PPS_OVP \| PPS_OCP },
	70	};
	71
	72	const struct scpi_command chroma_61604_cmd[] = {
	73	{ SCPI_CMD_REMOTE, "SYST:REM" },
	74	{ SCPI_CMD_LOCAL, "SYST:LOC" },
	75	{ SCPI_CMD_GET_MEAS_VOLTAGE, ":FETC:VOLT:ACDC?" },
	76	{ SCPI_CMD_GET_MEAS_CURRENT, ":FETC:CURR:AC?" },
	77	{ SCPI_CMD_GET_MEAS_POWER, ":FETC:POW:AC?" },
	78	{ SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT:AC?" },
	79	{ SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT:AC %.1f" },
	80	{ SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
	81	{ SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
	82	{ SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
	83	{ SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC?" },
	84	{ SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC %.1f" },
	85	/* This is not a current limit mode. It is overcurrent protection */
	86	{ SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM?" },
	87	{ SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM %.2f" },
	88	};
	89
d4eabea8	90	/* Rigol DP800 series */
584560f1	91	static const uint32_t rigol_dp800_devopts[] = {
9d9cf1c4	92	SR_CONF_CONTINUOUS \| SR_CONF_SET,
5827f61b	93	SR_CONF_OVER_TEMPERATURE_PROTECTION \| SR_CONF_GET \| SR_CONF_SET,
d4eabea8 BV	94	};
d4eabea8 BV	95
584560f1	96	static const uint32_t rigol_dp800_devopts_cg[] = {
5827f61b BV	97	SR_CONF_OUTPUT_REGULATION \| SR_CONF_GET,
	98	SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED \| SR_CONF_GET \| SR_CONF_SET,
	99	SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE \| SR_CONF_GET,
	100	SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD \| SR_CONF_GET \| SR_CONF_SET,
	101	SR_CONF_OVER_CURRENT_PROTECTION_ENABLED \| SR_CONF_GET \| SR_CONF_SET,
	102	SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE \| SR_CONF_GET,
	103	SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD \| SR_CONF_GET \| SR_CONF_SET,
	104	SR_CONF_OUTPUT_VOLTAGE \| SR_CONF_GET,
ca95e90f	105	SR_CONF_OUTPUT_VOLTAGE_TARGET \| SR_CONF_GET \| SR_CONF_SET \| SR_CONF_LIST,
5827f61b	106	SR_CONF_OUTPUT_CURRENT \| SR_CONF_GET,
ca95e90f	107	SR_CONF_OUTPUT_CURRENT_LIMIT \| SR_CONF_GET \| SR_CONF_SET \| SR_CONF_LIST,
5827f61b	108	SR_CONF_OUTPUT_ENABLED \| SR_CONF_GET \| SR_CONF_SET,
d4eabea8 BV	109	};
d4eabea8 BV	110
329733d9	111	const struct channel_spec rigol_dp821a_ch[] = {
4264f1c0 AG	112	{ "1", { 0, 60, 0.001 }, { 0, 1, 0.0001 }, FREQ_DC_ONLY },
4264f1c0 AG	113	{ "2", { 0, 8, 0.001 }, { 0, 10, 0.001 }, FREQ_DC_ONLY },
cfcdf576 ML	114	};
cfcdf576 ML	115
329733d9	116	const struct channel_spec rigol_dp831_ch[] = {
4264f1c0 AG	117	{ "1", { 0, 8, 0.001 }, { 0, 5, 0.0003 }, FREQ_DC_ONLY },
	118	{ "2", { 0, 30, 0.001 }, { 0, 2, 0.0001 }, FREQ_DC_ONLY },
	119	{ "3", { 0, -30, 0.001 }, { 0, 2, 0.0001 }, FREQ_DC_ONLY },
d4eabea8 BV	120	};
d4eabea8 BV	121
329733d9	122	const struct channel_spec rigol_dp832_ch[] = {
4264f1c0 AG	123	{ "1", { 0, 30, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY },
	124	{ "2", { 0, 30, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY },
	125	{ "3", { 0, 5, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY },
3222ee10 BV	126	};
3222ee10 BV	127
329733d9	128	const struct channel_group_spec rigol_dp820_cg[] = {
cfcdf576 ML	129	{ "1", CH_IDX(0), PPS_OVP \| PPS_OCP },
	130	{ "2", CH_IDX(1), PPS_OVP \| PPS_OCP },
	131	};
	132
329733d9	133	const struct channel_group_spec rigol_dp830_cg[] = {
d4eabea8 BV	134	{ "1", CH_IDX(0), PPS_OVP \| PPS_OCP },
	135	{ "2", CH_IDX(1), PPS_OVP \| PPS_OCP },
	136	{ "3", CH_IDX(2), PPS_OVP \| PPS_OCP },
	137	};
	138
329733d9	139	const struct scpi_command rigol_dp800_cmd[] = {
60475cd7 BV	140	{ SCPI_CMD_REMOTE, "SYST:REMOTE" },
60475cd7 BV	141	{ SCPI_CMD_LOCAL, "SYST:LOCAL" },
ee2860ee BV	142	{ SCPI_CMD_BEEPER, "SYST:BEEP:STAT?" },
	143	{ SCPI_CMD_BEEPER_ENABLE, "SYST:BEEP:STAT ON" },
	144	{ SCPI_CMD_BEEPER_DISABLE, "SYST:BEEP:STAT OFF" },
60475cd7 BV	145	{ SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
	146	{ SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
	147	{ SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
	148	{ SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE?" },
	149	{ SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
	150	{ SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
	151	{ SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
	152	{ SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
	153	{ SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
	154	{ SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
	155	{ SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
	156	{ SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" },
d4eabea8	157	{ SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP?" },
53a81803 BV	158	{ SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_ENABLE, ":SYST:OTP ON" },
53a81803 BV	159	{ SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_DISABLE, ":SYST:OTP OFF" },
60475cd7 BV	160	{ SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP?" },
	161	{ SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP ON" },
	162	{ SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP OFF" },
	163	{ SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES?" },
	164	{ SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL?" },
	165	{ SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL %.6f" },
	166	{ SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP?" },
	167	{ SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP:STAT ON" },
	168	{ SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP:STAT OFF" },
	169	{ SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES?" },
	170	{ SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL?" },
	171	{ SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL %.6f" },
d4eabea8 BV	172	};
d4eabea8 BV	173
bfc86799	174	/* HP 663xx series */
584560f1	175	static const uint32_t hp_6632b_devopts[] = {
9d9cf1c4	176	SR_CONF_CONTINUOUS \| SR_CONF_SET,
5827f61b BV	177	SR_CONF_OUTPUT_ENABLED \| SR_CONF_GET \| SR_CONF_SET,
	178	SR_CONF_OUTPUT_VOLTAGE \| SR_CONF_GET,
	179	SR_CONF_OUTPUT_CURRENT \| SR_CONF_GET,
ca95e90f BV	180	SR_CONF_OUTPUT_VOLTAGE_TARGET \| SR_CONF_GET \| SR_CONF_SET \| SR_CONF_LIST,
ca95e90f BV	181	SR_CONF_OUTPUT_CURRENT_LIMIT \| SR_CONF_GET \| SR_CONF_SET \| SR_CONF_LIST,
bc4a2a46 BV	182	};
bc4a2a46 BV	183
329733d9	184	const struct channel_spec hp_6632b_ch[] = {
4264f1c0	185	{ "1", { 0, 20.475, 0.005 }, { 0, 5.1188, 0.00132 }, FREQ_DC_ONLY },
bc4a2a46 BV	186	};
bc4a2a46 BV	187
329733d9	188	const struct channel_group_spec hp_6632b_cg[] = {
bc4a2a46 BV	189	{ "1", CH_IDX(0), 0 },
	190	};
	191
329733d9	192	const struct scpi_command hp_6632b_cmd[] = {
bc4a2a46	193	{ SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP:STAT?" },
53a81803 BV	194	{ SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP:STAT ON" },
53a81803 BV	195	{ SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP:STAT OFF" },
bc4a2a46 BV	196	{ SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
bc4a2a46 BV	197	{ SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
ca95e90f BV	198	{ SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
	199	{ SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
	200	{ SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
	201	{ SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
bc4a2a46 BV	202	};
bc4a2a46 BV	203
c3eadb07	204	/* Philips/Fluke PM2800 series */
9d9cf1c4 BV	205	static const uint32_t philips_pm2800_devopts[] = {
	206	SR_CONF_CONTINUOUS \| SR_CONF_SET,
	207	};
	208
c3eadb07 BV	209	static const uint32_t philips_pm2800_devopts_cg[] = {
	210	SR_CONF_OUTPUT_ENABLED \| SR_CONF_GET \| SR_CONF_SET,
	211	SR_CONF_OUTPUT_VOLTAGE \| SR_CONF_GET,
	212	SR_CONF_OUTPUT_VOLTAGE_TARGET \| SR_CONF_GET \| SR_CONF_SET \| SR_CONF_LIST,
	213	SR_CONF_OUTPUT_CURRENT \| SR_CONF_GET,
	214	SR_CONF_OUTPUT_CURRENT_LIMIT \| SR_CONF_GET \| SR_CONF_SET \| SR_CONF_LIST,
	215	SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE \| SR_CONF_GET,
	216	SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD \| SR_CONF_GET \| SR_CONF_SET,
	217	SR_CONF_OVER_CURRENT_PROTECTION_ENABLED \| SR_CONF_GET \| SR_CONF_SET,
	218	SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE \| SR_CONF_GET,
	219	SR_CONF_OUTPUT_REGULATION \| SR_CONF_GET,
	220	};
	221
	222	enum philips_pm2800_modules {
	223	PM2800_MOD_30V_10A = 1,
	224	PM2800_MOD_60V_5A,
	225	PM2800_MOD_60V_10A,
	226	PM2800_MOD_8V_15A,
	227	PM2800_MOD_60V_2A,
	228	PM2800_MOD_120V_1A,
	229	};
	230
329733d9	231	static const struct philips_pm2800_module_spec {
c3eadb07 BV	232	/* Min, max, programming resolution. */
	233	float voltage[3];
	234	float current[3];
	235	} philips_pm2800_module_specs[] = {
	236	/* Autoranging modules. */
	237	[PM2800_MOD_30V_10A] = { { 0, 30, 0.0075 }, { 0, 10, 0.0025 } },
	238	[PM2800_MOD_60V_5A] = { { 0, 60, 0.015 }, { 0, 5, 0.00125 } },
	239	[PM2800_MOD_60V_10A] = { { 0, 60, 0.015 }, { 0, 10, 0.0025 } },
	240	/* Linear modules. */
	241	[PM2800_MOD_8V_15A] = { { 0, 8, 0.002 }, { -15, 15, 0.00375 } },
	242	[PM2800_MOD_60V_2A] = { { 0, 60, 0.015 }, { -2, 2, 0.0005 } },
	243	[PM2800_MOD_120V_1A] = { { 0, 120, 0.030 }, { -1, 1, 0.00025 } },
	244	};
	245
329733d9	246	static const struct philips_pm2800_model {
c3eadb07 BV	247	unsigned int chassis;
	248	unsigned int num_modules;
	249	unsigned int set;
	250	unsigned int modules[3];
	251	} philips_pm2800_matrix[] = {
	252	/* Autoranging chassis. */
	253	{ 1, 1, 0, { PM2800_MOD_30V_10A, 0, 0 } },
	254	{ 1, 1, 1, { PM2800_MOD_60V_5A, 0, 0 } },
	255	{ 1, 2, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, 0 } },
	256	{ 1, 2, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, 0 } },
	257	{ 1, 2, 2, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, 0 } },
	258	{ 1, 2, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_10A, 0 } },
	259	{ 1, 2, 4, { PM2800_MOD_60V_5A, PM2800_MOD_60V_10A, 0 } },
	260	{ 1, 3, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_30V_10A } },
	261	{ 1, 3, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
	262	{ 1, 3, 2, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_60V_5A } },
	263	{ 1, 3, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
	264	/* Linear chassis. */
	265	{ 3, 1, 0, { PM2800_MOD_60V_2A, 0, 0 } },
	266	{ 3, 1, 1, { PM2800_MOD_120V_1A, 0, 0 } },
	267	{ 3, 1, 2, { PM2800_MOD_8V_15A, 0, 0 } },
	268	{ 3, 2, 0, { PM2800_MOD_60V_2A, 0, 0 } },
	269	{ 3, 2, 1, { PM2800_MOD_120V_1A, 0, 0 } },
	270	{ 3, 2, 2, { PM2800_MOD_60V_2A, PM2800_MOD_120V_1A, 0 } },
	271	{ 3, 2, 3, { PM2800_MOD_8V_15A, PM2800_MOD_8V_15A, 0 } },
	272	};
	273
329733d9	274	static const char *philips_pm2800_names[] = { "1", "2", "3" };
c3eadb07 BV	275
	276	static int philips_pm2800_probe_channels(struct sr_dev_inst *sdi,
	277	struct sr_scpi_hw_info *hw_info,
	278	struct channel_spec *channels, unsigned int num_channels,
	279	struct channel_group_spec *channel_groups, unsigned int num_channel_groups)
	280	{
329733d9 UH	281	const struct philips_pm2800_model *model;
329733d9 UH	282	const struct philips_pm2800_module_spec *spec;
c3eadb07 BV	283	unsigned int chassis, num_modules, set, module, m, i;
	284
	285	(void)sdi;
	286
	287	/*
	288	* The model number as reported by *IDN? looks like e.g. PM2813/11,
	289	* Where "PM28" is fixed, followed by the chassis code (1 = autoranging,
	290	* 3 = linear series) and the number of modules: 1-3 for autoranging,
	291	* 1-2 for linear.
	292	* After the slash, the first digit denotes the module set. The
	293	* digit after that denotes front (5) or rear (1) binding posts.
	294	*/
	295	chassis = hw_info->model[4] - 0x30;
	296	num_modules = hw_info->model[5] - 0x30;
	297	set = hw_info->model[7] - 0x30;
	298	for (m = 0; m < ARRAY_SIZE(philips_pm2800_matrix); m++) {
	299	model = &philips_pm2800_matrix[m];
	300	if (model->chassis == chassis && model->num_modules == num_modules
	301	&& model->set == set)
	302	break;
	303	}
	304	if (m == ARRAY_SIZE(philips_pm2800_matrix)) {
	305	sr_dbg("Model %s not found in matrix.", hw_info->model);
	306	return SR_ERR;
	307	}
	308
	309	sr_dbg("Found %d output channel%s:", num_modules, num_modules > 1 ? "s" : "");
	310	channels = g_malloc0(sizeof(struct channel_spec) num_modules);
	311	channel_groups = g_malloc0(sizeof(struct channel_group_spec) num_modules);
	312	for (i = 0; i < num_modules; i++) {
	313	module = model->modules[i];
	314	spec = &philips_pm2800_module_specs[module];
	315	sr_dbg("output %d: %.0f - %.0fV, %.0f - %.0fA", i + 1,
	316	spec->voltage[0], spec->voltage[1],
	317	spec->current[0], spec->current[1]);
329733d9	318	(channels)[i].name = (char )philips_pm2800_names[i];
c3eadb07	319	memcpy(&((channels)[i].voltage), spec, sizeof(float) 6);
329733d9	320	(channel_groups)[i].name = (char )philips_pm2800_names[i];
c3eadb07 BV	321	(*channel_groups)[i].channel_index_mask = 1 << i;
	322	(*channel_groups)[i].features = PPS_OTP \| PPS_OVP \| PPS_OCP;
	323	}
	324	num_channels = num_channel_groups = num_modules;
	325
	326	return SR_OK;
	327	}
	328
329733d9	329	const struct scpi_command philips_pm2800_cmd[] = {
c3eadb07 BV	330	{ SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
	331	{ SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
	332	{ SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
	333	{ SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
	334	{ SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
	335	{ SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
	336	{ SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
	337	{ SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
	338	{ SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
	339	{ SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
	340	{ SCPI_CMD_GET_OUTPUT_REGULATION, ":SOUR:FUNC:MODE?" },
	341	{ SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":SOUR:VOLT:PROT:TRIP?" },
	342	{ SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV?" },
	343	{ SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV %.6f" },
	344	{ SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":SOUR:CURR:PROT:STAT?" },
	345	{ SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":SOUR:CURR:PROT:STAT ON" },
	346	{ SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":SOUR:CURR:PROT:STAT OFF" },
	347	{ SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":SOUR:CURR:PROT:TRIP?" },
	348	};
	349
d4eabea8	350	SR_PRIV const struct scpi_pps pps_profiles[] = {
4ee1e2f3 AG	351	/* Chroma 61604 */
	352	{ "Chroma", "61604", 0,
	353	ARRAY_AND_SIZE(chroma_61604_devopts),
	354	ARRAY_AND_SIZE(chroma_61604_devopts_cg),
	355	ARRAY_AND_SIZE(chroma_61604_ch),
	356	ARRAY_AND_SIZE(chroma_61604_cg),
	357	ARRAY_AND_SIZE(chroma_61604_cmd),
	358	.probe_channels = NULL,
	359	},
bc4a2a46 BV	360	/* HP 6632B */
	361	{ "HP", "6632B", 0,
	362	ARRAY_AND_SIZE(hp_6632b_devopts),
bfc86799	363	ARRAY_AND_SIZE(devopts_none),
bc4a2a46 BV	364	ARRAY_AND_SIZE(hp_6632b_ch),
	365	ARRAY_AND_SIZE(hp_6632b_cg),
	366	ARRAY_AND_SIZE(hp_6632b_cmd),
c3eadb07	367	.probe_channels = NULL,
bc4a2a46 BV	368	},
bc4a2a46 BV	369
d4eabea8	370	/* Rigol DP800 series */
cfcdf576 ML	371	{ "Rigol", "^DP821A$", PPS_OTP,
	372	ARRAY_AND_SIZE(rigol_dp800_devopts),
	373	ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
	374	ARRAY_AND_SIZE(rigol_dp821a_ch),
	375	ARRAY_AND_SIZE(rigol_dp820_cg),
	376	ARRAY_AND_SIZE(rigol_dp800_cmd),
	377	.probe_channels = NULL,
	378	},
3222ee10 BV	379	{ "Rigol", "^DP831A$", PPS_OTP,
	380	ARRAY_AND_SIZE(rigol_dp800_devopts),
	381	ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
	382	ARRAY_AND_SIZE(rigol_dp831_ch),
cfcdf576	383	ARRAY_AND_SIZE(rigol_dp830_cg),
3222ee10	384	ARRAY_AND_SIZE(rigol_dp800_cmd),
c3eadb07	385	.probe_channels = NULL,
3222ee10 BV	386	},
	387	{ "Rigol", "^(DP832\|DP832A)$", PPS_OTP,
	388	ARRAY_AND_SIZE(rigol_dp800_devopts),
	389	ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
	390	ARRAY_AND_SIZE(rigol_dp832_ch),
cfcdf576	391	ARRAY_AND_SIZE(rigol_dp830_cg),
3222ee10	392	ARRAY_AND_SIZE(rigol_dp800_cmd),
c3eadb07 BV	393	.probe_channels = NULL,
	394	},
	395
	396	/* Philips/Fluke PM2800 series */
	397	{ "Philips", "^PM28[13][123]/[01234]{1,2}$", 0,
9d9cf1c4	398	ARRAY_AND_SIZE(philips_pm2800_devopts),
c3eadb07 BV	399	ARRAY_AND_SIZE(philips_pm2800_devopts_cg),
	400	NULL, 0,
	401	NULL, 0,
	402	ARRAY_AND_SIZE(philips_pm2800_cmd),
	403	philips_pm2800_probe_channels,
d4eabea8 BV	404	},
d4eabea8 BV	405	};
d4eabea8	406
1beccaed	407	SR_PRIV unsigned int num_pps_profiles = ARRAY_SIZE(pps_profiles);