[libsigrok.git] / src / hardware / rdtech-dps / protocol.h

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2018 James Churchill <pelrun@gmail.com>
 * Copyright (C) 2019 Frank Stettner <frank-stettner@gmx.net>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#ifndef LIBSIGROK_HARDWARE_RDTECH_DPS_PROTOCOL_H
#define LIBSIGROK_HARDWARE_RDTECH_DPS_PROTOCOL_H

#include <stdint.h>
#include <glib.h>
#include <libsigrok/libsigrok.h>
#include "libsigrok-internal.h"

#define LOG_PREFIX "rdtech-dps"

struct rdtech_dps_model {
	unsigned int id;
	const char *name;
	unsigned int max_current;
	unsigned int max_voltage;
	unsigned int max_power;
};

struct dev_context {
	const struct rdtech_dps_model *model;
	struct sr_sw_limits limits;
	GMutex rw_mutex;
};

enum rdtech_dps_register {
	REG_USET       = 0x00, /* Mirror of 0x50 */
	REG_ISET       = 0x01, /* Mirror of 0x51 */
	REG_UOUT       = 0x02,
	REG_IOUT       = 0x03,
	REG_POWER      = 0x04,
	REG_UIN        = 0x05,
	REG_LOCK       = 0x06,
	REG_PROTECT    = 0x07,
	REG_CV_CC      = 0x08,
	REG_ENABLE     = 0x09,
	REG_BACKLIGHT  = 0x0A, /* Mirror of 0x55 */
	REG_MODEL      = 0x0B,
	REG_VERSION    = 0x0C,

	REG_PRESET     = 0x23, /* Loads a preset into preset 0. */

/*
 * Add (preset * 0x10) to each of the following, for preset 1-9.
 * Preset 0 regs below are the active output settings.
 */
	PRE_USET       = 0x50,
	PRE_ISET       = 0x51,
	PRE_OVPSET     = 0x52,
	PRE_OCPSET     = 0x53,
	PRE_OPPSET     = 0x54,
	PRE_BACKLIGHT  = 0x55,
	PRE_DISABLE    = 0x56, /* Disable output if 0 is copied here from a preset (1 is no change). */
	PRE_BOOT       = 0x57, /* Enable output at boot if 1. */
};

enum rdtech_dps_state {
	STATE_NORMAL = 0,
	STATE_OVP    = 1,
	STATE_OCP    = 2,
	STATE_OPP    = 3,
};

enum rdtech_dps_mode {
	MODE_CV      = 0,
	MODE_CC      = 1,
};

SR_PRIV int rdtech_dps_get_reg(const struct sr_dev_inst *sdi, uint16_t address, uint16_t *value);
SR_PRIV int rdtech_dps_set_reg(const struct sr_dev_inst *sdi, uint16_t address, uint16_t value);

SR_PRIV int rdtech_dps_get_model_version(struct sr_modbus_dev_inst *modbus,
		uint16_t *model, uint16_t *version);

SR_PRIV int rdtech_dps_receive_data(int fd, int revents, void *cb_data);

#endif
Commit	Line	Data
0549416e JC	1	/*
	2	* This file is part of the libsigrok project.
	3	*
	4	* Copyright (C) 2018 James Churchill <pelrun@gmail.com>
7c0891b0	5	* Copyright (C) 2019 Frank Stettner <frank-stettner@gmx.net>
0549416e JC	6	*
	7	* This program is free software: you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation, either version 3 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	19	*/
	20
	21	#ifndef LIBSIGROK_HARDWARE_RDTECH_DPS_PROTOCOL_H
	22	#define LIBSIGROK_HARDWARE_RDTECH_DPS_PROTOCOL_H
	23
	24	#include <stdint.h>
	25	#include <glib.h>
	26	#include <libsigrok/libsigrok.h>
	27	#include "libsigrok-internal.h"
	28
	29	#define LOG_PREFIX "rdtech-dps"
	30
69b05583 JC	31	struct rdtech_dps_model {
	32	unsigned int id;
	33	const char *name;
	34	unsigned int max_current;
	35	unsigned int max_voltage;
	36	unsigned int max_power;
	37	};
	38
0549416e	39	struct dev_context {
69b05583 JC	40	const struct rdtech_dps_model *model;
69b05583 JC	41	struct sr_sw_limits limits;
7c0891b0	42	GMutex rw_mutex;
69b05583 JC	43	};
	44
	45	enum rdtech_dps_register {
	46	REG_USET = 0x00, /* Mirror of 0x50 */
	47	REG_ISET = 0x01, /* Mirror of 0x51 */
	48	REG_UOUT = 0x02,
	49	REG_IOUT = 0x03,
	50	REG_POWER = 0x04,
	51	REG_UIN = 0x05,
	52	REG_LOCK = 0x06,
	53	REG_PROTECT = 0x07,
	54	REG_CV_CC = 0x08,
	55	REG_ENABLE = 0x09,
	56	REG_BACKLIGHT = 0x0A, /* Mirror of 0x55 */
	57	REG_MODEL = 0x0B,
	58	REG_VERSION = 0x0C,
	59
	60	REG_PRESET = 0x23, /* Loads a preset into preset 0. */
	61
	62	/*
	63	* Add (preset * 0x10) to each of the following, for preset 1-9.
	64	* Preset 0 regs below are the active output settings.
	65	*/
	66	PRE_USET = 0x50,
	67	PRE_ISET = 0x51,
	68	PRE_OVPSET = 0x52,
	69	PRE_OCPSET = 0x53,
	70	PRE_OPPSET = 0x54,
	71	PRE_BACKLIGHT = 0x55,
	72	PRE_DISABLE = 0x56, /* Disable output if 0 is copied here from a preset (1 is no change). */
	73	PRE_BOOT = 0x57, /* Enable output at boot if 1. */
	74	};
	75
	76	enum rdtech_dps_state {
	77	STATE_NORMAL = 0,
	78	STATE_OVP = 1,
	79	STATE_OCP = 2,
	80	STATE_OPP = 3,
0549416e JC	81	};
0549416e JC	82
69b05583 JC	83	enum rdtech_dps_mode {
	84	MODE_CV = 0,
	85	MODE_CC = 1,
	86	};
	87
7c0891b0 FS	88	SR_PRIV int rdtech_dps_get_reg(const struct sr_dev_inst sdi, uint16_t address, uint16_t value);
7c0891b0 FS	89	SR_PRIV int rdtech_dps_set_reg(const struct sr_dev_inst *sdi, uint16_t address, uint16_t value);
69b05583 JC	90
	91	SR_PRIV int rdtech_dps_get_model_version(struct sr_modbus_dev_inst *modbus,
	92	uint16_t model, uint16_t version);
	93
0549416e JC	94	SR_PRIV int rdtech_dps_receive_data(int fd, int revents, void *cb_data);
	95
	96	#endif