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4bd80e12 | 1 | /* |
2 | * This file is part of the libsigrok project. | |
3 | * | |
4 | * Copyright (C) 2013 Bert Vermeulen <bert@biot.com> | |
5 | * | |
6 | * This program is free software: you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation, either version 3 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
6ec6c43b | 20 | #include <config.h> |
4bd80e12 | 21 | #include "protocol.h" |
22 | ||
f254bc4b | 23 | static const uint32_t devopts[] = { |
4bd80e12 | 24 | SR_CONF_LOGIC_ANALYZER, |
5827f61b BV |
25 | SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
26 | SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
27 | SR_CONF_TRIGGER_MATCH | SR_CONF_LIST, | |
28 | SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET, | |
29 | SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
30 | SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET, | |
31 | SR_CONF_SWAP | SR_CONF_SET, | |
32 | SR_CONF_RLE | SR_CONF_GET | SR_CONF_SET, | |
4bd80e12 | 33 | }; |
34 | ||
acc885c7 BV |
35 | static const int32_t trigger_matches[] = { |
36 | SR_TRIGGER_ZERO, | |
37 | SR_TRIGGER_ONE, | |
38 | SR_TRIGGER_RISING, | |
39 | SR_TRIGGER_FALLING, | |
40 | }; | |
41 | ||
4bd80e12 | 42 | #define STR_PATTERN_NONE "None" |
43 | #define STR_PATTERN_EXTERNAL "External" | |
44 | #define STR_PATTERN_INTERNAL "Internal" | |
45 | ||
46 | /* Supported methods of test pattern outputs */ | |
47 | enum { | |
48 | /** | |
49 | * Capture pins 31:16 (unbuffered wing) output a test pattern | |
50 | * that can captured on pins 0:15. | |
51 | */ | |
52 | PATTERN_EXTERNAL, | |
53 | ||
54 | /** Route test pattern internally to capture buffer. */ | |
55 | PATTERN_INTERNAL, | |
56 | }; | |
57 | ||
58 | static const char *patterns[] = { | |
59 | STR_PATTERN_NONE, | |
60 | STR_PATTERN_EXTERNAL, | |
61 | STR_PATTERN_INTERNAL, | |
62 | }; | |
63 | ||
64 | /* Channels are numbered 0-31 (on the PCB silkscreen). */ | |
53cda65a | 65 | SR_PRIV const char *p_ols_channel_names[] = { |
4bd80e12 | 66 | "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12", |
67 | "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23", | |
68 | "24", "25", "26", "27", "28", "29", "30", "31", | |
4bd80e12 | 69 | }; |
70 | ||
71 | /* Default supported samplerates, can be overridden by device metadata. */ | |
72 | static const uint64_t samplerates[] = { | |
73 | SR_HZ(10), | |
74 | SR_MHZ(200), | |
75 | SR_HZ(1), | |
76 | }; | |
77 | ||
4f840ce9 | 78 | static GSList *scan(struct sr_dev_driver *di, GSList *options) |
4bd80e12 | 79 | { |
80 | struct sr_dev_inst *sdi; | |
81 | struct drv_context *drvc; | |
82 | struct dev_context *devc; | |
83 | GSList *devices; | |
84 | int ret, i; | |
85 | char buf[70]; | |
86 | int bytes_read; | |
87 | ||
88 | (void)options; | |
89 | ||
41812aca | 90 | drvc = di->context; |
4bd80e12 | 91 | |
92 | devices = NULL; | |
93 | ||
94 | /* Allocate memory for our private device context. */ | |
f57d8ffe | 95 | devc = g_malloc0(sizeof(struct dev_context)); |
4bd80e12 | 96 | |
97 | /* Device-specific settings */ | |
b94cff40 | 98 | devc->max_samplebytes = devc->max_samplerate = devc->protocol_version = 0; |
4bd80e12 | 99 | |
100 | /* Acquisition settings */ | |
101 | devc->limit_samples = devc->capture_ratio = 0; | |
102 | devc->trigger_at = -1; | |
103 | devc->channel_mask = 0xffffffff; | |
104 | devc->flag_reg = 0; | |
105 | ||
106 | /* Allocate memory for the incoming ftdi data. */ | |
a95f142e | 107 | devc->ftdi_buf = g_malloc0(FTDI_BUF_SIZE); |
4bd80e12 | 108 | |
109 | /* Allocate memory for the FTDI context (ftdic) and initialize it. */ | |
110 | if (!(devc->ftdic = ftdi_new())) { | |
111 | sr_err("Failed to initialize libftdi."); | |
112 | goto err_free_ftdi_buf;; | |
113 | } | |
114 | ||
115 | /* Try to open the FTDI device */ | |
116 | if (p_ols_open(devc) != SR_OK) { | |
117 | goto err_free_ftdic; | |
118 | } | |
119 | ||
120 | /* The discovery procedure is like this: first send the Reset | |
121 | * command (0x00) 5 times, since the device could be anywhere | |
122 | * in a 5-byte command. Then send the ID command (0x02). | |
123 | * If the device responds with 4 bytes ("OLS1" or "SLA1"), we | |
124 | * have a match. | |
125 | */ | |
126 | ||
127 | ret = SR_OK; | |
128 | for (i = 0; i < 5; i++) { | |
129 | if ((ret = write_shortcommand(devc, CMD_RESET)) != SR_OK) { | |
130 | break; | |
131 | } | |
132 | } | |
133 | if (ret != SR_OK) { | |
134 | sr_err("Could not reset device. Quitting."); | |
135 | goto err_close_ftdic; | |
136 | } | |
137 | write_shortcommand(devc, CMD_ID); | |
138 | ||
139 | /* Read the response data. */ | |
140 | bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 4); | |
141 | if (bytes_read < 0) { | |
142 | sr_err("Failed to read FTDI data (%d): %s.", | |
143 | bytes_read, ftdi_get_error_string(devc->ftdic)); | |
144 | goto err_close_ftdic; | |
145 | } | |
146 | if (bytes_read == 0) { | |
147 | goto err_close_ftdic; | |
148 | } | |
149 | ||
150 | if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4)) | |
151 | goto err_close_ftdic; | |
152 | ||
153 | /* Definitely using the OLS protocol, check if it supports | |
154 | * the metadata command. | |
155 | */ | |
156 | write_shortcommand(devc, CMD_METADATA); | |
157 | ||
158 | /* Read the metadata. */ | |
159 | bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 64); | |
160 | if (bytes_read < 0) { | |
161 | sr_err("Failed to read FTDI data (%d): %s.", | |
162 | bytes_read, ftdi_get_error_string(devc->ftdic)); | |
163 | goto err_close_ftdic; | |
164 | } | |
165 | if (bytes_read == 0) { | |
166 | goto err_close_ftdic; | |
167 | } | |
168 | ||
169 | /* Close device. We'll reopen it again when we need it. */ | |
170 | p_ols_close(devc); | |
171 | ||
172 | /* Parse the metadata. */ | |
173 | sdi = p_ols_get_metadata((uint8_t *)buf, bytes_read, devc); | |
4bd80e12 | 174 | |
175 | /* Configure samplerate and divider. */ | |
176 | if (p_ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK) | |
177 | sr_dbg("Failed to set default samplerate (%"PRIu64").", | |
178 | DEFAULT_SAMPLERATE); | |
4bd80e12 | 179 | |
180 | drvc->instances = g_slist_append(drvc->instances, sdi); | |
181 | devices = g_slist_append(devices, sdi); | |
182 | ||
183 | return devices; | |
184 | ||
185 | err_close_ftdic: | |
186 | p_ols_close(devc); | |
187 | err_free_ftdic: | |
188 | ftdi_free(devc->ftdic); /* NOT free() or g_free()! */ | |
189 | err_free_ftdi_buf: | |
190 | g_free(devc->ftdi_buf); | |
4bd80e12 | 191 | g_free(devc); |
4bd80e12 | 192 | |
193 | return NULL; | |
194 | } | |
195 | ||
4bd80e12 | 196 | static void clear_helper(void *priv) |
197 | { | |
198 | struct dev_context *devc; | |
199 | ||
200 | devc = priv; | |
201 | ||
202 | ftdi_free(devc->ftdic); | |
203 | g_free(devc->ftdi_buf); | |
204 | } | |
205 | ||
4f840ce9 | 206 | static int dev_clear(const struct sr_dev_driver *di) |
4bd80e12 | 207 | { |
208 | return std_dev_clear(di, clear_helper); | |
209 | } | |
210 | ||
584560f1 | 211 | static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi, |
4bd80e12 | 212 | const struct sr_channel_group *cg) |
213 | { | |
214 | struct dev_context *devc; | |
215 | ||
216 | (void)cg; | |
217 | ||
218 | if (!sdi) | |
219 | return SR_ERR_ARG; | |
220 | ||
221 | devc = sdi->priv; | |
584560f1 | 222 | switch (key) { |
4bd80e12 | 223 | case SR_CONF_SAMPLERATE: |
224 | *data = g_variant_new_uint64(devc->cur_samplerate); | |
225 | break; | |
226 | case SR_CONF_CAPTURE_RATIO: | |
227 | *data = g_variant_new_uint64(devc->capture_ratio); | |
228 | break; | |
229 | case SR_CONF_LIMIT_SAMPLES: | |
230 | *data = g_variant_new_uint64(devc->limit_samples); | |
231 | break; | |
232 | case SR_CONF_PATTERN_MODE: | |
233 | if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE) | |
234 | *data = g_variant_new_string(STR_PATTERN_EXTERNAL); | |
235 | else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE) | |
236 | *data = g_variant_new_string(STR_PATTERN_INTERNAL); | |
237 | else | |
238 | *data = g_variant_new_string(STR_PATTERN_NONE); | |
239 | break; | |
240 | case SR_CONF_RLE: | |
241 | *data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE); | |
242 | break; | |
243 | case SR_CONF_EXTERNAL_CLOCK: | |
244 | *data = g_variant_new_boolean(devc->flag_reg & FLAG_CLOCK_EXTERNAL ? TRUE : FALSE); | |
245 | break; | |
246 | default: | |
247 | return SR_ERR_NA; | |
248 | } | |
249 | ||
250 | return SR_OK; | |
251 | } | |
252 | ||
584560f1 | 253 | static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi, |
4bd80e12 | 254 | const struct sr_channel_group *cg) |
255 | { | |
256 | struct dev_context *devc; | |
257 | uint16_t flag; | |
258 | uint64_t tmp_u64; | |
259 | int ret; | |
260 | const char *stropt; | |
261 | ||
262 | (void)cg; | |
263 | ||
264 | if (sdi->status != SR_ST_ACTIVE) | |
265 | return SR_ERR_DEV_CLOSED; | |
266 | ||
267 | devc = sdi->priv; | |
268 | ||
584560f1 | 269 | switch (key) { |
4bd80e12 | 270 | case SR_CONF_SAMPLERATE: |
271 | tmp_u64 = g_variant_get_uint64(data); | |
272 | if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1]) | |
273 | return SR_ERR_SAMPLERATE; | |
274 | ret = p_ols_set_samplerate(sdi, g_variant_get_uint64(data)); | |
275 | break; | |
276 | case SR_CONF_LIMIT_SAMPLES: | |
277 | tmp_u64 = g_variant_get_uint64(data); | |
278 | if (tmp_u64 < MIN_NUM_SAMPLES) | |
279 | return SR_ERR; | |
280 | devc->limit_samples = tmp_u64; | |
281 | ret = SR_OK; | |
282 | break; | |
283 | case SR_CONF_CAPTURE_RATIO: | |
284 | devc->capture_ratio = g_variant_get_uint64(data); | |
a5c38703 | 285 | if (devc->capture_ratio < 0 || devc->capture_ratio > 100) |
4bd80e12 | 286 | ret = SR_ERR; |
a5c38703 | 287 | else |
4bd80e12 | 288 | ret = SR_OK; |
289 | break; | |
290 | case SR_CONF_EXTERNAL_CLOCK: | |
291 | if (g_variant_get_boolean(data)) { | |
292 | sr_info("Enabling external clock."); | |
293 | devc->flag_reg |= FLAG_CLOCK_EXTERNAL; | |
294 | } else { | |
295 | sr_info("Disabled external clock."); | |
296 | devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL; | |
297 | } | |
298 | ret = SR_OK; | |
299 | break; | |
300 | case SR_CONF_PATTERN_MODE: | |
301 | stropt = g_variant_get_string(data, NULL); | |
302 | ret = SR_OK; | |
303 | flag = 0xffff; | |
304 | if (!strcmp(stropt, STR_PATTERN_NONE)) { | |
305 | sr_info("Disabling test modes."); | |
306 | flag = 0x0000; | |
307 | }else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) { | |
308 | sr_info("Enabling internal test mode."); | |
309 | flag = FLAG_INTERNAL_TEST_MODE; | |
310 | } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) { | |
311 | sr_info("Enabling external test mode."); | |
312 | flag = FLAG_EXTERNAL_TEST_MODE; | |
313 | } else { | |
314 | ret = SR_ERR; | |
315 | } | |
316 | if (flag != 0xffff) { | |
317 | devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE); | |
318 | devc->flag_reg |= flag; | |
319 | } | |
320 | break; | |
321 | case SR_CONF_SWAP: | |
322 | if (g_variant_get_boolean(data)) { | |
323 | sr_info("Enabling channel swapping."); | |
324 | devc->flag_reg |= FLAG_SWAP_CHANNELS; | |
325 | } else { | |
326 | sr_info("Disabling channel swapping."); | |
327 | devc->flag_reg &= ~FLAG_SWAP_CHANNELS; | |
328 | } | |
329 | ret = SR_OK; | |
330 | break; | |
331 | ||
332 | case SR_CONF_RLE: | |
333 | if (g_variant_get_boolean(data)) { | |
334 | sr_info("Enabling RLE."); | |
335 | devc->flag_reg |= FLAG_RLE; | |
336 | } else { | |
337 | sr_info("Disabling RLE."); | |
338 | devc->flag_reg &= ~FLAG_RLE; | |
339 | } | |
340 | ret = SR_OK; | |
341 | break; | |
342 | default: | |
343 | ret = SR_ERR_NA; | |
344 | } | |
345 | ||
346 | return ret; | |
347 | } | |
348 | ||
584560f1 | 349 | static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi, |
4bd80e12 | 350 | const struct sr_channel_group *cg) |
351 | { | |
352 | struct dev_context *devc; | |
353 | GVariant *gvar, *grange[2]; | |
354 | GVariantBuilder gvb; | |
acc885c7 | 355 | int num_pols_changrp, i; |
4bd80e12 | 356 | |
357 | (void)cg; | |
358 | ||
359 | switch (key) { | |
360 | case SR_CONF_DEVICE_OPTIONS: | |
584560f1 | 361 | *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32, |
f254bc4b | 362 | devopts, ARRAY_SIZE(devopts), sizeof(uint32_t)); |
4bd80e12 | 363 | break; |
364 | case SR_CONF_SAMPLERATE: | |
365 | g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}")); | |
366 | gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates, | |
367 | ARRAY_SIZE(samplerates), sizeof(uint64_t)); | |
368 | g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar); | |
369 | *data = g_variant_builder_end(&gvb); | |
370 | break; | |
acc885c7 BV |
371 | case SR_CONF_TRIGGER_MATCH: |
372 | *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32, | |
373 | trigger_matches, ARRAY_SIZE(trigger_matches), | |
374 | sizeof(int32_t)); | |
4bd80e12 | 375 | break; |
376 | case SR_CONF_PATTERN_MODE: | |
377 | *data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns)); | |
378 | break; | |
379 | case SR_CONF_LIMIT_SAMPLES: | |
380 | if (!sdi) | |
381 | return SR_ERR_ARG; | |
382 | devc = sdi->priv; | |
383 | if (devc->flag_reg & FLAG_RLE) | |
384 | return SR_ERR_NA; | |
b94cff40 | 385 | if (devc->max_samplebytes == 0) |
4bd80e12 | 386 | /* Device didn't specify sample memory size in metadata. */ |
387 | return SR_ERR_NA; | |
388 | /* | |
389 | * Channel groups are turned off if no channels in that group are | |
390 | * enabled, making more room for samples for the enabled group. | |
391 | */ | |
acc885c7 BV |
392 | pols_channel_mask(sdi); |
393 | num_pols_changrp = 0; | |
4bd80e12 | 394 | for (i = 0; i < 4; i++) { |
395 | if (devc->channel_mask & (0xff << (i * 8))) | |
acc885c7 | 396 | num_pols_changrp++; |
4bd80e12 | 397 | } |
b94cff40 | 398 | /* 3 channel groups takes as many bytes as 4 channel groups */ |
acc885c7 BV |
399 | if (num_pols_changrp == 3) |
400 | num_pols_changrp = 4; | |
4bd80e12 | 401 | grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES); |
acc885c7 BV |
402 | if (num_pols_changrp) |
403 | grange[1] = g_variant_new_uint64(devc->max_samplebytes / num_pols_changrp); | |
404 | else | |
405 | grange[1] = g_variant_new_uint64(MIN_NUM_SAMPLES); | |
4bd80e12 | 406 | *data = g_variant_new_tuple(grange, 2); |
407 | break; | |
408 | default: | |
409 | return SR_ERR_NA; | |
410 | } | |
411 | ||
412 | return SR_OK; | |
413 | } | |
414 | ||
415 | static int dev_open(struct sr_dev_inst *sdi) | |
416 | { | |
417 | struct dev_context *devc; | |
4bd80e12 | 418 | |
419 | devc = sdi->priv; | |
420 | ||
421 | if (p_ols_open(devc) != SR_OK) { | |
422 | return SR_ERR; | |
423 | } else { | |
dcd438ee | 424 | sdi->status = SR_ST_ACTIVE; |
4bd80e12 | 425 | return SR_OK; |
426 | } | |
427 | } | |
428 | ||
429 | static int dev_close(struct sr_dev_inst *sdi) | |
430 | { | |
431 | int ret; | |
432 | struct dev_context *devc; | |
433 | ||
434 | ret = SR_OK; | |
435 | devc = sdi->priv; | |
436 | ||
437 | if (sdi->status == SR_ST_ACTIVE) { | |
438 | sr_dbg("Status ACTIVE, closing device."); | |
439 | ret = p_ols_close(devc); | |
440 | } else { | |
441 | sr_spew("Status not ACTIVE, nothing to do."); | |
442 | } | |
443 | ||
444 | sdi->status = SR_ST_INACTIVE; | |
445 | ||
446 | return ret; | |
447 | } | |
448 | ||
4bd80e12 | 449 | static int set_trigger(const struct sr_dev_inst *sdi, int stage) |
450 | { | |
451 | struct dev_context *devc; | |
452 | uint8_t cmd, arg[4]; | |
453 | ||
454 | devc = sdi->priv; | |
455 | ||
456 | cmd = CMD_SET_TRIGGER_MASK + stage * 4; | |
457 | arg[0] = devc->trigger_mask[stage] & 0xff; | |
458 | arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff; | |
459 | arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff; | |
460 | arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff; | |
461 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
462 | return SR_ERR; | |
463 | ||
464 | cmd = CMD_SET_TRIGGER_VALUE + stage * 4; | |
465 | arg[0] = devc->trigger_value[stage] & 0xff; | |
466 | arg[1] = (devc->trigger_value[stage] >> 8) & 0xff; | |
467 | arg[2] = (devc->trigger_value[stage] >> 16) & 0xff; | |
468 | arg[3] = (devc->trigger_value[stage] >> 24) & 0xff; | |
469 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
470 | return SR_ERR; | |
471 | ||
472 | cmd = CMD_SET_TRIGGER_CONFIG + stage * 4; | |
473 | arg[0] = arg[1] = arg[3] = 0x00; | |
474 | arg[2] = stage; | |
475 | if (stage == devc->num_stages) | |
476 | /* Last stage, fire when this one matches. */ | |
477 | arg[3] |= TRIGGER_START; | |
478 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
479 | return SR_ERR; | |
480 | ||
1e0de846 | 481 | cmd = CMD_SET_TRIGGER_EDGE + stage * 4; |
482 | arg[0] = devc->trigger_edge[stage] & 0xff; | |
483 | arg[1] = (devc->trigger_edge[stage] >> 8) & 0xff; | |
484 | arg[2] = (devc->trigger_edge[stage] >> 16) & 0xff; | |
485 | arg[3] = (devc->trigger_edge[stage] >> 24) & 0xff; | |
486 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
487 | return SR_ERR; | |
488 | ||
4bd80e12 | 489 | return SR_OK; |
490 | } | |
491 | ||
84cbaf77 BV |
492 | static int disable_trigger(const struct sr_dev_inst *sdi, int stage) |
493 | { | |
494 | struct dev_context *devc; | |
495 | uint8_t cmd, arg[4]; | |
496 | ||
497 | devc = sdi->priv; | |
498 | ||
499 | cmd = CMD_SET_TRIGGER_MASK + stage * 4; | |
500 | arg[0] = arg[1] = arg[2] = arg[3] = 0x00; | |
501 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
502 | return SR_ERR; | |
503 | ||
504 | cmd = CMD_SET_TRIGGER_VALUE + stage * 4; | |
505 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
506 | return SR_ERR; | |
507 | ||
508 | cmd = CMD_SET_TRIGGER_CONFIG + stage * 4; | |
509 | arg[2] = 0x03; | |
510 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
511 | return SR_ERR; | |
512 | ||
513 | cmd = CMD_SET_TRIGGER_EDGE + stage * 4; | |
514 | arg[2] = 0x00; | |
515 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
516 | return SR_ERR; | |
517 | ||
518 | return SR_OK; | |
519 | } | |
520 | ||
695dc859 | 521 | static int dev_acquisition_start(const struct sr_dev_inst *sdi) |
4bd80e12 | 522 | { |
523 | struct dev_context *devc; | |
524 | uint32_t samplecount, readcount, delaycount; | |
acc885c7 | 525 | uint8_t pols_changrp_mask, arg[4]; |
b94cff40 | 526 | uint16_t flag_tmp; |
acc885c7 | 527 | int num_pols_changrp, samplespercount; |
4bd80e12 | 528 | int ret, i; |
529 | ||
530 | if (sdi->status != SR_ST_ACTIVE) | |
531 | return SR_ERR_DEV_CLOSED; | |
532 | ||
533 | devc = sdi->priv; | |
534 | ||
acc885c7 | 535 | pols_channel_mask(sdi); |
4bd80e12 | 536 | |
537 | /* | |
538 | * Enable/disable channel groups in the flag register according to the | |
acc885c7 BV |
539 | * channel mask. Calculate this here, because num_pols_changrp is |
540 | * needed to limit readcount. | |
4bd80e12 | 541 | */ |
acc885c7 BV |
542 | pols_changrp_mask = 0; |
543 | num_pols_changrp = 0; | |
4bd80e12 | 544 | for (i = 0; i < 4; i++) { |
545 | if (devc->channel_mask & (0xff << (i * 8))) { | |
acc885c7 BV |
546 | pols_changrp_mask |= (1 << i); |
547 | num_pols_changrp++; | |
4bd80e12 | 548 | } |
549 | } | |
b94cff40 | 550 | /* 3 channel groups takes as many bytes as 4 channel groups */ |
acc885c7 BV |
551 | if (num_pols_changrp == 3) |
552 | num_pols_changrp = 4; | |
b94cff40 | 553 | /* maximum number of samples (or RLE counts) the buffer memory can hold */ |
acc885c7 | 554 | devc->max_samples = devc->max_samplebytes / num_pols_changrp; |
4bd80e12 | 555 | |
556 | /* | |
557 | * Limit readcount to prevent reading past the end of the hardware | |
558 | * buffer. | |
559 | */ | |
560 | sr_dbg("max_samples = %d", devc->max_samples); | |
6433156c | 561 | sr_dbg("limit_samples = %" PRIu64, devc->limit_samples); |
b94cff40 | 562 | samplecount = MIN(devc->max_samples, devc->limit_samples); |
4bd80e12 | 563 | sr_dbg("Samplecount = %d", samplecount); |
564 | ||
b94cff40 | 565 | /* In demux mode the OLS is processing two samples per clock */ |
566 | if (devc->flag_reg & FLAG_DEMUX) { | |
567 | samplespercount = 8; | |
568 | } | |
569 | else { | |
570 | samplespercount = 4; | |
571 | } | |
572 | ||
573 | readcount = samplecount / samplespercount; | |
574 | ||
4bd80e12 | 575 | /* Rather read too many samples than too few. */ |
b94cff40 | 576 | if (samplecount % samplespercount != 0) |
4bd80e12 | 577 | readcount++; |
578 | ||
579 | /* Basic triggers. */ | |
acc885c7 BV |
580 | if (pols_convert_trigger(sdi) != SR_OK) { |
581 | sr_err("Failed to configure channels."); | |
582 | return SR_ERR; | |
583 | } | |
84cbaf77 | 584 | |
acc885c7 | 585 | if (devc->num_stages > 0) { |
4bd80e12 | 586 | delaycount = readcount * (1 - devc->capture_ratio / 100.0); |
b94cff40 | 587 | devc->trigger_at = (readcount - delaycount) * samplespercount - devc->num_stages; |
84cbaf77 BV |
588 | for (i = 0; i < NUM_TRIGGER_STAGES; i++) { |
589 | if (i <= devc->num_stages) { | |
590 | sr_dbg("Setting p-ols stage %d trigger.", i); | |
591 | if ((ret = set_trigger(sdi, i)) != SR_OK) | |
592 | return ret; | |
593 | } | |
594 | else { | |
595 | sr_dbg("Disabling p-ols stage %d trigger.", i); | |
596 | if ((ret = disable_trigger(sdi, i)) != SR_OK) | |
597 | return ret; | |
598 | } | |
4bd80e12 | 599 | } |
600 | } else { | |
601 | /* No triggers configured, force trigger on first stage. */ | |
602 | sr_dbg("Forcing trigger at stage 0."); | |
603 | if ((ret = set_trigger(sdi, 0)) != SR_OK) | |
604 | return ret; | |
605 | delaycount = readcount; | |
606 | } | |
607 | ||
608 | /* Samplerate. */ | |
609 | sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)", | |
610 | devc->cur_samplerate, devc->cur_samplerate_divider); | |
611 | arg[0] = devc->cur_samplerate_divider & 0xff; | |
612 | arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8; | |
613 | arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16; | |
614 | arg[3] = 0x00; | |
615 | if (write_longcommand(devc, CMD_SET_DIVIDER, arg) != SR_OK) | |
616 | return SR_ERR; | |
acc885c7 | 617 | |
4bd80e12 | 618 | /* Send extended sample limit and pre/post-trigger capture ratio. */ |
619 | arg[0] = ((readcount - 1) & 0xff); | |
620 | arg[1] = ((readcount - 1) & 0xff00) >> 8; | |
621 | arg[2] = ((readcount - 1) & 0xff0000) >> 16; | |
622 | arg[3] = ((readcount - 1) & 0xff000000) >> 24; | |
1e0de846 | 623 | if (write_longcommand(devc, CMD_CAPTURE_DELAY, arg) != SR_OK) |
4bd80e12 | 624 | return SR_ERR; |
625 | arg[0] = ((delaycount - 1) & 0xff); | |
626 | arg[1] = ((delaycount - 1) & 0xff00) >> 8; | |
627 | arg[2] = ((delaycount - 1) & 0xff0000) >> 16; | |
628 | arg[3] = ((delaycount - 1) & 0xff000000) >> 24; | |
1e0de846 | 629 | if (write_longcommand(devc, CMD_CAPTURE_COUNT, arg) != SR_OK) |
4bd80e12 | 630 | return SR_ERR; |
acc885c7 | 631 | |
4bd80e12 | 632 | /* Flag register. */ |
633 | sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s", | |
634 | devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off", | |
635 | devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off", | |
636 | devc->flag_reg & FLAG_RLE ? "on" : "off", | |
637 | devc->flag_reg & FLAG_FILTER ? "on": "off", | |
638 | devc->flag_reg & FLAG_DEMUX ? "on" : "off"); | |
639 | ||
b94cff40 | 640 | /* |
641 | * Enable/disable OLS channel groups in the flag register according | |
642 | * to the channel mask. 1 means "disable channel". | |
643 | */ | |
644 | devc->flag_reg &= ~0x3c; | |
acc885c7 | 645 | devc->flag_reg |= ~(pols_changrp_mask << 2) & 0x3c; |
b94cff40 | 646 | sr_dbg("flag_reg = %x", devc->flag_reg); |
647 | ||
648 | /* | |
649 | * In demux mode the OLS is processing two 8-bit or 16-bit samples | |
650 | * in parallel and for this to work the lower two bits of the four | |
651 | * "channel_disable" bits must be replicated to the upper two bits. | |
652 | */ | |
653 | flag_tmp = devc->flag_reg; | |
654 | if (devc->flag_reg & FLAG_DEMUX) { | |
655 | flag_tmp &= ~0x30; | |
acc885c7 | 656 | flag_tmp |= ~(pols_changrp_mask << 4) & 0x30; |
b94cff40 | 657 | } |
658 | arg[0] = flag_tmp & 0xff; | |
659 | arg[1] = flag_tmp >> 8; | |
4bd80e12 | 660 | arg[2] = arg[3] = 0x00; |
661 | if (write_longcommand(devc, CMD_SET_FLAGS, arg) != SR_OK) | |
662 | return SR_ERR; | |
663 | ||
664 | /* Start acquisition on the device. */ | |
665 | if (write_shortcommand(devc, CMD_RUN) != SR_OK) | |
666 | return SR_ERR; | |
667 | ||
668 | /* Reset all operational states. */ | |
669 | devc->rle_count = devc->num_transfers = 0; | |
670 | devc->num_samples = devc->num_bytes = 0; | |
671 | devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0; | |
672 | memset(devc->sample, 0, 4); | |
673 | ||
695dc859 | 674 | std_session_send_df_header(sdi, LOG_PREFIX); |
4bd80e12 | 675 | |
676 | /* Hook up a dummy handler to receive data from the device. */ | |
c650d3ec | 677 | sr_session_source_add(sdi->session, -1, 0, 10, p_ols_receive_data, |
695dc859 | 678 | (struct sr_dev_inst *)sdi); |
4bd80e12 | 679 | |
680 | return SR_OK; | |
681 | } | |
682 | ||
695dc859 | 683 | static int dev_acquisition_stop(struct sr_dev_inst *sdi) |
4bd80e12 | 684 | { |
685 | struct dev_context *devc; | |
4bd80e12 | 686 | |
687 | devc = sdi->priv; | |
688 | ||
689 | sr_dbg("Stopping acquisition."); | |
690 | write_shortcommand(devc, CMD_RESET); | |
691 | write_shortcommand(devc, CMD_RESET); | |
692 | write_shortcommand(devc, CMD_RESET); | |
693 | write_shortcommand(devc, CMD_RESET); | |
694 | write_shortcommand(devc, CMD_RESET); | |
695 | ||
dd7a4a71 | 696 | sr_session_source_remove(sdi->session, -1); |
4bd80e12 | 697 | |
695dc859 | 698 | std_session_send_df_end(sdi, LOG_PREFIX); |
4bd80e12 | 699 | |
700 | return SR_OK; | |
701 | } | |
702 | ||
703 | SR_PRIV struct sr_dev_driver p_ols_driver_info = { | |
acc885c7 | 704 | .name = "p-ols", |
4bd80e12 | 705 | .longname = "Pipistrello OLS", |
706 | .api_version = 1, | |
c2fdcc25 | 707 | .init = std_init, |
700d6b64 | 708 | .cleanup = std_cleanup, |
4bd80e12 | 709 | .scan = scan, |
c01bf34c | 710 | .dev_list = std_dev_list, |
4bd80e12 | 711 | .dev_clear = dev_clear, |
712 | .config_get = config_get, | |
713 | .config_set = config_set, | |
714 | .config_list = config_list, | |
715 | .dev_open = dev_open, | |
716 | .dev_close = dev_close, | |
717 | .dev_acquisition_start = dev_acquisition_start, | |
718 | .dev_acquisition_stop = dev_acquisition_stop, | |
41812aca | 719 | .context = NULL, |
4bd80e12 | 720 | }; |
dd5c48a6 | 721 | SR_REGISTER_DEV_DRIVER(p_ols_driver_info); |