]> sigrok.org Git - libsigrok.git/blame - src/hardware/pipistrello-ols/api.c
Fix #442 by renaming sr_dev_driver.priv to .context
[libsigrok.git] / src / hardware / pipistrello-ols / api.c
CommitLineData
4bd80e12 1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "protocol.h"
21
f254bc4b 22static const uint32_t devopts[] = {
4bd80e12 23 SR_CONF_LOGIC_ANALYZER,
5827f61b
BV
24 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
25 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
26 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
27 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
28 SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
29 SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET,
30 SR_CONF_SWAP | SR_CONF_SET,
31 SR_CONF_RLE | SR_CONF_GET | SR_CONF_SET,
4bd80e12 32};
33
acc885c7
BV
34static const int32_t trigger_matches[] = {
35 SR_TRIGGER_ZERO,
36 SR_TRIGGER_ONE,
37 SR_TRIGGER_RISING,
38 SR_TRIGGER_FALLING,
39};
40
4bd80e12 41#define STR_PATTERN_NONE "None"
42#define STR_PATTERN_EXTERNAL "External"
43#define STR_PATTERN_INTERNAL "Internal"
44
45/* Supported methods of test pattern outputs */
46enum {
47 /**
48 * Capture pins 31:16 (unbuffered wing) output a test pattern
49 * that can captured on pins 0:15.
50 */
51 PATTERN_EXTERNAL,
52
53 /** Route test pattern internally to capture buffer. */
54 PATTERN_INTERNAL,
55};
56
57static const char *patterns[] = {
58 STR_PATTERN_NONE,
59 STR_PATTERN_EXTERNAL,
60 STR_PATTERN_INTERNAL,
61};
62
63/* Channels are numbered 0-31 (on the PCB silkscreen). */
53cda65a 64SR_PRIV const char *p_ols_channel_names[] = {
4bd80e12 65 "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
66 "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
67 "24", "25", "26", "27", "28", "29", "30", "31",
4bd80e12 68};
69
70/* Default supported samplerates, can be overridden by device metadata. */
71static const uint64_t samplerates[] = {
72 SR_HZ(10),
73 SR_MHZ(200),
74 SR_HZ(1),
75};
76
77SR_PRIV struct sr_dev_driver p_ols_driver_info;
4bd80e12 78
4f840ce9 79static int init(struct sr_dev_driver *di, struct sr_context *sr_ctx)
4bd80e12 80{
81 return std_init(sr_ctx, di, LOG_PREFIX);
82}
83
4f840ce9 84static GSList *scan(struct sr_dev_driver *di, GSList *options)
4bd80e12 85{
86 struct sr_dev_inst *sdi;
87 struct drv_context *drvc;
88 struct dev_context *devc;
89 GSList *devices;
90 int ret, i;
91 char buf[70];
92 int bytes_read;
93
94 (void)options;
95
41812aca 96 drvc = di->context;
4bd80e12 97
98 devices = NULL;
99
100 /* Allocate memory for our private device context. */
f57d8ffe 101 devc = g_malloc0(sizeof(struct dev_context));
4bd80e12 102
103 /* Device-specific settings */
b94cff40 104 devc->max_samplebytes = devc->max_samplerate = devc->protocol_version = 0;
4bd80e12 105
106 /* Acquisition settings */
107 devc->limit_samples = devc->capture_ratio = 0;
108 devc->trigger_at = -1;
109 devc->channel_mask = 0xffffffff;
110 devc->flag_reg = 0;
111
112 /* Allocate memory for the incoming ftdi data. */
a95f142e 113 devc->ftdi_buf = g_malloc0(FTDI_BUF_SIZE);
4bd80e12 114
115 /* Allocate memory for the FTDI context (ftdic) and initialize it. */
116 if (!(devc->ftdic = ftdi_new())) {
117 sr_err("Failed to initialize libftdi.");
118 goto err_free_ftdi_buf;;
119 }
120
121 /* Try to open the FTDI device */
122 if (p_ols_open(devc) != SR_OK) {
123 goto err_free_ftdic;
124 }
125
126 /* The discovery procedure is like this: first send the Reset
127 * command (0x00) 5 times, since the device could be anywhere
128 * in a 5-byte command. Then send the ID command (0x02).
129 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
130 * have a match.
131 */
132
133 ret = SR_OK;
134 for (i = 0; i < 5; i++) {
135 if ((ret = write_shortcommand(devc, CMD_RESET)) != SR_OK) {
136 break;
137 }
138 }
139 if (ret != SR_OK) {
140 sr_err("Could not reset device. Quitting.");
141 goto err_close_ftdic;
142 }
143 write_shortcommand(devc, CMD_ID);
144
145 /* Read the response data. */
146 bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 4);
147 if (bytes_read < 0) {
148 sr_err("Failed to read FTDI data (%d): %s.",
149 bytes_read, ftdi_get_error_string(devc->ftdic));
150 goto err_close_ftdic;
151 }
152 if (bytes_read == 0) {
153 goto err_close_ftdic;
154 }
155
156 if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
157 goto err_close_ftdic;
158
159 /* Definitely using the OLS protocol, check if it supports
160 * the metadata command.
161 */
162 write_shortcommand(devc, CMD_METADATA);
163
164 /* Read the metadata. */
165 bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 64);
166 if (bytes_read < 0) {
167 sr_err("Failed to read FTDI data (%d): %s.",
168 bytes_read, ftdi_get_error_string(devc->ftdic));
169 goto err_close_ftdic;
170 }
171 if (bytes_read == 0) {
172 goto err_close_ftdic;
173 }
174
175 /* Close device. We'll reopen it again when we need it. */
176 p_ols_close(devc);
177
178 /* Parse the metadata. */
179 sdi = p_ols_get_metadata((uint8_t *)buf, bytes_read, devc);
4bd80e12 180
181 /* Configure samplerate and divider. */
182 if (p_ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
183 sr_dbg("Failed to set default samplerate (%"PRIu64").",
184 DEFAULT_SAMPLERATE);
4bd80e12 185
186 drvc->instances = g_slist_append(drvc->instances, sdi);
187 devices = g_slist_append(devices, sdi);
188
189 return devices;
190
191err_close_ftdic:
192 p_ols_close(devc);
193err_free_ftdic:
194 ftdi_free(devc->ftdic); /* NOT free() or g_free()! */
195err_free_ftdi_buf:
196 g_free(devc->ftdi_buf);
4bd80e12 197 g_free(devc);
4bd80e12 198
199 return NULL;
200}
201
4f840ce9 202static GSList *dev_list(const struct sr_dev_driver *di)
4bd80e12 203{
41812aca 204 return ((struct drv_context *)(di->context))->instances;
4bd80e12 205}
206
207static void clear_helper(void *priv)
208{
209 struct dev_context *devc;
210
211 devc = priv;
212
213 ftdi_free(devc->ftdic);
214 g_free(devc->ftdi_buf);
215}
216
4f840ce9 217static int dev_clear(const struct sr_dev_driver *di)
4bd80e12 218{
219 return std_dev_clear(di, clear_helper);
220}
221
4f840ce9 222static int cleanup(const struct sr_dev_driver *di)
4bd80e12 223{
4f840ce9 224 return dev_clear(di);
4bd80e12 225}
226
584560f1 227static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
4bd80e12 228 const struct sr_channel_group *cg)
229{
230 struct dev_context *devc;
231
232 (void)cg;
233
234 if (!sdi)
235 return SR_ERR_ARG;
236
237 devc = sdi->priv;
584560f1 238 switch (key) {
4bd80e12 239 case SR_CONF_SAMPLERATE:
240 *data = g_variant_new_uint64(devc->cur_samplerate);
241 break;
242 case SR_CONF_CAPTURE_RATIO:
243 *data = g_variant_new_uint64(devc->capture_ratio);
244 break;
245 case SR_CONF_LIMIT_SAMPLES:
246 *data = g_variant_new_uint64(devc->limit_samples);
247 break;
248 case SR_CONF_PATTERN_MODE:
249 if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
250 *data = g_variant_new_string(STR_PATTERN_EXTERNAL);
251 else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
252 *data = g_variant_new_string(STR_PATTERN_INTERNAL);
253 else
254 *data = g_variant_new_string(STR_PATTERN_NONE);
255 break;
256 case SR_CONF_RLE:
257 *data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
258 break;
259 case SR_CONF_EXTERNAL_CLOCK:
260 *data = g_variant_new_boolean(devc->flag_reg & FLAG_CLOCK_EXTERNAL ? TRUE : FALSE);
261 break;
262 default:
263 return SR_ERR_NA;
264 }
265
266 return SR_OK;
267}
268
584560f1 269static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
4bd80e12 270 const struct sr_channel_group *cg)
271{
272 struct dev_context *devc;
273 uint16_t flag;
274 uint64_t tmp_u64;
275 int ret;
276 const char *stropt;
277
278 (void)cg;
279
280 if (sdi->status != SR_ST_ACTIVE)
281 return SR_ERR_DEV_CLOSED;
282
283 devc = sdi->priv;
284
584560f1 285 switch (key) {
4bd80e12 286 case SR_CONF_SAMPLERATE:
287 tmp_u64 = g_variant_get_uint64(data);
288 if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
289 return SR_ERR_SAMPLERATE;
290 ret = p_ols_set_samplerate(sdi, g_variant_get_uint64(data));
291 break;
292 case SR_CONF_LIMIT_SAMPLES:
293 tmp_u64 = g_variant_get_uint64(data);
294 if (tmp_u64 < MIN_NUM_SAMPLES)
295 return SR_ERR;
296 devc->limit_samples = tmp_u64;
297 ret = SR_OK;
298 break;
299 case SR_CONF_CAPTURE_RATIO:
300 devc->capture_ratio = g_variant_get_uint64(data);
301 if (devc->capture_ratio < 0 || devc->capture_ratio > 100) {
302 devc->capture_ratio = 0;
303 ret = SR_ERR;
304 } else
305 ret = SR_OK;
306 break;
307 case SR_CONF_EXTERNAL_CLOCK:
308 if (g_variant_get_boolean(data)) {
309 sr_info("Enabling external clock.");
310 devc->flag_reg |= FLAG_CLOCK_EXTERNAL;
311 } else {
312 sr_info("Disabled external clock.");
313 devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
314 }
315 ret = SR_OK;
316 break;
317 case SR_CONF_PATTERN_MODE:
318 stropt = g_variant_get_string(data, NULL);
319 ret = SR_OK;
320 flag = 0xffff;
321 if (!strcmp(stropt, STR_PATTERN_NONE)) {
322 sr_info("Disabling test modes.");
323 flag = 0x0000;
324 }else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
325 sr_info("Enabling internal test mode.");
326 flag = FLAG_INTERNAL_TEST_MODE;
327 } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
328 sr_info("Enabling external test mode.");
329 flag = FLAG_EXTERNAL_TEST_MODE;
330 } else {
331 ret = SR_ERR;
332 }
333 if (flag != 0xffff) {
334 devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE);
335 devc->flag_reg |= flag;
336 }
337 break;
338 case SR_CONF_SWAP:
339 if (g_variant_get_boolean(data)) {
340 sr_info("Enabling channel swapping.");
341 devc->flag_reg |= FLAG_SWAP_CHANNELS;
342 } else {
343 sr_info("Disabling channel swapping.");
344 devc->flag_reg &= ~FLAG_SWAP_CHANNELS;
345 }
346 ret = SR_OK;
347 break;
348
349 case SR_CONF_RLE:
350 if (g_variant_get_boolean(data)) {
351 sr_info("Enabling RLE.");
352 devc->flag_reg |= FLAG_RLE;
353 } else {
354 sr_info("Disabling RLE.");
355 devc->flag_reg &= ~FLAG_RLE;
356 }
357 ret = SR_OK;
358 break;
359 default:
360 ret = SR_ERR_NA;
361 }
362
363 return ret;
364}
365
584560f1 366static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
4bd80e12 367 const struct sr_channel_group *cg)
368{
369 struct dev_context *devc;
370 GVariant *gvar, *grange[2];
371 GVariantBuilder gvb;
acc885c7 372 int num_pols_changrp, i;
4bd80e12 373
374 (void)cg;
375
376 switch (key) {
377 case SR_CONF_DEVICE_OPTIONS:
584560f1 378 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
f254bc4b 379 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
4bd80e12 380 break;
381 case SR_CONF_SAMPLERATE:
382 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
383 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
384 ARRAY_SIZE(samplerates), sizeof(uint64_t));
385 g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
386 *data = g_variant_builder_end(&gvb);
387 break;
acc885c7
BV
388 case SR_CONF_TRIGGER_MATCH:
389 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
390 trigger_matches, ARRAY_SIZE(trigger_matches),
391 sizeof(int32_t));
4bd80e12 392 break;
393 case SR_CONF_PATTERN_MODE:
394 *data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
395 break;
396 case SR_CONF_LIMIT_SAMPLES:
397 if (!sdi)
398 return SR_ERR_ARG;
399 devc = sdi->priv;
400 if (devc->flag_reg & FLAG_RLE)
401 return SR_ERR_NA;
b94cff40 402 if (devc->max_samplebytes == 0)
4bd80e12 403 /* Device didn't specify sample memory size in metadata. */
404 return SR_ERR_NA;
405 /*
406 * Channel groups are turned off if no channels in that group are
407 * enabled, making more room for samples for the enabled group.
408 */
acc885c7
BV
409 pols_channel_mask(sdi);
410 num_pols_changrp = 0;
4bd80e12 411 for (i = 0; i < 4; i++) {
412 if (devc->channel_mask & (0xff << (i * 8)))
acc885c7 413 num_pols_changrp++;
4bd80e12 414 }
b94cff40 415 /* 3 channel groups takes as many bytes as 4 channel groups */
acc885c7
BV
416 if (num_pols_changrp == 3)
417 num_pols_changrp = 4;
4bd80e12 418 grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
acc885c7
BV
419 if (num_pols_changrp)
420 grange[1] = g_variant_new_uint64(devc->max_samplebytes / num_pols_changrp);
421 else
422 grange[1] = g_variant_new_uint64(MIN_NUM_SAMPLES);
4bd80e12 423 *data = g_variant_new_tuple(grange, 2);
424 break;
425 default:
426 return SR_ERR_NA;
427 }
428
429 return SR_OK;
430}
431
432static int dev_open(struct sr_dev_inst *sdi)
433{
434 struct dev_context *devc;
4bd80e12 435
436 devc = sdi->priv;
437
438 if (p_ols_open(devc) != SR_OK) {
439 return SR_ERR;
440 } else {
dcd438ee 441 sdi->status = SR_ST_ACTIVE;
4bd80e12 442 return SR_OK;
443 }
444}
445
446static int dev_close(struct sr_dev_inst *sdi)
447{
448 int ret;
449 struct dev_context *devc;
450
451 ret = SR_OK;
452 devc = sdi->priv;
453
454 if (sdi->status == SR_ST_ACTIVE) {
455 sr_dbg("Status ACTIVE, closing device.");
456 ret = p_ols_close(devc);
457 } else {
458 sr_spew("Status not ACTIVE, nothing to do.");
459 }
460
461 sdi->status = SR_ST_INACTIVE;
462
463 return ret;
464}
465
4bd80e12 466static int set_trigger(const struct sr_dev_inst *sdi, int stage)
467{
468 struct dev_context *devc;
469 uint8_t cmd, arg[4];
470
471 devc = sdi->priv;
472
473 cmd = CMD_SET_TRIGGER_MASK + stage * 4;
474 arg[0] = devc->trigger_mask[stage] & 0xff;
475 arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
476 arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
477 arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
478 if (write_longcommand(devc, cmd, arg) != SR_OK)
479 return SR_ERR;
480
481 cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
482 arg[0] = devc->trigger_value[stage] & 0xff;
483 arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
484 arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
485 arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
486 if (write_longcommand(devc, cmd, arg) != SR_OK)
487 return SR_ERR;
488
489 cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
490 arg[0] = arg[1] = arg[3] = 0x00;
491 arg[2] = stage;
492 if (stage == devc->num_stages)
493 /* Last stage, fire when this one matches. */
494 arg[3] |= TRIGGER_START;
495 if (write_longcommand(devc, cmd, arg) != SR_OK)
496 return SR_ERR;
497
1e0de846 498 cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
499 arg[0] = devc->trigger_edge[stage] & 0xff;
500 arg[1] = (devc->trigger_edge[stage] >> 8) & 0xff;
501 arg[2] = (devc->trigger_edge[stage] >> 16) & 0xff;
502 arg[3] = (devc->trigger_edge[stage] >> 24) & 0xff;
503 if (write_longcommand(devc, cmd, arg) != SR_OK)
504 return SR_ERR;
505
4bd80e12 506 return SR_OK;
507}
508
84cbaf77
BV
509static int disable_trigger(const struct sr_dev_inst *sdi, int stage)
510{
511 struct dev_context *devc;
512 uint8_t cmd, arg[4];
513
514 devc = sdi->priv;
515
516 cmd = CMD_SET_TRIGGER_MASK + stage * 4;
517 arg[0] = arg[1] = arg[2] = arg[3] = 0x00;
518 if (write_longcommand(devc, cmd, arg) != SR_OK)
519 return SR_ERR;
520
521 cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
522 if (write_longcommand(devc, cmd, arg) != SR_OK)
523 return SR_ERR;
524
525 cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
526 arg[2] = 0x03;
527 if (write_longcommand(devc, cmd, arg) != SR_OK)
528 return SR_ERR;
529
530 cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
531 arg[2] = 0x00;
532 if (write_longcommand(devc, cmd, arg) != SR_OK)
533 return SR_ERR;
534
535 return SR_OK;
536}
537
4bd80e12 538static int dev_acquisition_start(const struct sr_dev_inst *sdi,
539 void *cb_data)
540{
541 struct dev_context *devc;
542 uint32_t samplecount, readcount, delaycount;
acc885c7 543 uint8_t pols_changrp_mask, arg[4];
b94cff40 544 uint16_t flag_tmp;
acc885c7 545 int num_pols_changrp, samplespercount;
4bd80e12 546 int ret, i;
547
548 if (sdi->status != SR_ST_ACTIVE)
549 return SR_ERR_DEV_CLOSED;
550
551 devc = sdi->priv;
552
acc885c7 553 pols_channel_mask(sdi);
4bd80e12 554
555 /*
556 * Enable/disable channel groups in the flag register according to the
acc885c7
BV
557 * channel mask. Calculate this here, because num_pols_changrp is
558 * needed to limit readcount.
4bd80e12 559 */
acc885c7
BV
560 pols_changrp_mask = 0;
561 num_pols_changrp = 0;
4bd80e12 562 for (i = 0; i < 4; i++) {
563 if (devc->channel_mask & (0xff << (i * 8))) {
acc885c7
BV
564 pols_changrp_mask |= (1 << i);
565 num_pols_changrp++;
4bd80e12 566 }
567 }
b94cff40 568 /* 3 channel groups takes as many bytes as 4 channel groups */
acc885c7
BV
569 if (num_pols_changrp == 3)
570 num_pols_changrp = 4;
b94cff40 571 /* maximum number of samples (or RLE counts) the buffer memory can hold */
acc885c7 572 devc->max_samples = devc->max_samplebytes / num_pols_changrp;
4bd80e12 573
574 /*
575 * Limit readcount to prevent reading past the end of the hardware
576 * buffer.
577 */
578 sr_dbg("max_samples = %d", devc->max_samples);
579 sr_dbg("limit_samples = %d", devc->limit_samples);
b94cff40 580 samplecount = MIN(devc->max_samples, devc->limit_samples);
4bd80e12 581 sr_dbg("Samplecount = %d", samplecount);
582
b94cff40 583 /* In demux mode the OLS is processing two samples per clock */
584 if (devc->flag_reg & FLAG_DEMUX) {
585 samplespercount = 8;
586 }
587 else {
588 samplespercount = 4;
589 }
590
591 readcount = samplecount / samplespercount;
592
4bd80e12 593 /* Rather read too many samples than too few. */
b94cff40 594 if (samplecount % samplespercount != 0)
4bd80e12 595 readcount++;
596
597 /* Basic triggers. */
acc885c7
BV
598 if (pols_convert_trigger(sdi) != SR_OK) {
599 sr_err("Failed to configure channels.");
600 return SR_ERR;
601 }
84cbaf77 602
acc885c7 603 if (devc->num_stages > 0) {
4bd80e12 604 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
b94cff40 605 devc->trigger_at = (readcount - delaycount) * samplespercount - devc->num_stages;
84cbaf77
BV
606 for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
607 if (i <= devc->num_stages) {
608 sr_dbg("Setting p-ols stage %d trigger.", i);
609 if ((ret = set_trigger(sdi, i)) != SR_OK)
610 return ret;
611 }
612 else {
613 sr_dbg("Disabling p-ols stage %d trigger.", i);
614 if ((ret = disable_trigger(sdi, i)) != SR_OK)
615 return ret;
616 }
4bd80e12 617 }
618 } else {
619 /* No triggers configured, force trigger on first stage. */
620 sr_dbg("Forcing trigger at stage 0.");
621 if ((ret = set_trigger(sdi, 0)) != SR_OK)
622 return ret;
623 delaycount = readcount;
624 }
625
626 /* Samplerate. */
627 sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
628 devc->cur_samplerate, devc->cur_samplerate_divider);
629 arg[0] = devc->cur_samplerate_divider & 0xff;
630 arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
631 arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
632 arg[3] = 0x00;
633 if (write_longcommand(devc, CMD_SET_DIVIDER, arg) != SR_OK)
634 return SR_ERR;
acc885c7 635
4bd80e12 636 /* Send extended sample limit and pre/post-trigger capture ratio. */
637 arg[0] = ((readcount - 1) & 0xff);
638 arg[1] = ((readcount - 1) & 0xff00) >> 8;
639 arg[2] = ((readcount - 1) & 0xff0000) >> 16;
640 arg[3] = ((readcount - 1) & 0xff000000) >> 24;
1e0de846 641 if (write_longcommand(devc, CMD_CAPTURE_DELAY, arg) != SR_OK)
4bd80e12 642 return SR_ERR;
643 arg[0] = ((delaycount - 1) & 0xff);
644 arg[1] = ((delaycount - 1) & 0xff00) >> 8;
645 arg[2] = ((delaycount - 1) & 0xff0000) >> 16;
646 arg[3] = ((delaycount - 1) & 0xff000000) >> 24;
1e0de846 647 if (write_longcommand(devc, CMD_CAPTURE_COUNT, arg) != SR_OK)
4bd80e12 648 return SR_ERR;
acc885c7 649
4bd80e12 650 /* Flag register. */
651 sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
652 devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
653 devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
654 devc->flag_reg & FLAG_RLE ? "on" : "off",
655 devc->flag_reg & FLAG_FILTER ? "on": "off",
656 devc->flag_reg & FLAG_DEMUX ? "on" : "off");
657
b94cff40 658 /*
659 * Enable/disable OLS channel groups in the flag register according
660 * to the channel mask. 1 means "disable channel".
661 */
662 devc->flag_reg &= ~0x3c;
acc885c7 663 devc->flag_reg |= ~(pols_changrp_mask << 2) & 0x3c;
b94cff40 664 sr_dbg("flag_reg = %x", devc->flag_reg);
665
666 /*
667 * In demux mode the OLS is processing two 8-bit or 16-bit samples
668 * in parallel and for this to work the lower two bits of the four
669 * "channel_disable" bits must be replicated to the upper two bits.
670 */
671 flag_tmp = devc->flag_reg;
672 if (devc->flag_reg & FLAG_DEMUX) {
673 flag_tmp &= ~0x30;
acc885c7 674 flag_tmp |= ~(pols_changrp_mask << 4) & 0x30;
b94cff40 675 }
676 arg[0] = flag_tmp & 0xff;
677 arg[1] = flag_tmp >> 8;
4bd80e12 678 arg[2] = arg[3] = 0x00;
679 if (write_longcommand(devc, CMD_SET_FLAGS, arg) != SR_OK)
680 return SR_ERR;
681
682 /* Start acquisition on the device. */
683 if (write_shortcommand(devc, CMD_RUN) != SR_OK)
684 return SR_ERR;
685
686 /* Reset all operational states. */
687 devc->rle_count = devc->num_transfers = 0;
688 devc->num_samples = devc->num_bytes = 0;
689 devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
690 memset(devc->sample, 0, 4);
691
692 /* Send header packet to the session bus. */
693 std_session_send_df_header(cb_data, LOG_PREFIX);
694
695 /* Hook up a dummy handler to receive data from the device. */
acc885c7
BV
696 sr_session_source_add(sdi->session, 0, G_IO_IN, 10, p_ols_receive_data,
697 cb_data);
4bd80e12 698
699 return SR_OK;
700}
701
4bd80e12 702static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
703{
704 struct dev_context *devc;
705 struct sr_datafeed_packet packet;
706
707 devc = sdi->priv;
708
709 sr_dbg("Stopping acquisition.");
710 write_shortcommand(devc, CMD_RESET);
711 write_shortcommand(devc, CMD_RESET);
712 write_shortcommand(devc, CMD_RESET);
713 write_shortcommand(devc, CMD_RESET);
714 write_shortcommand(devc, CMD_RESET);
715
acc885c7 716 sr_session_source_remove(sdi->session, 0);
4bd80e12 717
718 /* Send end packet to the session bus. */
719 sr_dbg("Sending SR_DF_END.");
720 packet.type = SR_DF_END;
721 sr_session_send(cb_data, &packet);
722
723 return SR_OK;
724}
725
726SR_PRIV struct sr_dev_driver p_ols_driver_info = {
acc885c7 727 .name = "p-ols",
4bd80e12 728 .longname = "Pipistrello OLS",
729 .api_version = 1,
730 .init = init,
731 .cleanup = cleanup,
732 .scan = scan,
733 .dev_list = dev_list,
734 .dev_clear = dev_clear,
735 .config_get = config_get,
736 .config_set = config_set,
737 .config_list = config_list,
738 .dev_open = dev_open,
739 .dev_close = dev_close,
740 .dev_acquisition_start = dev_acquisition_start,
741 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 742 .context = NULL,
4bd80e12 743};