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Channel names consistency fixes and simplifications.
[libsigrok.git] / src / hardware / pipistrello-ols / api.c
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4bd80e12 1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "protocol.h"
21
f254bc4b 22static const uint32_t devopts[] = {
4bd80e12 23 SR_CONF_LOGIC_ANALYZER,
5827f61b
BV
24 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
25 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
26 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
27 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
28 SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
29 SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET,
30 SR_CONF_SWAP | SR_CONF_SET,
31 SR_CONF_RLE | SR_CONF_GET | SR_CONF_SET,
4bd80e12 32};
33
acc885c7
BV
34static const int32_t trigger_matches[] = {
35 SR_TRIGGER_ZERO,
36 SR_TRIGGER_ONE,
37 SR_TRIGGER_RISING,
38 SR_TRIGGER_FALLING,
39};
40
4bd80e12 41#define STR_PATTERN_NONE "None"
42#define STR_PATTERN_EXTERNAL "External"
43#define STR_PATTERN_INTERNAL "Internal"
44
45/* Supported methods of test pattern outputs */
46enum {
47 /**
48 * Capture pins 31:16 (unbuffered wing) output a test pattern
49 * that can captured on pins 0:15.
50 */
51 PATTERN_EXTERNAL,
52
53 /** Route test pattern internally to capture buffer. */
54 PATTERN_INTERNAL,
55};
56
57static const char *patterns[] = {
58 STR_PATTERN_NONE,
59 STR_PATTERN_EXTERNAL,
60 STR_PATTERN_INTERNAL,
61};
62
63/* Channels are numbered 0-31 (on the PCB silkscreen). */
53cda65a 64SR_PRIV const char *p_ols_channel_names[] = {
4bd80e12 65 "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
66 "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
67 "24", "25", "26", "27", "28", "29", "30", "31",
4bd80e12 68};
69
70/* Default supported samplerates, can be overridden by device metadata. */
71static const uint64_t samplerates[] = {
72 SR_HZ(10),
73 SR_MHZ(200),
74 SR_HZ(1),
75};
76
77SR_PRIV struct sr_dev_driver p_ols_driver_info;
4bd80e12 78
4f840ce9 79static int init(struct sr_dev_driver *di, struct sr_context *sr_ctx)
4bd80e12 80{
81 return std_init(sr_ctx, di, LOG_PREFIX);
82}
83
4f840ce9 84static GSList *scan(struct sr_dev_driver *di, GSList *options)
4bd80e12 85{
86 struct sr_dev_inst *sdi;
87 struct drv_context *drvc;
88 struct dev_context *devc;
89 GSList *devices;
90 int ret, i;
91 char buf[70];
92 int bytes_read;
93
94 (void)options;
95
96 drvc = di->priv;
97
98 devices = NULL;
99
100 /* Allocate memory for our private device context. */
f57d8ffe 101 devc = g_malloc0(sizeof(struct dev_context));
4bd80e12 102
103 /* Device-specific settings */
b94cff40 104 devc->max_samplebytes = devc->max_samplerate = devc->protocol_version = 0;
4bd80e12 105
106 /* Acquisition settings */
107 devc->limit_samples = devc->capture_ratio = 0;
108 devc->trigger_at = -1;
109 devc->channel_mask = 0xffffffff;
110 devc->flag_reg = 0;
111
112 /* Allocate memory for the incoming ftdi data. */
113 if (!(devc->ftdi_buf = g_try_malloc0(FTDI_BUF_SIZE))) {
114 sr_err("ftdi_buf malloc failed.");
115 goto err_free_devc;
116 }
117
118 /* Allocate memory for the FTDI context (ftdic) and initialize it. */
119 if (!(devc->ftdic = ftdi_new())) {
120 sr_err("Failed to initialize libftdi.");
121 goto err_free_ftdi_buf;;
122 }
123
124 /* Try to open the FTDI device */
125 if (p_ols_open(devc) != SR_OK) {
126 goto err_free_ftdic;
127 }
128
129 /* The discovery procedure is like this: first send the Reset
130 * command (0x00) 5 times, since the device could be anywhere
131 * in a 5-byte command. Then send the ID command (0x02).
132 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
133 * have a match.
134 */
135
136 ret = SR_OK;
137 for (i = 0; i < 5; i++) {
138 if ((ret = write_shortcommand(devc, CMD_RESET)) != SR_OK) {
139 break;
140 }
141 }
142 if (ret != SR_OK) {
143 sr_err("Could not reset device. Quitting.");
144 goto err_close_ftdic;
145 }
146 write_shortcommand(devc, CMD_ID);
147
148 /* Read the response data. */
149 bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 4);
150 if (bytes_read < 0) {
151 sr_err("Failed to read FTDI data (%d): %s.",
152 bytes_read, ftdi_get_error_string(devc->ftdic));
153 goto err_close_ftdic;
154 }
155 if (bytes_read == 0) {
156 goto err_close_ftdic;
157 }
158
159 if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
160 goto err_close_ftdic;
161
162 /* Definitely using the OLS protocol, check if it supports
163 * the metadata command.
164 */
165 write_shortcommand(devc, CMD_METADATA);
166
167 /* Read the metadata. */
168 bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 64);
169 if (bytes_read < 0) {
170 sr_err("Failed to read FTDI data (%d): %s.",
171 bytes_read, ftdi_get_error_string(devc->ftdic));
172 goto err_close_ftdic;
173 }
174 if (bytes_read == 0) {
175 goto err_close_ftdic;
176 }
177
178 /* Close device. We'll reopen it again when we need it. */
179 p_ols_close(devc);
180
181 /* Parse the metadata. */
182 sdi = p_ols_get_metadata((uint8_t *)buf, bytes_read, devc);
4bd80e12 183
184 /* Configure samplerate and divider. */
185 if (p_ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
186 sr_dbg("Failed to set default samplerate (%"PRIu64").",
187 DEFAULT_SAMPLERATE);
4bd80e12 188
189 drvc->instances = g_slist_append(drvc->instances, sdi);
190 devices = g_slist_append(devices, sdi);
191
192 return devices;
193
194err_close_ftdic:
195 p_ols_close(devc);
196err_free_ftdic:
197 ftdi_free(devc->ftdic); /* NOT free() or g_free()! */
198err_free_ftdi_buf:
199 g_free(devc->ftdi_buf);
200err_free_devc:
201 g_free(devc);
4bd80e12 202
203 return NULL;
204}
205
4f840ce9 206static GSList *dev_list(const struct sr_dev_driver *di)
4bd80e12 207{
208 return ((struct drv_context *)(di->priv))->instances;
209}
210
211static void clear_helper(void *priv)
212{
213 struct dev_context *devc;
214
215 devc = priv;
216
217 ftdi_free(devc->ftdic);
218 g_free(devc->ftdi_buf);
219}
220
4f840ce9 221static int dev_clear(const struct sr_dev_driver *di)
4bd80e12 222{
223 return std_dev_clear(di, clear_helper);
224}
225
4f840ce9 226static int cleanup(const struct sr_dev_driver *di)
4bd80e12 227{
4f840ce9 228 return dev_clear(di);
4bd80e12 229}
230
584560f1 231static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
4bd80e12 232 const struct sr_channel_group *cg)
233{
234 struct dev_context *devc;
235
236 (void)cg;
237
238 if (!sdi)
239 return SR_ERR_ARG;
240
241 devc = sdi->priv;
584560f1 242 switch (key) {
4bd80e12 243 case SR_CONF_SAMPLERATE:
244 *data = g_variant_new_uint64(devc->cur_samplerate);
245 break;
246 case SR_CONF_CAPTURE_RATIO:
247 *data = g_variant_new_uint64(devc->capture_ratio);
248 break;
249 case SR_CONF_LIMIT_SAMPLES:
250 *data = g_variant_new_uint64(devc->limit_samples);
251 break;
252 case SR_CONF_PATTERN_MODE:
253 if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
254 *data = g_variant_new_string(STR_PATTERN_EXTERNAL);
255 else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
256 *data = g_variant_new_string(STR_PATTERN_INTERNAL);
257 else
258 *data = g_variant_new_string(STR_PATTERN_NONE);
259 break;
260 case SR_CONF_RLE:
261 *data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
262 break;
263 case SR_CONF_EXTERNAL_CLOCK:
264 *data = g_variant_new_boolean(devc->flag_reg & FLAG_CLOCK_EXTERNAL ? TRUE : FALSE);
265 break;
266 default:
267 return SR_ERR_NA;
268 }
269
270 return SR_OK;
271}
272
584560f1 273static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
4bd80e12 274 const struct sr_channel_group *cg)
275{
276 struct dev_context *devc;
277 uint16_t flag;
278 uint64_t tmp_u64;
279 int ret;
280 const char *stropt;
281
282 (void)cg;
283
284 if (sdi->status != SR_ST_ACTIVE)
285 return SR_ERR_DEV_CLOSED;
286
287 devc = sdi->priv;
288
584560f1 289 switch (key) {
4bd80e12 290 case SR_CONF_SAMPLERATE:
291 tmp_u64 = g_variant_get_uint64(data);
292 if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
293 return SR_ERR_SAMPLERATE;
294 ret = p_ols_set_samplerate(sdi, g_variant_get_uint64(data));
295 break;
296 case SR_CONF_LIMIT_SAMPLES:
297 tmp_u64 = g_variant_get_uint64(data);
298 if (tmp_u64 < MIN_NUM_SAMPLES)
299 return SR_ERR;
300 devc->limit_samples = tmp_u64;
301 ret = SR_OK;
302 break;
303 case SR_CONF_CAPTURE_RATIO:
304 devc->capture_ratio = g_variant_get_uint64(data);
305 if (devc->capture_ratio < 0 || devc->capture_ratio > 100) {
306 devc->capture_ratio = 0;
307 ret = SR_ERR;
308 } else
309 ret = SR_OK;
310 break;
311 case SR_CONF_EXTERNAL_CLOCK:
312 if (g_variant_get_boolean(data)) {
313 sr_info("Enabling external clock.");
314 devc->flag_reg |= FLAG_CLOCK_EXTERNAL;
315 } else {
316 sr_info("Disabled external clock.");
317 devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
318 }
319 ret = SR_OK;
320 break;
321 case SR_CONF_PATTERN_MODE:
322 stropt = g_variant_get_string(data, NULL);
323 ret = SR_OK;
324 flag = 0xffff;
325 if (!strcmp(stropt, STR_PATTERN_NONE)) {
326 sr_info("Disabling test modes.");
327 flag = 0x0000;
328 }else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
329 sr_info("Enabling internal test mode.");
330 flag = FLAG_INTERNAL_TEST_MODE;
331 } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
332 sr_info("Enabling external test mode.");
333 flag = FLAG_EXTERNAL_TEST_MODE;
334 } else {
335 ret = SR_ERR;
336 }
337 if (flag != 0xffff) {
338 devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE);
339 devc->flag_reg |= flag;
340 }
341 break;
342 case SR_CONF_SWAP:
343 if (g_variant_get_boolean(data)) {
344 sr_info("Enabling channel swapping.");
345 devc->flag_reg |= FLAG_SWAP_CHANNELS;
346 } else {
347 sr_info("Disabling channel swapping.");
348 devc->flag_reg &= ~FLAG_SWAP_CHANNELS;
349 }
350 ret = SR_OK;
351 break;
352
353 case SR_CONF_RLE:
354 if (g_variant_get_boolean(data)) {
355 sr_info("Enabling RLE.");
356 devc->flag_reg |= FLAG_RLE;
357 } else {
358 sr_info("Disabling RLE.");
359 devc->flag_reg &= ~FLAG_RLE;
360 }
361 ret = SR_OK;
362 break;
363 default:
364 ret = SR_ERR_NA;
365 }
366
367 return ret;
368}
369
584560f1 370static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
4bd80e12 371 const struct sr_channel_group *cg)
372{
373 struct dev_context *devc;
374 GVariant *gvar, *grange[2];
375 GVariantBuilder gvb;
acc885c7 376 int num_pols_changrp, i;
4bd80e12 377
378 (void)cg;
379
380 switch (key) {
381 case SR_CONF_DEVICE_OPTIONS:
584560f1 382 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
f254bc4b 383 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
4bd80e12 384 break;
385 case SR_CONF_SAMPLERATE:
386 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
387 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
388 ARRAY_SIZE(samplerates), sizeof(uint64_t));
389 g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
390 *data = g_variant_builder_end(&gvb);
391 break;
acc885c7
BV
392 case SR_CONF_TRIGGER_MATCH:
393 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
394 trigger_matches, ARRAY_SIZE(trigger_matches),
395 sizeof(int32_t));
4bd80e12 396 break;
397 case SR_CONF_PATTERN_MODE:
398 *data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
399 break;
400 case SR_CONF_LIMIT_SAMPLES:
401 if (!sdi)
402 return SR_ERR_ARG;
403 devc = sdi->priv;
404 if (devc->flag_reg & FLAG_RLE)
405 return SR_ERR_NA;
b94cff40 406 if (devc->max_samplebytes == 0)
4bd80e12 407 /* Device didn't specify sample memory size in metadata. */
408 return SR_ERR_NA;
409 /*
410 * Channel groups are turned off if no channels in that group are
411 * enabled, making more room for samples for the enabled group.
412 */
acc885c7
BV
413 pols_channel_mask(sdi);
414 num_pols_changrp = 0;
4bd80e12 415 for (i = 0; i < 4; i++) {
416 if (devc->channel_mask & (0xff << (i * 8)))
acc885c7 417 num_pols_changrp++;
4bd80e12 418 }
b94cff40 419 /* 3 channel groups takes as many bytes as 4 channel groups */
acc885c7
BV
420 if (num_pols_changrp == 3)
421 num_pols_changrp = 4;
4bd80e12 422 grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
acc885c7
BV
423 if (num_pols_changrp)
424 grange[1] = g_variant_new_uint64(devc->max_samplebytes / num_pols_changrp);
425 else
426 grange[1] = g_variant_new_uint64(MIN_NUM_SAMPLES);
4bd80e12 427 *data = g_variant_new_tuple(grange, 2);
428 break;
429 default:
430 return SR_ERR_NA;
431 }
432
433 return SR_OK;
434}
435
436static int dev_open(struct sr_dev_inst *sdi)
437{
438 struct dev_context *devc;
4bd80e12 439
440 devc = sdi->priv;
441
442 if (p_ols_open(devc) != SR_OK) {
443 return SR_ERR;
444 } else {
dcd438ee 445 sdi->status = SR_ST_ACTIVE;
4bd80e12 446 return SR_OK;
447 }
448}
449
450static int dev_close(struct sr_dev_inst *sdi)
451{
452 int ret;
453 struct dev_context *devc;
454
455 ret = SR_OK;
456 devc = sdi->priv;
457
458 if (sdi->status == SR_ST_ACTIVE) {
459 sr_dbg("Status ACTIVE, closing device.");
460 ret = p_ols_close(devc);
461 } else {
462 sr_spew("Status not ACTIVE, nothing to do.");
463 }
464
465 sdi->status = SR_ST_INACTIVE;
466
467 return ret;
468}
469
4bd80e12 470static int set_trigger(const struct sr_dev_inst *sdi, int stage)
471{
472 struct dev_context *devc;
473 uint8_t cmd, arg[4];
474
475 devc = sdi->priv;
476
477 cmd = CMD_SET_TRIGGER_MASK + stage * 4;
478 arg[0] = devc->trigger_mask[stage] & 0xff;
479 arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
480 arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
481 arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
482 if (write_longcommand(devc, cmd, arg) != SR_OK)
483 return SR_ERR;
484
485 cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
486 arg[0] = devc->trigger_value[stage] & 0xff;
487 arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
488 arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
489 arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
490 if (write_longcommand(devc, cmd, arg) != SR_OK)
491 return SR_ERR;
492
493 cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
494 arg[0] = arg[1] = arg[3] = 0x00;
495 arg[2] = stage;
496 if (stage == devc->num_stages)
497 /* Last stage, fire when this one matches. */
498 arg[3] |= TRIGGER_START;
499 if (write_longcommand(devc, cmd, arg) != SR_OK)
500 return SR_ERR;
501
1e0de846 502 cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
503 arg[0] = devc->trigger_edge[stage] & 0xff;
504 arg[1] = (devc->trigger_edge[stage] >> 8) & 0xff;
505 arg[2] = (devc->trigger_edge[stage] >> 16) & 0xff;
506 arg[3] = (devc->trigger_edge[stage] >> 24) & 0xff;
507 if (write_longcommand(devc, cmd, arg) != SR_OK)
508 return SR_ERR;
509
4bd80e12 510 return SR_OK;
511}
512
84cbaf77
BV
513static int disable_trigger(const struct sr_dev_inst *sdi, int stage)
514{
515 struct dev_context *devc;
516 uint8_t cmd, arg[4];
517
518 devc = sdi->priv;
519
520 cmd = CMD_SET_TRIGGER_MASK + stage * 4;
521 arg[0] = arg[1] = arg[2] = arg[3] = 0x00;
522 if (write_longcommand(devc, cmd, arg) != SR_OK)
523 return SR_ERR;
524
525 cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
526 if (write_longcommand(devc, cmd, arg) != SR_OK)
527 return SR_ERR;
528
529 cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
530 arg[2] = 0x03;
531 if (write_longcommand(devc, cmd, arg) != SR_OK)
532 return SR_ERR;
533
534 cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
535 arg[2] = 0x00;
536 if (write_longcommand(devc, cmd, arg) != SR_OK)
537 return SR_ERR;
538
539 return SR_OK;
540}
541
4bd80e12 542static int dev_acquisition_start(const struct sr_dev_inst *sdi,
543 void *cb_data)
544{
545 struct dev_context *devc;
546 uint32_t samplecount, readcount, delaycount;
acc885c7 547 uint8_t pols_changrp_mask, arg[4];
b94cff40 548 uint16_t flag_tmp;
acc885c7 549 int num_pols_changrp, samplespercount;
4bd80e12 550 int ret, i;
551
552 if (sdi->status != SR_ST_ACTIVE)
553 return SR_ERR_DEV_CLOSED;
554
555 devc = sdi->priv;
556
acc885c7 557 pols_channel_mask(sdi);
4bd80e12 558
559 /*
560 * Enable/disable channel groups in the flag register according to the
acc885c7
BV
561 * channel mask. Calculate this here, because num_pols_changrp is
562 * needed to limit readcount.
4bd80e12 563 */
acc885c7
BV
564 pols_changrp_mask = 0;
565 num_pols_changrp = 0;
4bd80e12 566 for (i = 0; i < 4; i++) {
567 if (devc->channel_mask & (0xff << (i * 8))) {
acc885c7
BV
568 pols_changrp_mask |= (1 << i);
569 num_pols_changrp++;
4bd80e12 570 }
571 }
b94cff40 572 /* 3 channel groups takes as many bytes as 4 channel groups */
acc885c7
BV
573 if (num_pols_changrp == 3)
574 num_pols_changrp = 4;
b94cff40 575 /* maximum number of samples (or RLE counts) the buffer memory can hold */
acc885c7 576 devc->max_samples = devc->max_samplebytes / num_pols_changrp;
4bd80e12 577
578 /*
579 * Limit readcount to prevent reading past the end of the hardware
580 * buffer.
581 */
582 sr_dbg("max_samples = %d", devc->max_samples);
583 sr_dbg("limit_samples = %d", devc->limit_samples);
b94cff40 584 samplecount = MIN(devc->max_samples, devc->limit_samples);
4bd80e12 585 sr_dbg("Samplecount = %d", samplecount);
586
b94cff40 587 /* In demux mode the OLS is processing two samples per clock */
588 if (devc->flag_reg & FLAG_DEMUX) {
589 samplespercount = 8;
590 }
591 else {
592 samplespercount = 4;
593 }
594
595 readcount = samplecount / samplespercount;
596
4bd80e12 597 /* Rather read too many samples than too few. */
b94cff40 598 if (samplecount % samplespercount != 0)
4bd80e12 599 readcount++;
600
601 /* Basic triggers. */
acc885c7
BV
602 if (pols_convert_trigger(sdi) != SR_OK) {
603 sr_err("Failed to configure channels.");
604 return SR_ERR;
605 }
84cbaf77 606
acc885c7 607 if (devc->num_stages > 0) {
4bd80e12 608 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
b94cff40 609 devc->trigger_at = (readcount - delaycount) * samplespercount - devc->num_stages;
84cbaf77
BV
610 for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
611 if (i <= devc->num_stages) {
612 sr_dbg("Setting p-ols stage %d trigger.", i);
613 if ((ret = set_trigger(sdi, i)) != SR_OK)
614 return ret;
615 }
616 else {
617 sr_dbg("Disabling p-ols stage %d trigger.", i);
618 if ((ret = disable_trigger(sdi, i)) != SR_OK)
619 return ret;
620 }
4bd80e12 621 }
622 } else {
623 /* No triggers configured, force trigger on first stage. */
624 sr_dbg("Forcing trigger at stage 0.");
625 if ((ret = set_trigger(sdi, 0)) != SR_OK)
626 return ret;
627 delaycount = readcount;
628 }
629
630 /* Samplerate. */
631 sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
632 devc->cur_samplerate, devc->cur_samplerate_divider);
633 arg[0] = devc->cur_samplerate_divider & 0xff;
634 arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
635 arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
636 arg[3] = 0x00;
637 if (write_longcommand(devc, CMD_SET_DIVIDER, arg) != SR_OK)
638 return SR_ERR;
acc885c7 639
4bd80e12 640 /* Send extended sample limit and pre/post-trigger capture ratio. */
641 arg[0] = ((readcount - 1) & 0xff);
642 arg[1] = ((readcount - 1) & 0xff00) >> 8;
643 arg[2] = ((readcount - 1) & 0xff0000) >> 16;
644 arg[3] = ((readcount - 1) & 0xff000000) >> 24;
1e0de846 645 if (write_longcommand(devc, CMD_CAPTURE_DELAY, arg) != SR_OK)
4bd80e12 646 return SR_ERR;
647 arg[0] = ((delaycount - 1) & 0xff);
648 arg[1] = ((delaycount - 1) & 0xff00) >> 8;
649 arg[2] = ((delaycount - 1) & 0xff0000) >> 16;
650 arg[3] = ((delaycount - 1) & 0xff000000) >> 24;
1e0de846 651 if (write_longcommand(devc, CMD_CAPTURE_COUNT, arg) != SR_OK)
4bd80e12 652 return SR_ERR;
acc885c7 653
4bd80e12 654 /* Flag register. */
655 sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
656 devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
657 devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
658 devc->flag_reg & FLAG_RLE ? "on" : "off",
659 devc->flag_reg & FLAG_FILTER ? "on": "off",
660 devc->flag_reg & FLAG_DEMUX ? "on" : "off");
661
b94cff40 662 /*
663 * Enable/disable OLS channel groups in the flag register according
664 * to the channel mask. 1 means "disable channel".
665 */
666 devc->flag_reg &= ~0x3c;
acc885c7 667 devc->flag_reg |= ~(pols_changrp_mask << 2) & 0x3c;
b94cff40 668 sr_dbg("flag_reg = %x", devc->flag_reg);
669
670 /*
671 * In demux mode the OLS is processing two 8-bit or 16-bit samples
672 * in parallel and for this to work the lower two bits of the four
673 * "channel_disable" bits must be replicated to the upper two bits.
674 */
675 flag_tmp = devc->flag_reg;
676 if (devc->flag_reg & FLAG_DEMUX) {
677 flag_tmp &= ~0x30;
acc885c7 678 flag_tmp |= ~(pols_changrp_mask << 4) & 0x30;
b94cff40 679 }
680 arg[0] = flag_tmp & 0xff;
681 arg[1] = flag_tmp >> 8;
4bd80e12 682 arg[2] = arg[3] = 0x00;
683 if (write_longcommand(devc, CMD_SET_FLAGS, arg) != SR_OK)
684 return SR_ERR;
685
686 /* Start acquisition on the device. */
687 if (write_shortcommand(devc, CMD_RUN) != SR_OK)
688 return SR_ERR;
689
690 /* Reset all operational states. */
691 devc->rle_count = devc->num_transfers = 0;
692 devc->num_samples = devc->num_bytes = 0;
693 devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
694 memset(devc->sample, 0, 4);
695
696 /* Send header packet to the session bus. */
697 std_session_send_df_header(cb_data, LOG_PREFIX);
698
699 /* Hook up a dummy handler to receive data from the device. */
acc885c7
BV
700 sr_session_source_add(sdi->session, 0, G_IO_IN, 10, p_ols_receive_data,
701 cb_data);
4bd80e12 702
703 return SR_OK;
704}
705
4bd80e12 706static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
707{
708 struct dev_context *devc;
709 struct sr_datafeed_packet packet;
710
711 devc = sdi->priv;
712
713 sr_dbg("Stopping acquisition.");
714 write_shortcommand(devc, CMD_RESET);
715 write_shortcommand(devc, CMD_RESET);
716 write_shortcommand(devc, CMD_RESET);
717 write_shortcommand(devc, CMD_RESET);
718 write_shortcommand(devc, CMD_RESET);
719
acc885c7 720 sr_session_source_remove(sdi->session, 0);
4bd80e12 721
722 /* Send end packet to the session bus. */
723 sr_dbg("Sending SR_DF_END.");
724 packet.type = SR_DF_END;
725 sr_session_send(cb_data, &packet);
726
727 return SR_OK;
728}
729
730SR_PRIV struct sr_dev_driver p_ols_driver_info = {
acc885c7 731 .name = "p-ols",
4bd80e12 732 .longname = "Pipistrello OLS",
733 .api_version = 1,
734 .init = init,
735 .cleanup = cleanup,
736 .scan = scan,
737 .dev_list = dev_list,
738 .dev_clear = dev_clear,
739 .config_get = config_get,
740 .config_set = config_set,
741 .config_list = config_list,
742 .dev_open = dev_open,
743 .dev_close = dev_close,
744 .dev_acquisition_start = dev_acquisition_start,
745 .dev_acquisition_stop = dev_acquisition_stop,
746 .priv = NULL,
747};