]> sigrok.org Git - libsigrok.git/blame - src/hardware/pipistrello-ols/api.c
Pass driver struct pointer to driver callbacks.
[libsigrok.git] / src / hardware / pipistrello-ols / api.c
CommitLineData
4bd80e12 1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "protocol.h"
21
f254bc4b 22static const uint32_t devopts[] = {
4bd80e12 23 SR_CONF_LOGIC_ANALYZER,
5827f61b
BV
24 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
25 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
26 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
27 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
28 SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
29 SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET,
30 SR_CONF_SWAP | SR_CONF_SET,
31 SR_CONF_RLE | SR_CONF_GET | SR_CONF_SET,
4bd80e12 32};
33
acc885c7
BV
34static const int32_t trigger_matches[] = {
35 SR_TRIGGER_ZERO,
36 SR_TRIGGER_ONE,
37 SR_TRIGGER_RISING,
38 SR_TRIGGER_FALLING,
39};
40
4bd80e12 41#define STR_PATTERN_NONE "None"
42#define STR_PATTERN_EXTERNAL "External"
43#define STR_PATTERN_INTERNAL "Internal"
44
45/* Supported methods of test pattern outputs */
46enum {
47 /**
48 * Capture pins 31:16 (unbuffered wing) output a test pattern
49 * that can captured on pins 0:15.
50 */
51 PATTERN_EXTERNAL,
52
53 /** Route test pattern internally to capture buffer. */
54 PATTERN_INTERNAL,
55};
56
57static const char *patterns[] = {
58 STR_PATTERN_NONE,
59 STR_PATTERN_EXTERNAL,
60 STR_PATTERN_INTERNAL,
61};
62
63/* Channels are numbered 0-31 (on the PCB silkscreen). */
64SR_PRIV const char *p_ols_channel_names[NUM_CHANNELS + 1] = {
65 "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
66 "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
67 "24", "25", "26", "27", "28", "29", "30", "31",
68 NULL,
69};
70
71/* Default supported samplerates, can be overridden by device metadata. */
72static const uint64_t samplerates[] = {
73 SR_HZ(10),
74 SR_MHZ(200),
75 SR_HZ(1),
76};
77
78SR_PRIV struct sr_dev_driver p_ols_driver_info;
4bd80e12 79
4f840ce9 80static int init(struct sr_dev_driver *di, struct sr_context *sr_ctx)
4bd80e12 81{
82 return std_init(sr_ctx, di, LOG_PREFIX);
83}
84
4f840ce9 85static GSList *scan(struct sr_dev_driver *di, GSList *options)
4bd80e12 86{
87 struct sr_dev_inst *sdi;
88 struct drv_context *drvc;
89 struct dev_context *devc;
90 GSList *devices;
91 int ret, i;
92 char buf[70];
93 int bytes_read;
94
95 (void)options;
96
97 drvc = di->priv;
98
99 devices = NULL;
100
101 /* Allocate memory for our private device context. */
f57d8ffe 102 devc = g_malloc0(sizeof(struct dev_context));
4bd80e12 103
104 /* Device-specific settings */
b94cff40 105 devc->max_samplebytes = devc->max_samplerate = devc->protocol_version = 0;
4bd80e12 106
107 /* Acquisition settings */
108 devc->limit_samples = devc->capture_ratio = 0;
109 devc->trigger_at = -1;
110 devc->channel_mask = 0xffffffff;
111 devc->flag_reg = 0;
112
113 /* Allocate memory for the incoming ftdi data. */
114 if (!(devc->ftdi_buf = g_try_malloc0(FTDI_BUF_SIZE))) {
115 sr_err("ftdi_buf malloc failed.");
116 goto err_free_devc;
117 }
118
119 /* Allocate memory for the FTDI context (ftdic) and initialize it. */
120 if (!(devc->ftdic = ftdi_new())) {
121 sr_err("Failed to initialize libftdi.");
122 goto err_free_ftdi_buf;;
123 }
124
125 /* Try to open the FTDI device */
126 if (p_ols_open(devc) != SR_OK) {
127 goto err_free_ftdic;
128 }
129
130 /* The discovery procedure is like this: first send the Reset
131 * command (0x00) 5 times, since the device could be anywhere
132 * in a 5-byte command. Then send the ID command (0x02).
133 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
134 * have a match.
135 */
136
137 ret = SR_OK;
138 for (i = 0; i < 5; i++) {
139 if ((ret = write_shortcommand(devc, CMD_RESET)) != SR_OK) {
140 break;
141 }
142 }
143 if (ret != SR_OK) {
144 sr_err("Could not reset device. Quitting.");
145 goto err_close_ftdic;
146 }
147 write_shortcommand(devc, CMD_ID);
148
149 /* Read the response data. */
150 bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 4);
151 if (bytes_read < 0) {
152 sr_err("Failed to read FTDI data (%d): %s.",
153 bytes_read, ftdi_get_error_string(devc->ftdic));
154 goto err_close_ftdic;
155 }
156 if (bytes_read == 0) {
157 goto err_close_ftdic;
158 }
159
160 if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
161 goto err_close_ftdic;
162
163 /* Definitely using the OLS protocol, check if it supports
164 * the metadata command.
165 */
166 write_shortcommand(devc, CMD_METADATA);
167
168 /* Read the metadata. */
169 bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 64);
170 if (bytes_read < 0) {
171 sr_err("Failed to read FTDI data (%d): %s.",
172 bytes_read, ftdi_get_error_string(devc->ftdic));
173 goto err_close_ftdic;
174 }
175 if (bytes_read == 0) {
176 goto err_close_ftdic;
177 }
178
179 /* Close device. We'll reopen it again when we need it. */
180 p_ols_close(devc);
181
182 /* Parse the metadata. */
183 sdi = p_ols_get_metadata((uint8_t *)buf, bytes_read, devc);
4bd80e12 184
185 /* Configure samplerate and divider. */
186 if (p_ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
187 sr_dbg("Failed to set default samplerate (%"PRIu64").",
188 DEFAULT_SAMPLERATE);
4bd80e12 189
190 drvc->instances = g_slist_append(drvc->instances, sdi);
191 devices = g_slist_append(devices, sdi);
192
193 return devices;
194
195err_close_ftdic:
196 p_ols_close(devc);
197err_free_ftdic:
198 ftdi_free(devc->ftdic); /* NOT free() or g_free()! */
199err_free_ftdi_buf:
200 g_free(devc->ftdi_buf);
201err_free_devc:
202 g_free(devc);
4bd80e12 203
204 return NULL;
205}
206
4f840ce9 207static GSList *dev_list(const struct sr_dev_driver *di)
4bd80e12 208{
209 return ((struct drv_context *)(di->priv))->instances;
210}
211
212static void clear_helper(void *priv)
213{
214 struct dev_context *devc;
215
216 devc = priv;
217
218 ftdi_free(devc->ftdic);
219 g_free(devc->ftdi_buf);
220}
221
4f840ce9 222static int dev_clear(const struct sr_dev_driver *di)
4bd80e12 223{
224 return std_dev_clear(di, clear_helper);
225}
226
4f840ce9 227static int cleanup(const struct sr_dev_driver *di)
4bd80e12 228{
4f840ce9 229 return dev_clear(di);
4bd80e12 230}
231
232
584560f1 233static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
4bd80e12 234 const struct sr_channel_group *cg)
235{
236 struct dev_context *devc;
237
238 (void)cg;
239
240 if (!sdi)
241 return SR_ERR_ARG;
242
243 devc = sdi->priv;
584560f1 244 switch (key) {
4bd80e12 245 case SR_CONF_SAMPLERATE:
246 *data = g_variant_new_uint64(devc->cur_samplerate);
247 break;
248 case SR_CONF_CAPTURE_RATIO:
249 *data = g_variant_new_uint64(devc->capture_ratio);
250 break;
251 case SR_CONF_LIMIT_SAMPLES:
252 *data = g_variant_new_uint64(devc->limit_samples);
253 break;
254 case SR_CONF_PATTERN_MODE:
255 if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
256 *data = g_variant_new_string(STR_PATTERN_EXTERNAL);
257 else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
258 *data = g_variant_new_string(STR_PATTERN_INTERNAL);
259 else
260 *data = g_variant_new_string(STR_PATTERN_NONE);
261 break;
262 case SR_CONF_RLE:
263 *data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
264 break;
265 case SR_CONF_EXTERNAL_CLOCK:
266 *data = g_variant_new_boolean(devc->flag_reg & FLAG_CLOCK_EXTERNAL ? TRUE : FALSE);
267 break;
268 default:
269 return SR_ERR_NA;
270 }
271
272 return SR_OK;
273}
274
584560f1 275static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
4bd80e12 276 const struct sr_channel_group *cg)
277{
278 struct dev_context *devc;
279 uint16_t flag;
280 uint64_t tmp_u64;
281 int ret;
282 const char *stropt;
283
284 (void)cg;
285
286 if (sdi->status != SR_ST_ACTIVE)
287 return SR_ERR_DEV_CLOSED;
288
289 devc = sdi->priv;
290
584560f1 291 switch (key) {
4bd80e12 292 case SR_CONF_SAMPLERATE:
293 tmp_u64 = g_variant_get_uint64(data);
294 if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
295 return SR_ERR_SAMPLERATE;
296 ret = p_ols_set_samplerate(sdi, g_variant_get_uint64(data));
297 break;
298 case SR_CONF_LIMIT_SAMPLES:
299 tmp_u64 = g_variant_get_uint64(data);
300 if (tmp_u64 < MIN_NUM_SAMPLES)
301 return SR_ERR;
302 devc->limit_samples = tmp_u64;
303 ret = SR_OK;
304 break;
305 case SR_CONF_CAPTURE_RATIO:
306 devc->capture_ratio = g_variant_get_uint64(data);
307 if (devc->capture_ratio < 0 || devc->capture_ratio > 100) {
308 devc->capture_ratio = 0;
309 ret = SR_ERR;
310 } else
311 ret = SR_OK;
312 break;
313 case SR_CONF_EXTERNAL_CLOCK:
314 if (g_variant_get_boolean(data)) {
315 sr_info("Enabling external clock.");
316 devc->flag_reg |= FLAG_CLOCK_EXTERNAL;
317 } else {
318 sr_info("Disabled external clock.");
319 devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
320 }
321 ret = SR_OK;
322 break;
323 case SR_CONF_PATTERN_MODE:
324 stropt = g_variant_get_string(data, NULL);
325 ret = SR_OK;
326 flag = 0xffff;
327 if (!strcmp(stropt, STR_PATTERN_NONE)) {
328 sr_info("Disabling test modes.");
329 flag = 0x0000;
330 }else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
331 sr_info("Enabling internal test mode.");
332 flag = FLAG_INTERNAL_TEST_MODE;
333 } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
334 sr_info("Enabling external test mode.");
335 flag = FLAG_EXTERNAL_TEST_MODE;
336 } else {
337 ret = SR_ERR;
338 }
339 if (flag != 0xffff) {
340 devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE);
341 devc->flag_reg |= flag;
342 }
343 break;
344 case SR_CONF_SWAP:
345 if (g_variant_get_boolean(data)) {
346 sr_info("Enabling channel swapping.");
347 devc->flag_reg |= FLAG_SWAP_CHANNELS;
348 } else {
349 sr_info("Disabling channel swapping.");
350 devc->flag_reg &= ~FLAG_SWAP_CHANNELS;
351 }
352 ret = SR_OK;
353 break;
354
355 case SR_CONF_RLE:
356 if (g_variant_get_boolean(data)) {
357 sr_info("Enabling RLE.");
358 devc->flag_reg |= FLAG_RLE;
359 } else {
360 sr_info("Disabling RLE.");
361 devc->flag_reg &= ~FLAG_RLE;
362 }
363 ret = SR_OK;
364 break;
365 default:
366 ret = SR_ERR_NA;
367 }
368
369 return ret;
370}
371
584560f1 372static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
4bd80e12 373 const struct sr_channel_group *cg)
374{
375 struct dev_context *devc;
376 GVariant *gvar, *grange[2];
377 GVariantBuilder gvb;
acc885c7 378 int num_pols_changrp, i;
4bd80e12 379
380 (void)cg;
381
382 switch (key) {
383 case SR_CONF_DEVICE_OPTIONS:
584560f1 384 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
f254bc4b 385 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
4bd80e12 386 break;
387 case SR_CONF_SAMPLERATE:
388 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
389 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
390 ARRAY_SIZE(samplerates), sizeof(uint64_t));
391 g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
392 *data = g_variant_builder_end(&gvb);
393 break;
acc885c7
BV
394 case SR_CONF_TRIGGER_MATCH:
395 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
396 trigger_matches, ARRAY_SIZE(trigger_matches),
397 sizeof(int32_t));
4bd80e12 398 break;
399 case SR_CONF_PATTERN_MODE:
400 *data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
401 break;
402 case SR_CONF_LIMIT_SAMPLES:
403 if (!sdi)
404 return SR_ERR_ARG;
405 devc = sdi->priv;
406 if (devc->flag_reg & FLAG_RLE)
407 return SR_ERR_NA;
b94cff40 408 if (devc->max_samplebytes == 0)
4bd80e12 409 /* Device didn't specify sample memory size in metadata. */
410 return SR_ERR_NA;
411 /*
412 * Channel groups are turned off if no channels in that group are
413 * enabled, making more room for samples for the enabled group.
414 */
acc885c7
BV
415 pols_channel_mask(sdi);
416 num_pols_changrp = 0;
4bd80e12 417 for (i = 0; i < 4; i++) {
418 if (devc->channel_mask & (0xff << (i * 8)))
acc885c7 419 num_pols_changrp++;
4bd80e12 420 }
b94cff40 421 /* 3 channel groups takes as many bytes as 4 channel groups */
acc885c7
BV
422 if (num_pols_changrp == 3)
423 num_pols_changrp = 4;
4bd80e12 424 grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
acc885c7
BV
425 if (num_pols_changrp)
426 grange[1] = g_variant_new_uint64(devc->max_samplebytes / num_pols_changrp);
427 else
428 grange[1] = g_variant_new_uint64(MIN_NUM_SAMPLES);
4bd80e12 429 *data = g_variant_new_tuple(grange, 2);
430 break;
431 default:
432 return SR_ERR_NA;
433 }
434
435 return SR_OK;
436}
437
438static int dev_open(struct sr_dev_inst *sdi)
439{
440 struct dev_context *devc;
4bd80e12 441
442 devc = sdi->priv;
443
444 if (p_ols_open(devc) != SR_OK) {
445 return SR_ERR;
446 } else {
447 sdi->status = SR_ST_ACTIVE;
448 return SR_OK;
449 }
450}
451
452static int dev_close(struct sr_dev_inst *sdi)
453{
454 int ret;
455 struct dev_context *devc;
456
457 ret = SR_OK;
458 devc = sdi->priv;
459
460 if (sdi->status == SR_ST_ACTIVE) {
461 sr_dbg("Status ACTIVE, closing device.");
462 ret = p_ols_close(devc);
463 } else {
464 sr_spew("Status not ACTIVE, nothing to do.");
465 }
466
467 sdi->status = SR_ST_INACTIVE;
468
469 return ret;
470}
471
472
473static int set_trigger(const struct sr_dev_inst *sdi, int stage)
474{
475 struct dev_context *devc;
476 uint8_t cmd, arg[4];
477
478 devc = sdi->priv;
479
480 cmd = CMD_SET_TRIGGER_MASK + stage * 4;
481 arg[0] = devc->trigger_mask[stage] & 0xff;
482 arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
483 arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
484 arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
485 if (write_longcommand(devc, cmd, arg) != SR_OK)
486 return SR_ERR;
487
488 cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
489 arg[0] = devc->trigger_value[stage] & 0xff;
490 arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
491 arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
492 arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
493 if (write_longcommand(devc, cmd, arg) != SR_OK)
494 return SR_ERR;
495
496 cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
497 arg[0] = arg[1] = arg[3] = 0x00;
498 arg[2] = stage;
499 if (stage == devc->num_stages)
500 /* Last stage, fire when this one matches. */
501 arg[3] |= TRIGGER_START;
502 if (write_longcommand(devc, cmd, arg) != SR_OK)
503 return SR_ERR;
504
1e0de846 505 cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
506 arg[0] = devc->trigger_edge[stage] & 0xff;
507 arg[1] = (devc->trigger_edge[stage] >> 8) & 0xff;
508 arg[2] = (devc->trigger_edge[stage] >> 16) & 0xff;
509 arg[3] = (devc->trigger_edge[stage] >> 24) & 0xff;
510 if (write_longcommand(devc, cmd, arg) != SR_OK)
511 return SR_ERR;
512
4bd80e12 513 return SR_OK;
514}
515
84cbaf77
BV
516static int disable_trigger(const struct sr_dev_inst *sdi, int stage)
517{
518 struct dev_context *devc;
519 uint8_t cmd, arg[4];
520
521 devc = sdi->priv;
522
523 cmd = CMD_SET_TRIGGER_MASK + stage * 4;
524 arg[0] = arg[1] = arg[2] = arg[3] = 0x00;
525 if (write_longcommand(devc, cmd, arg) != SR_OK)
526 return SR_ERR;
527
528 cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
529 if (write_longcommand(devc, cmd, arg) != SR_OK)
530 return SR_ERR;
531
532 cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
533 arg[2] = 0x03;
534 if (write_longcommand(devc, cmd, arg) != SR_OK)
535 return SR_ERR;
536
537 cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
538 arg[2] = 0x00;
539 if (write_longcommand(devc, cmd, arg) != SR_OK)
540 return SR_ERR;
541
542 return SR_OK;
543}
544
4bd80e12 545static int dev_acquisition_start(const struct sr_dev_inst *sdi,
546 void *cb_data)
547{
548 struct dev_context *devc;
549 uint32_t samplecount, readcount, delaycount;
acc885c7 550 uint8_t pols_changrp_mask, arg[4];
b94cff40 551 uint16_t flag_tmp;
acc885c7 552 int num_pols_changrp, samplespercount;
4bd80e12 553 int ret, i;
554
555 if (sdi->status != SR_ST_ACTIVE)
556 return SR_ERR_DEV_CLOSED;
557
558 devc = sdi->priv;
559
acc885c7 560 pols_channel_mask(sdi);
4bd80e12 561
562 /*
563 * Enable/disable channel groups in the flag register according to the
acc885c7
BV
564 * channel mask. Calculate this here, because num_pols_changrp is
565 * needed to limit readcount.
4bd80e12 566 */
acc885c7
BV
567 pols_changrp_mask = 0;
568 num_pols_changrp = 0;
4bd80e12 569 for (i = 0; i < 4; i++) {
570 if (devc->channel_mask & (0xff << (i * 8))) {
acc885c7
BV
571 pols_changrp_mask |= (1 << i);
572 num_pols_changrp++;
4bd80e12 573 }
574 }
b94cff40 575 /* 3 channel groups takes as many bytes as 4 channel groups */
acc885c7
BV
576 if (num_pols_changrp == 3)
577 num_pols_changrp = 4;
b94cff40 578 /* maximum number of samples (or RLE counts) the buffer memory can hold */
acc885c7 579 devc->max_samples = devc->max_samplebytes / num_pols_changrp;
4bd80e12 580
581 /*
582 * Limit readcount to prevent reading past the end of the hardware
583 * buffer.
584 */
585 sr_dbg("max_samples = %d", devc->max_samples);
586 sr_dbg("limit_samples = %d", devc->limit_samples);
b94cff40 587 samplecount = MIN(devc->max_samples, devc->limit_samples);
4bd80e12 588 sr_dbg("Samplecount = %d", samplecount);
589
b94cff40 590 /* In demux mode the OLS is processing two samples per clock */
591 if (devc->flag_reg & FLAG_DEMUX) {
592 samplespercount = 8;
593 }
594 else {
595 samplespercount = 4;
596 }
597
598 readcount = samplecount / samplespercount;
599
4bd80e12 600 /* Rather read too many samples than too few. */
b94cff40 601 if (samplecount % samplespercount != 0)
4bd80e12 602 readcount++;
603
604 /* Basic triggers. */
acc885c7
BV
605 if (pols_convert_trigger(sdi) != SR_OK) {
606 sr_err("Failed to configure channels.");
607 return SR_ERR;
608 }
84cbaf77 609
acc885c7 610 if (devc->num_stages > 0) {
4bd80e12 611 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
b94cff40 612 devc->trigger_at = (readcount - delaycount) * samplespercount - devc->num_stages;
84cbaf77
BV
613 for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
614 if (i <= devc->num_stages) {
615 sr_dbg("Setting p-ols stage %d trigger.", i);
616 if ((ret = set_trigger(sdi, i)) != SR_OK)
617 return ret;
618 }
619 else {
620 sr_dbg("Disabling p-ols stage %d trigger.", i);
621 if ((ret = disable_trigger(sdi, i)) != SR_OK)
622 return ret;
623 }
4bd80e12 624 }
625 } else {
626 /* No triggers configured, force trigger on first stage. */
627 sr_dbg("Forcing trigger at stage 0.");
628 if ((ret = set_trigger(sdi, 0)) != SR_OK)
629 return ret;
630 delaycount = readcount;
631 }
632
633 /* Samplerate. */
634 sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
635 devc->cur_samplerate, devc->cur_samplerate_divider);
636 arg[0] = devc->cur_samplerate_divider & 0xff;
637 arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
638 arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
639 arg[3] = 0x00;
640 if (write_longcommand(devc, CMD_SET_DIVIDER, arg) != SR_OK)
641 return SR_ERR;
acc885c7 642
4bd80e12 643 /* Send extended sample limit and pre/post-trigger capture ratio. */
644 arg[0] = ((readcount - 1) & 0xff);
645 arg[1] = ((readcount - 1) & 0xff00) >> 8;
646 arg[2] = ((readcount - 1) & 0xff0000) >> 16;
647 arg[3] = ((readcount - 1) & 0xff000000) >> 24;
1e0de846 648 if (write_longcommand(devc, CMD_CAPTURE_DELAY, arg) != SR_OK)
4bd80e12 649 return SR_ERR;
650 arg[0] = ((delaycount - 1) & 0xff);
651 arg[1] = ((delaycount - 1) & 0xff00) >> 8;
652 arg[2] = ((delaycount - 1) & 0xff0000) >> 16;
653 arg[3] = ((delaycount - 1) & 0xff000000) >> 24;
1e0de846 654 if (write_longcommand(devc, CMD_CAPTURE_COUNT, arg) != SR_OK)
4bd80e12 655 return SR_ERR;
acc885c7 656
4bd80e12 657 /* Flag register. */
658 sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
659 devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
660 devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
661 devc->flag_reg & FLAG_RLE ? "on" : "off",
662 devc->flag_reg & FLAG_FILTER ? "on": "off",
663 devc->flag_reg & FLAG_DEMUX ? "on" : "off");
664
b94cff40 665 /*
666 * Enable/disable OLS channel groups in the flag register according
667 * to the channel mask. 1 means "disable channel".
668 */
669 devc->flag_reg &= ~0x3c;
acc885c7 670 devc->flag_reg |= ~(pols_changrp_mask << 2) & 0x3c;
b94cff40 671 sr_dbg("flag_reg = %x", devc->flag_reg);
672
673 /*
674 * In demux mode the OLS is processing two 8-bit or 16-bit samples
675 * in parallel and for this to work the lower two bits of the four
676 * "channel_disable" bits must be replicated to the upper two bits.
677 */
678 flag_tmp = devc->flag_reg;
679 if (devc->flag_reg & FLAG_DEMUX) {
680 flag_tmp &= ~0x30;
acc885c7 681 flag_tmp |= ~(pols_changrp_mask << 4) & 0x30;
b94cff40 682 }
683 arg[0] = flag_tmp & 0xff;
684 arg[1] = flag_tmp >> 8;
4bd80e12 685 arg[2] = arg[3] = 0x00;
686 if (write_longcommand(devc, CMD_SET_FLAGS, arg) != SR_OK)
687 return SR_ERR;
688
689 /* Start acquisition on the device. */
690 if (write_shortcommand(devc, CMD_RUN) != SR_OK)
691 return SR_ERR;
692
693 /* Reset all operational states. */
694 devc->rle_count = devc->num_transfers = 0;
695 devc->num_samples = devc->num_bytes = 0;
696 devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
697 memset(devc->sample, 0, 4);
698
699 /* Send header packet to the session bus. */
700 std_session_send_df_header(cb_data, LOG_PREFIX);
701
702 /* Hook up a dummy handler to receive data from the device. */
acc885c7
BV
703 sr_session_source_add(sdi->session, 0, G_IO_IN, 10, p_ols_receive_data,
704 cb_data);
4bd80e12 705
706 return SR_OK;
707}
708
709
710
711static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
712{
713 struct dev_context *devc;
714 struct sr_datafeed_packet packet;
715
716 devc = sdi->priv;
717
718 sr_dbg("Stopping acquisition.");
719 write_shortcommand(devc, CMD_RESET);
720 write_shortcommand(devc, CMD_RESET);
721 write_shortcommand(devc, CMD_RESET);
722 write_shortcommand(devc, CMD_RESET);
723 write_shortcommand(devc, CMD_RESET);
724
acc885c7 725 sr_session_source_remove(sdi->session, 0);
4bd80e12 726
727 /* Send end packet to the session bus. */
728 sr_dbg("Sending SR_DF_END.");
729 packet.type = SR_DF_END;
730 sr_session_send(cb_data, &packet);
731
732 return SR_OK;
733}
734
735SR_PRIV struct sr_dev_driver p_ols_driver_info = {
acc885c7 736 .name = "p-ols",
4bd80e12 737 .longname = "Pipistrello OLS",
738 .api_version = 1,
739 .init = init,
740 .cleanup = cleanup,
741 .scan = scan,
742 .dev_list = dev_list,
743 .dev_clear = dev_clear,
744 .config_get = config_get,
745 .config_set = config_set,
746 .config_list = config_list,
747 .dev_open = dev_open,
748 .dev_close = dev_close,
749 .dev_acquisition_start = dev_acquisition_start,
750 .dev_acquisition_stop = dev_acquisition_stop,
751 .priv = NULL,
752};