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DEMUX and RLE fixes
[libsigrok.git] / src / hardware / pipistrello-ols / api.c
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4bd80e12 1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "protocol.h"
21
4bd80e12 22static const int32_t hwcaps[] = {
23 SR_CONF_LOGIC_ANALYZER,
24 SR_CONF_SAMPLERATE,
25 SR_CONF_TRIGGER_TYPE,
26 SR_CONF_CAPTURE_RATIO,
27 SR_CONF_LIMIT_SAMPLES,
28 SR_CONF_PATTERN_MODE,
29 SR_CONF_EXTERNAL_CLOCK,
30 SR_CONF_SWAP,
31 SR_CONF_RLE,
32};
33
34#define STR_PATTERN_NONE "None"
35#define STR_PATTERN_EXTERNAL "External"
36#define STR_PATTERN_INTERNAL "Internal"
37
38/* Supported methods of test pattern outputs */
39enum {
40 /**
41 * Capture pins 31:16 (unbuffered wing) output a test pattern
42 * that can captured on pins 0:15.
43 */
44 PATTERN_EXTERNAL,
45
46 /** Route test pattern internally to capture buffer. */
47 PATTERN_INTERNAL,
48};
49
50static const char *patterns[] = {
51 STR_PATTERN_NONE,
52 STR_PATTERN_EXTERNAL,
53 STR_PATTERN_INTERNAL,
54};
55
56/* Channels are numbered 0-31 (on the PCB silkscreen). */
57SR_PRIV const char *p_ols_channel_names[NUM_CHANNELS + 1] = {
58 "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
59 "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
60 "24", "25", "26", "27", "28", "29", "30", "31",
61 NULL,
62};
63
64/* Default supported samplerates, can be overridden by device metadata. */
65static const uint64_t samplerates[] = {
66 SR_HZ(10),
67 SR_MHZ(200),
68 SR_HZ(1),
69};
70
71SR_PRIV struct sr_dev_driver p_ols_driver_info;
72static struct sr_dev_driver *di = &p_ols_driver_info;
73
74static int init(struct sr_context *sr_ctx)
75{
76 return std_init(sr_ctx, di, LOG_PREFIX);
77}
78
79static GSList *scan(GSList *options)
80{
81 struct sr_dev_inst *sdi;
82 struct drv_context *drvc;
83 struct dev_context *devc;
84 GSList *devices;
85 int ret, i;
86 char buf[70];
87 int bytes_read;
88
89 (void)options;
90
91 drvc = di->priv;
92
93 devices = NULL;
94
95 /* Allocate memory for our private device context. */
96 if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
97 sr_err("Device context malloc failed.");
98 goto err_free_nothing;
99 }
100
101 /* Device-specific settings */
b94cff40 102 devc->max_samplebytes = devc->max_samplerate = devc->protocol_version = 0;
4bd80e12 103
104 /* Acquisition settings */
105 devc->limit_samples = devc->capture_ratio = 0;
106 devc->trigger_at = -1;
107 devc->channel_mask = 0xffffffff;
108 devc->flag_reg = 0;
109
110 /* Allocate memory for the incoming ftdi data. */
111 if (!(devc->ftdi_buf = g_try_malloc0(FTDI_BUF_SIZE))) {
112 sr_err("ftdi_buf malloc failed.");
113 goto err_free_devc;
114 }
115
116 /* Allocate memory for the FTDI context (ftdic) and initialize it. */
117 if (!(devc->ftdic = ftdi_new())) {
118 sr_err("Failed to initialize libftdi.");
119 goto err_free_ftdi_buf;;
120 }
121
122 /* Try to open the FTDI device */
123 if (p_ols_open(devc) != SR_OK) {
124 goto err_free_ftdic;
125 }
126
127 /* The discovery procedure is like this: first send the Reset
128 * command (0x00) 5 times, since the device could be anywhere
129 * in a 5-byte command. Then send the ID command (0x02).
130 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
131 * have a match.
132 */
133
134 ret = SR_OK;
135 for (i = 0; i < 5; i++) {
136 if ((ret = write_shortcommand(devc, CMD_RESET)) != SR_OK) {
137 break;
138 }
139 }
140 if (ret != SR_OK) {
141 sr_err("Could not reset device. Quitting.");
142 goto err_close_ftdic;
143 }
144 write_shortcommand(devc, CMD_ID);
145
146 /* Read the response data. */
147 bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 4);
148 if (bytes_read < 0) {
149 sr_err("Failed to read FTDI data (%d): %s.",
150 bytes_read, ftdi_get_error_string(devc->ftdic));
151 goto err_close_ftdic;
152 }
153 if (bytes_read == 0) {
154 goto err_close_ftdic;
155 }
156
157 if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
158 goto err_close_ftdic;
159
160 /* Definitely using the OLS protocol, check if it supports
161 * the metadata command.
162 */
163 write_shortcommand(devc, CMD_METADATA);
164
165 /* Read the metadata. */
166 bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 64);
167 if (bytes_read < 0) {
168 sr_err("Failed to read FTDI data (%d): %s.",
169 bytes_read, ftdi_get_error_string(devc->ftdic));
170 goto err_close_ftdic;
171 }
172 if (bytes_read == 0) {
173 goto err_close_ftdic;
174 }
175
176 /* Close device. We'll reopen it again when we need it. */
177 p_ols_close(devc);
178
179 /* Parse the metadata. */
180 sdi = p_ols_get_metadata((uint8_t *)buf, bytes_read, devc);
181 sdi->index = 0;
182
183 /* Configure samplerate and divider. */
184 if (p_ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
185 sr_dbg("Failed to set default samplerate (%"PRIu64").",
186 DEFAULT_SAMPLERATE);
187 /* Clear trigger masks, values and stages. */
188 p_ols_configure_channels(sdi);
189
190 drvc->instances = g_slist_append(drvc->instances, sdi);
191 devices = g_slist_append(devices, sdi);
192
193 return devices;
194
195err_close_ftdic:
196 p_ols_close(devc);
197err_free_ftdic:
198 ftdi_free(devc->ftdic); /* NOT free() or g_free()! */
199err_free_ftdi_buf:
200 g_free(devc->ftdi_buf);
201err_free_devc:
202 g_free(devc);
203err_free_nothing:
204
205 return NULL;
206}
207
208static GSList *dev_list(void)
209{
210 return ((struct drv_context *)(di->priv))->instances;
211}
212
213static void clear_helper(void *priv)
214{
215 struct dev_context *devc;
216
217 devc = priv;
218
219 ftdi_free(devc->ftdic);
220 g_free(devc->ftdi_buf);
221}
222
223static int dev_clear(void)
224{
225 return std_dev_clear(di, clear_helper);
226}
227
228static int cleanup(void)
229{
230 return dev_clear();
231}
232
233
234static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
235 const struct sr_channel_group *cg)
236{
237 struct dev_context *devc;
238
239 (void)cg;
240
241 if (!sdi)
242 return SR_ERR_ARG;
243
244 devc = sdi->priv;
245 switch (id) {
246 case SR_CONF_SAMPLERATE:
247 *data = g_variant_new_uint64(devc->cur_samplerate);
248 break;
249 case SR_CONF_CAPTURE_RATIO:
250 *data = g_variant_new_uint64(devc->capture_ratio);
251 break;
252 case SR_CONF_LIMIT_SAMPLES:
253 *data = g_variant_new_uint64(devc->limit_samples);
254 break;
255 case SR_CONF_PATTERN_MODE:
256 if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
257 *data = g_variant_new_string(STR_PATTERN_EXTERNAL);
258 else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
259 *data = g_variant_new_string(STR_PATTERN_INTERNAL);
260 else
261 *data = g_variant_new_string(STR_PATTERN_NONE);
262 break;
263 case SR_CONF_RLE:
264 *data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
265 break;
266 case SR_CONF_EXTERNAL_CLOCK:
267 *data = g_variant_new_boolean(devc->flag_reg & FLAG_CLOCK_EXTERNAL ? TRUE : FALSE);
268 break;
269 default:
270 return SR_ERR_NA;
271 }
272
273 return SR_OK;
274}
275
276static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi,
277 const struct sr_channel_group *cg)
278{
279 struct dev_context *devc;
280 uint16_t flag;
281 uint64_t tmp_u64;
282 int ret;
283 const char *stropt;
284
285 (void)cg;
286
287 if (sdi->status != SR_ST_ACTIVE)
288 return SR_ERR_DEV_CLOSED;
289
290 devc = sdi->priv;
291
292 switch (id) {
293 case SR_CONF_SAMPLERATE:
294 tmp_u64 = g_variant_get_uint64(data);
295 if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
296 return SR_ERR_SAMPLERATE;
297 ret = p_ols_set_samplerate(sdi, g_variant_get_uint64(data));
298 break;
299 case SR_CONF_LIMIT_SAMPLES:
300 tmp_u64 = g_variant_get_uint64(data);
301 if (tmp_u64 < MIN_NUM_SAMPLES)
302 return SR_ERR;
303 devc->limit_samples = tmp_u64;
304 ret = SR_OK;
305 break;
306 case SR_CONF_CAPTURE_RATIO:
307 devc->capture_ratio = g_variant_get_uint64(data);
308 if (devc->capture_ratio < 0 || devc->capture_ratio > 100) {
309 devc->capture_ratio = 0;
310 ret = SR_ERR;
311 } else
312 ret = SR_OK;
313 break;
314 case SR_CONF_EXTERNAL_CLOCK:
315 if (g_variant_get_boolean(data)) {
316 sr_info("Enabling external clock.");
317 devc->flag_reg |= FLAG_CLOCK_EXTERNAL;
318 } else {
319 sr_info("Disabled external clock.");
320 devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
321 }
322 ret = SR_OK;
323 break;
324 case SR_CONF_PATTERN_MODE:
325 stropt = g_variant_get_string(data, NULL);
326 ret = SR_OK;
327 flag = 0xffff;
328 if (!strcmp(stropt, STR_PATTERN_NONE)) {
329 sr_info("Disabling test modes.");
330 flag = 0x0000;
331 }else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
332 sr_info("Enabling internal test mode.");
333 flag = FLAG_INTERNAL_TEST_MODE;
334 } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
335 sr_info("Enabling external test mode.");
336 flag = FLAG_EXTERNAL_TEST_MODE;
337 } else {
338 ret = SR_ERR;
339 }
340 if (flag != 0xffff) {
341 devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE);
342 devc->flag_reg |= flag;
343 }
344 break;
345 case SR_CONF_SWAP:
346 if (g_variant_get_boolean(data)) {
347 sr_info("Enabling channel swapping.");
348 devc->flag_reg |= FLAG_SWAP_CHANNELS;
349 } else {
350 sr_info("Disabling channel swapping.");
351 devc->flag_reg &= ~FLAG_SWAP_CHANNELS;
352 }
353 ret = SR_OK;
354 break;
355
356 case SR_CONF_RLE:
357 if (g_variant_get_boolean(data)) {
358 sr_info("Enabling RLE.");
359 devc->flag_reg |= FLAG_RLE;
360 } else {
361 sr_info("Disabling RLE.");
362 devc->flag_reg &= ~FLAG_RLE;
363 }
364 ret = SR_OK;
365 break;
366 default:
367 ret = SR_ERR_NA;
368 }
369
370 return ret;
371}
372
373static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
374 const struct sr_channel_group *cg)
375{
376 struct dev_context *devc;
377 GVariant *gvar, *grange[2];
378 GVariantBuilder gvb;
379 int num_channels, i;
380
381 (void)cg;
382
383 switch (key) {
384 case SR_CONF_DEVICE_OPTIONS:
385 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
386 hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
387 break;
388 case SR_CONF_SAMPLERATE:
389 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
390 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
391 ARRAY_SIZE(samplerates), sizeof(uint64_t));
392 g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
393 *data = g_variant_builder_end(&gvb);
394 break;
395 case SR_CONF_TRIGGER_TYPE:
396 *data = g_variant_new_string(TRIGGER_TYPE);
397 break;
398 case SR_CONF_PATTERN_MODE:
399 *data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
400 break;
401 case SR_CONF_LIMIT_SAMPLES:
402 if (!sdi)
403 return SR_ERR_ARG;
404 devc = sdi->priv;
405 if (devc->flag_reg & FLAG_RLE)
406 return SR_ERR_NA;
b94cff40 407 if (devc->max_samplebytes == 0)
4bd80e12 408 /* Device didn't specify sample memory size in metadata. */
409 return SR_ERR_NA;
410 /*
411 * Channel groups are turned off if no channels in that group are
412 * enabled, making more room for samples for the enabled group.
413 */
414 p_ols_configure_channels(sdi);
415 num_channels = 0;
416 for (i = 0; i < 4; i++) {
417 if (devc->channel_mask & (0xff << (i * 8)))
418 num_channels++;
419 }
420 if (num_channels == 0) {
421 /* This can happen, but shouldn't cause too much drama.
422 * However we can't continue because the code below would
423 * divide by zero. */
424 break;
425 }
b94cff40 426 /* 3 channel groups takes as many bytes as 4 channel groups */
427 if (num_channels == 3)
428 num_channels = 4;
4bd80e12 429 grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
b94cff40 430 grange[1] = g_variant_new_uint64(devc->max_samplebytes / num_channels);
4bd80e12 431 *data = g_variant_new_tuple(grange, 2);
432 break;
433 default:
434 return SR_ERR_NA;
435 }
436
437 return SR_OK;
438}
439
440static int dev_open(struct sr_dev_inst *sdi)
441{
442 struct dev_context *devc;
4bd80e12 443
444 devc = sdi->priv;
445
446 if (p_ols_open(devc) != SR_OK) {
447 return SR_ERR;
448 } else {
449 sdi->status = SR_ST_ACTIVE;
450 return SR_OK;
451 }
452}
453
454static int dev_close(struct sr_dev_inst *sdi)
455{
456 int ret;
457 struct dev_context *devc;
458
459 ret = SR_OK;
460 devc = sdi->priv;
461
462 if (sdi->status == SR_ST_ACTIVE) {
463 sr_dbg("Status ACTIVE, closing device.");
464 ret = p_ols_close(devc);
465 } else {
466 sr_spew("Status not ACTIVE, nothing to do.");
467 }
468
469 sdi->status = SR_ST_INACTIVE;
470
471 return ret;
472}
473
474
475static int set_trigger(const struct sr_dev_inst *sdi, int stage)
476{
477 struct dev_context *devc;
478 uint8_t cmd, arg[4];
479
480 devc = sdi->priv;
481
482 cmd = CMD_SET_TRIGGER_MASK + stage * 4;
483 arg[0] = devc->trigger_mask[stage] & 0xff;
484 arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
485 arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
486 arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
487 if (write_longcommand(devc, cmd, arg) != SR_OK)
488 return SR_ERR;
489
490 cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
491 arg[0] = devc->trigger_value[stage] & 0xff;
492 arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
493 arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
494 arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
495 if (write_longcommand(devc, cmd, arg) != SR_OK)
496 return SR_ERR;
497
498 cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
499 arg[0] = arg[1] = arg[3] = 0x00;
500 arg[2] = stage;
501 if (stage == devc->num_stages)
502 /* Last stage, fire when this one matches. */
503 arg[3] |= TRIGGER_START;
504 if (write_longcommand(devc, cmd, arg) != SR_OK)
505 return SR_ERR;
506
1e0de846 507 cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
508 arg[0] = devc->trigger_edge[stage] & 0xff;
509 arg[1] = (devc->trigger_edge[stage] >> 8) & 0xff;
510 arg[2] = (devc->trigger_edge[stage] >> 16) & 0xff;
511 arg[3] = (devc->trigger_edge[stage] >> 24) & 0xff;
512 if (write_longcommand(devc, cmd, arg) != SR_OK)
513 return SR_ERR;
514
4bd80e12 515 return SR_OK;
516}
517
518static int dev_acquisition_start(const struct sr_dev_inst *sdi,
519 void *cb_data)
520{
521 struct dev_context *devc;
522 uint32_t samplecount, readcount, delaycount;
523 uint8_t changrp_mask, arg[4];
b94cff40 524 uint16_t flag_tmp;
525 int num_channels, samplespercount;
4bd80e12 526 int ret, i;
527
528 if (sdi->status != SR_ST_ACTIVE)
529 return SR_ERR_DEV_CLOSED;
530
531 devc = sdi->priv;
532
533 if (p_ols_configure_channels(sdi) != SR_OK) {
534 sr_err("Failed to configure channels.");
535 return SR_ERR;
536 }
537
538 /*
539 * Enable/disable channel groups in the flag register according to the
540 * channel mask. Calculate this here, because num_channels is needed
541 * to limit readcount.
542 */
543 changrp_mask = 0;
544 num_channels = 0;
545 for (i = 0; i < 4; i++) {
546 if (devc->channel_mask & (0xff << (i * 8))) {
547 changrp_mask |= (1 << i);
548 num_channels++;
549 }
550 }
b94cff40 551 /* 3 channel groups takes as many bytes as 4 channel groups */
552 if (num_channels == 3)
553 num_channels = 4;
554 /* maximum number of samples (or RLE counts) the buffer memory can hold */
555 devc->max_samples = devc->max_samplebytes / num_channels;
4bd80e12 556
557 /*
558 * Limit readcount to prevent reading past the end of the hardware
559 * buffer.
560 */
561 sr_dbg("max_samples = %d", devc->max_samples);
562 sr_dbg("limit_samples = %d", devc->limit_samples);
b94cff40 563 samplecount = MIN(devc->max_samples, devc->limit_samples);
4bd80e12 564 sr_dbg("Samplecount = %d", samplecount);
565
b94cff40 566 /* In demux mode the OLS is processing two samples per clock */
567 if (devc->flag_reg & FLAG_DEMUX) {
568 samplespercount = 8;
569 }
570 else {
571 samplespercount = 4;
572 }
573
574 readcount = samplecount / samplespercount;
575
4bd80e12 576 /* Rather read too many samples than too few. */
b94cff40 577 if (samplecount % samplespercount != 0)
4bd80e12 578 readcount++;
579
580 /* Basic triggers. */
581 if (devc->trigger_mask[0] != 0x00000000) {
582 /* At least one channel has a trigger on it. */
583 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
b94cff40 584 devc->trigger_at = (readcount - delaycount) * samplespercount - devc->num_stages;
4bd80e12 585 for (i = 0; i <= devc->num_stages; i++) {
586 sr_dbg("Setting stage %d trigger.", i);
587 if ((ret = set_trigger(sdi, i)) != SR_OK)
588 return ret;
589 }
590 } else {
591 /* No triggers configured, force trigger on first stage. */
592 sr_dbg("Forcing trigger at stage 0.");
593 if ((ret = set_trigger(sdi, 0)) != SR_OK)
594 return ret;
595 delaycount = readcount;
596 }
597
598 /* Samplerate. */
599 sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
600 devc->cur_samplerate, devc->cur_samplerate_divider);
601 arg[0] = devc->cur_samplerate_divider & 0xff;
602 arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
603 arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
604 arg[3] = 0x00;
605 if (write_longcommand(devc, CMD_SET_DIVIDER, arg) != SR_OK)
606 return SR_ERR;
607 /* Send extended sample limit and pre/post-trigger capture ratio. */
608 arg[0] = ((readcount - 1) & 0xff);
609 arg[1] = ((readcount - 1) & 0xff00) >> 8;
610 arg[2] = ((readcount - 1) & 0xff0000) >> 16;
611 arg[3] = ((readcount - 1) & 0xff000000) >> 24;
1e0de846 612 if (write_longcommand(devc, CMD_CAPTURE_DELAY, arg) != SR_OK)
4bd80e12 613 return SR_ERR;
614 arg[0] = ((delaycount - 1) & 0xff);
615 arg[1] = ((delaycount - 1) & 0xff00) >> 8;
616 arg[2] = ((delaycount - 1) & 0xff0000) >> 16;
617 arg[3] = ((delaycount - 1) & 0xff000000) >> 24;
1e0de846 618 if (write_longcommand(devc, CMD_CAPTURE_COUNT, arg) != SR_OK)
4bd80e12 619 return SR_ERR;
620 /* Flag register. */
621 sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
622 devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
623 devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
624 devc->flag_reg & FLAG_RLE ? "on" : "off",
625 devc->flag_reg & FLAG_FILTER ? "on": "off",
626 devc->flag_reg & FLAG_DEMUX ? "on" : "off");
627
b94cff40 628 /*
629 * Enable/disable OLS channel groups in the flag register according
630 * to the channel mask. 1 means "disable channel".
631 */
632 devc->flag_reg &= ~0x3c;
4bd80e12 633 devc->flag_reg |= ~(changrp_mask << 2) & 0x3c;
b94cff40 634 sr_dbg("flag_reg = %x", devc->flag_reg);
635
636 /*
637 * In demux mode the OLS is processing two 8-bit or 16-bit samples
638 * in parallel and for this to work the lower two bits of the four
639 * "channel_disable" bits must be replicated to the upper two bits.
640 */
641 flag_tmp = devc->flag_reg;
642 if (devc->flag_reg & FLAG_DEMUX) {
643 flag_tmp &= ~0x30;
644 flag_tmp |= ~(changrp_mask << 4) & 0x30;
645 }
646 arg[0] = flag_tmp & 0xff;
647 arg[1] = flag_tmp >> 8;
4bd80e12 648 arg[2] = arg[3] = 0x00;
649 if (write_longcommand(devc, CMD_SET_FLAGS, arg) != SR_OK)
650 return SR_ERR;
651
652 /* Start acquisition on the device. */
653 if (write_shortcommand(devc, CMD_RUN) != SR_OK)
654 return SR_ERR;
655
656 /* Reset all operational states. */
657 devc->rle_count = devc->num_transfers = 0;
658 devc->num_samples = devc->num_bytes = 0;
659 devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
660 memset(devc->sample, 0, 4);
661
662 /* Send header packet to the session bus. */
663 std_session_send_df_header(cb_data, LOG_PREFIX);
664
665 /* Hook up a dummy handler to receive data from the device. */
666 sr_source_add(-1, G_IO_IN, 0, p_ols_receive_data, (void *)sdi);
667
668 return SR_OK;
669}
670
671
672
673static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
674{
675 struct dev_context *devc;
676 struct sr_datafeed_packet packet;
677
678 devc = sdi->priv;
679
680 sr_dbg("Stopping acquisition.");
681 write_shortcommand(devc, CMD_RESET);
682 write_shortcommand(devc, CMD_RESET);
683 write_shortcommand(devc, CMD_RESET);
684 write_shortcommand(devc, CMD_RESET);
685 write_shortcommand(devc, CMD_RESET);
686
687 sr_source_remove(-1);
688
689 /* Send end packet to the session bus. */
690 sr_dbg("Sending SR_DF_END.");
691 packet.type = SR_DF_END;
692 sr_session_send(cb_data, &packet);
693
694 return SR_OK;
695}
696
697SR_PRIV struct sr_dev_driver p_ols_driver_info = {
698 .name = "p_ols",
699 .longname = "Pipistrello OLS",
700 .api_version = 1,
701 .init = init,
702 .cleanup = cleanup,
703 .scan = scan,
704 .dev_list = dev_list,
705 .dev_clear = dev_clear,
706 .config_get = config_get,
707 .config_set = config_set,
708 .config_list = config_list,
709 .dev_open = dev_open,
710 .dev_close = dev_close,
711 .dev_acquisition_start = dev_acquisition_start,
712 .dev_acquisition_stop = dev_acquisition_stop,
713 .priv = NULL,
714};
Hardware access and backend lib