]> sigrok.org Git - libsigrok.git/blame - src/hardware/motech-lps-30x/protocol.c
motech-lps-30x: fix several compiler warnings
[libsigrok.git] / src / hardware / motech-lps-30x / protocol.c
CommitLineData
41b7bd01
MH
1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2014 Matthias Heidbrink <m-sigrok@heidbrink.biz>
1c3d002b 5 * Copyright (C) 2014 Bert Vermeulen <bert@biot.com> (code from atten-pps3xxx)
41b7bd01
MH
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
6ec6c43b 21#include <config.h>
1c3d002b
MH
22#include <errno.h>
23#include <string.h>
41b7bd01
MH
24#include "protocol.h"
25
1c3d002b
MH
26/** Send data packets for current measurements. */
27static void send_data(struct sr_dev_inst *sdi)
28{
29 struct dev_context *devc;
30 struct sr_datafeed_packet packet;
ddfe99d9
UH
31 struct sr_datafeed_analog analog;
32 struct sr_analog_encoding encoding;
33 struct sr_analog_meaning meaning;
34 struct sr_analog_spec spec;
1c3d002b
MH
35 int i;
36 float data[MAX_CHANNELS];
37
38 devc = sdi->priv;
ddfe99d9 39 packet.type = SR_DF_ANALOG;
1c3d002b 40 packet.payload = &analog;
1c3d002b 41
869c8375 42 /* Note: digits/spec_digits will be overridden later. */
ddfe99d9
UH
43 sr_analog_init(&analog, &encoding, &meaning, &spec, 0);
44
45 analog.meaning->channels = sdi->channels;
46 analog.num_samples = 1;
47 analog.meaning->mq = SR_MQ_VOLTAGE;
48 analog.meaning->unit = SR_UNIT_VOLT;
49 analog.meaning->mqflags = SR_MQFLAG_DC;
bcaadb36
AJ
50 analog.encoding->digits = 3;
51 analog.spec->spec_digits = 2;
1c3d002b 52 analog.data = data;
ddfe99d9 53
1c3d002b 54 for (i = 0; i < devc->model->num_channels; i++)
ddfe99d9 55 ((float *)analog.data)[i] = devc->channel_status[i].output_voltage_last; /* Value always 3.3 or 5 for channel 3, if present! */
1c3d002b
MH
56 sr_session_send(sdi, &packet);
57
ddfe99d9
UH
58 analog.meaning->mq = SR_MQ_CURRENT;
59 analog.meaning->unit = SR_UNIT_AMPERE;
60 analog.meaning->mqflags = 0;
bcaadb36
AJ
61 analog.encoding->digits = 4;
62 analog.spec->spec_digits = 3;
1c3d002b
MH
63 analog.data = data;
64 for (i = 0; i < devc->model->num_channels; i++)
ddfe99d9 65 ((float *)analog.data)[i] = devc->channel_status[i].output_current_last; /* Value always 0 for channel 3, if present! */
1c3d002b
MH
66 sr_session_send(sdi, &packet);
67
8aafc5e6 68 sr_sw_limits_update_samples_read(&devc->limits, 1);
1c3d002b
MH
69}
70
71/** Process a complete line (without CR/LF) in buf. */
72static void process_line(struct sr_dev_inst *sdi)
73{
74 struct dev_context *devc;
1c3d002b
MH
75 double dbl;
76 int auxint;
77
78 devc = sdi->priv;
e4924d75
GS
79 if (!devc)
80 return;
1c3d002b
MH
81
82 switch (devc->acq_req_pending) {
83 case 0: /* Should not happen... */
84 break;
85 case 1: /* Waiting for data reply to request */
86 /* Convert numbers */
87 switch (devc->acq_req) {
93b118da
UH
88 case AQ_U1:
89 case AQ_U2:
90 case AQ_I1:
91 case AQ_I2:
e4924d75 92 dbl = 0.0;
4f0463a0 93 if (sr_atod_ascii(devc->buf, &dbl) != SR_OK) {
1c3d002b 94 sr_err("Failed to convert '%s' to double, errno=%d %s",
7237e912 95 devc->buf, errno, g_strerror(errno));
1c3d002b
MH
96 dbl = 0.0;
97 }
98 break;
99 case AQ_STATUS:
e4924d75 100 auxint = 0;
1c3d002b
MH
101 if (sr_atoi(devc->buf, &auxint) != SR_OK) {
102 sr_err("Failed to convert '%s' to int, errno=%d %s",
7237e912 103 devc->buf, errno, g_strerror(errno));
1c3d002b
MH
104 auxint = 0;
105 }
106 break;
107 default:
108 break;
109 }
110
111 switch (devc->acq_req) {
112 case AQ_U1:
113 devc->channel_status[0].output_voltage_last = dbl;
114 break;
115 case AQ_I1:
116 devc->channel_status[0].output_current_last = dbl;
117 break;
118 case AQ_U2:
119 devc->channel_status[1].output_voltage_last = dbl;
120 break;
121 case AQ_I2:
122 devc->channel_status[1].output_current_last = dbl;
123 break;
124 case AQ_STATUS: /* Process status and generate data. */
125 if (lps_process_status(sdi, auxint) == SR_OK) {
126 send_data(sdi);
127 }
128 break;
129 default:
130 break;
131 }
132
133 devc->acq_req_pending = 2;
134 break;
135 case 2: /* Waiting for OK after request */
136 if (strcmp(devc->buf, "OK")) {
137 sr_err("Unexpected reply while waiting for OK: '%s'", devc->buf);
138 }
139 devc->acq_req_pending = 0;
140 break;
141 }
142
143 devc->buf[0] = '\0';
144 devc->buflen = 0;
145}
146
41b7bd01
MH
147SR_PRIV int motech_lps_30x_receive_data(int fd, int revents, void *cb_data)
148{
1c3d002b 149 struct sr_dev_inst *sdi;
41b7bd01 150 struct dev_context *devc;
1c3d002b 151 struct sr_serial_dev_inst *serial;
1c3d002b 152 int len;
41b7bd01
MH
153
154 (void)fd;
155
156 if (!(sdi = cb_data))
157 return TRUE;
158
159 if (!(devc = sdi->priv))
160 return TRUE;
161
1c3d002b
MH
162 serial = sdi->conn;
163
164 if (revents == G_IO_IN) { /* Serial data arrived. */
165 while (LINELEN_MAX - devc->buflen - 2 > 0) {
e0501240 166 len = serial_read_nonblocking(serial, devc->buf + devc->buflen, 1);
1c3d002b
MH
167 if (len < 1)
168 break;
169
170 /* Eliminate whitespace at beginning of line. */
171 if (g_ascii_isspace(devc->buf[0])) {
172 devc->buf[0] = '\0';
173 devc->buflen = 0;
174 continue;
175 }
176
1c3d002b
MH
177 devc->buflen += len;
178 devc->buf[devc->buflen] = '\0';
179
180 /* If line complete, process msg. */
181 if ((devc->buflen > 0) && ((devc->buf[devc->buflen-1] == '\r') || devc->buf[devc->buflen-1] == '\n')) {
182 devc->buflen--;
183 devc->buf[devc->buflen] = '\0';
184
185 sr_spew("Line complete: \"%s\"", devc->buf);
186 process_line(sdi);
187 }
188 }
189 }
190
8aafc5e6 191 if (sr_sw_limits_check(&devc->limits))
d2f7c417 192 sr_dev_acquisition_stop(sdi);
1c3d002b 193
dc89faea
UH
194 /* Only request the next packet if required. */
195 if (!((sdi->status == SR_ST_ACTIVE) && (devc->acq_running)))
196 return TRUE;
197
198 if (devc->acq_req_pending) {
6433156c 199 int64_t elapsed_us = g_get_monotonic_time() - devc->req_sent_at;
dc89faea 200 if (elapsed_us > (REQ_TIMEOUT_MS * 1000)) {
6433156c
DE
201 sr_spew("Request timeout: req=%d t=%" PRIi64 "us",
202 (int)devc->acq_req, elapsed_us);
dc89faea 203 devc->acq_req_pending = 0;
1c3d002b 204 }
dc89faea
UH
205 }
206
207 if (devc->acq_req_pending == 0) {
208 switch (devc->acq_req) {
209 case AQ_NONE: /* Fall through */
210 case AQ_STATUS:
211 devc->acq_req = AQ_U1;
212 lps_send_req(serial, "VOUT1");
213 break;
214 case AQ_U1:
215 devc->acq_req = AQ_I1;
216 lps_send_req(serial, "IOUT1");
217 break;
218 case AQ_I1:
219 if (devc->model->num_channels == 1) {
1c3d002b
MH
220 devc->acq_req = AQ_STATUS;
221 lps_send_req(serial, "STATUS");
dc89faea
UH
222 } else {
223 devc->acq_req = AQ_U2;
224 lps_send_req(serial, "VOUT2");
1c3d002b 225 }
dc89faea
UH
226 break;
227 case AQ_U2:
228 devc->acq_req = AQ_I2;
229 lps_send_req(serial, "IOUT2");
230 break;
231 case AQ_I2:
232 devc->acq_req = AQ_STATUS;
233 lps_send_req(serial, "STATUS");
234 break;
235 default:
236 sr_err("Illegal devc->acq_req=%d", devc->acq_req);
237 return SR_ERR;
1c3d002b 238 }
dc89faea
UH
239 devc->req_sent_at = g_get_real_time();
240 devc->acq_req_pending = 1;
41b7bd01
MH
241 }
242
243 return TRUE;
244}