[libsigrok.git] / src / hardware / maynuo-m97 / protocol.h

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2015 Aurelien Jacobs <aurel@gnuage.org>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#ifndef LIBSIGROK_HARDWARE_MAYNUO_M97_PROTOCOL_H
#define LIBSIGROK_HARDWARE_MAYNUO_M97_PROTOCOL_H

#include <stdint.h>
#include <libsigrok/libsigrok.h>
#include "libsigrok-internal.h"

#define LOG_PREFIX "maynuo-m97"

struct maynuo_m97_model {
	unsigned int id;
	const char *name;
	unsigned int max_current;
	unsigned int max_voltage;
	unsigned int max_power;
};

/** Private, per-device-instance driver context. */
struct dev_context {
	/* Model-specific information */
	const struct maynuo_m97_model *model;

	/* Acquisition settings */
	uint64_t limit_samples;
	uint64_t limit_msec;

	/* Operational state */
	uint64_t num_samples;
	int64_t starttime;
	int expecting_registers;
};

enum maynuo_m97_coil {
	PC1        = 0x0500,
	PC2        = 0X0501,
	TRIG       = 0x0502,
	REMOTE     = 0x0503,
	ISTATE     = 0x0510,
	TRACK      = 0x0511,
	MEMORY     = 0x0512,
	VOICEEN    = 0x0513,
	CONNECT    = 0x0514,
	ATEST      = 0x0515,
	ATESTUN    = 0x0516,
	ATESTPASS  = 0x0517,
	IOVER      = 0x0520,
	UOVER      = 0x0521,
	POVER      = 0x0522,
	HEAT       = 0x0523,
	REVERSE    = 0x0524,
	UNREG      = 0x0525,
	ERREP      = 0x0526,
	ERRCAL     = 0x0527,
};

enum maynuo_m97_register {
	CMD        = 0x0A00,
	IFIX       = 0x0A01,
	UFIX       = 0x0A03,
	PFIX       = 0x0A05,
	RFIX       = 0x0A07,
	TMCCS      = 0x0A09,
	TMCVS      = 0x0A0B,
	UCCONSET   = 0x0A0D,
	UCCOFFSET  = 0x0A0F,
	UCVONSET   = 0x0A11,
	UCVOFFSET  = 0x0A13,
	UCPONSET   = 0x0A15,
	UCPOFFSET  = 0x0A17,
	UCRONSET   = 0x0A19,
	UCROFFSET  = 0x0A1B,
	UCCCV      = 0x0A1D,
	UCRCV      = 0x0A1F,
	IA         = 0x0A21,
	IB         = 0x0A23,
	TMAWD      = 0x0A25,
	TMBWD      = 0x0A27,
	TMTRANSRIS = 0x0A29,
	TMTRANSFAL = 0x0A2B,
	MODETRAN   = 0x0A2D,
	UBATTEND   = 0x0A2E,
	BATT       = 0x0A30,
	SERLIST    = 0x0A32,
	SERATEST   = 0x0A33,
	IMAX       = 0x0A34,
	UMAX       = 0x0A36,
	PMAX       = 0x0A38,
	ILCAL      = 0x0A3A,
	IHCAL      = 0x0A3C,
	ULCAL      = 0x0A3E,
	UHCAL      = 0x0A40,
	TAGSCAL    = 0x0A42,
	U          = 0x0B00,
	I          = 0x0B02,
	SETMODE    = 0x0B04,
	INPUTMODE  = 0x0B05,
	MODEL      = 0x0B06,
	EDITION    = 0x0B07,
};

enum maynuo_m97_mode {
	CC            =  1,
	CV            =  2,
	CW            =  3,
	CR            =  4,
	CC_SOFT_START = 20,
	DYNAMIC       = 25,
	SHORT_CIRCUIT = 26,
	LIST          = 27,
	CC_L_AND_UL   = 30,
	CV_L_AND_UL   = 31,
	CW_L_AND_UL   = 32,
	CR_L_AND_UL   = 33,
	CC_TO_CV      = 34,
	CR_TO_CV      = 36,
	BATTERY_TEST  = 38,
	CV_SOFT_START = 39,
	SYSTEM_PARAM  = 41,
	INPUT_ON      = 42,
	INPUT_OFF     = 43,
};

SR_PRIV int maynuo_m97_get_bit(struct sr_modbus_dev_inst *modbus,
		enum maynuo_m97_coil address, int *value);
SR_PRIV int maynuo_m97_set_bit(struct sr_modbus_dev_inst *modbus,
		enum maynuo_m97_coil address, int value);
SR_PRIV int maynuo_m97_get_float(struct sr_modbus_dev_inst *modbus,
		enum maynuo_m97_register address, float *value);
SR_PRIV int maynuo_m97_set_float(struct sr_modbus_dev_inst *modbus,
		enum maynuo_m97_register address, float value);

SR_PRIV int maynuo_m97_get_mode(struct sr_modbus_dev_inst *modbus,
		enum maynuo_m97_mode *mode);
SR_PRIV int maynuo_m97_set_mode(struct sr_modbus_dev_inst *modbus,
		enum maynuo_m97_mode mode);
SR_PRIV int maynuo_m97_set_input(struct sr_modbus_dev_inst *modbus, int enable);
SR_PRIV int maynuo_m97_get_model_version(struct sr_modbus_dev_inst *modbus,
		uint16_t *model, uint16_t *version);

SR_PRIV const char *maynuo_m97_mode_to_str(enum maynuo_m97_mode mode);

SR_PRIV int maynuo_m97_capture_start(const struct sr_dev_inst *sdi);
SR_PRIV int maynuo_m97_receive_data(int fd, int revents, void *cb_data);

#endif
Commit	Line	Data
e1ccfb19 AJ	1	/*
	2	* This file is part of the libsigrok project.
	3	*
	4	* Copyright (C) 2015 Aurelien Jacobs <aurel@gnuage.org>
	5	*
	6	* This program is free software: you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation, either version 3 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
	20	#ifndef LIBSIGROK_HARDWARE_MAYNUO_M97_PROTOCOL_H
	21	#define LIBSIGROK_HARDWARE_MAYNUO_M97_PROTOCOL_H
	22
	23	#include <stdint.h>
c1aae900	24	#include <libsigrok/libsigrok.h>
e1ccfb19 AJ	25	#include "libsigrok-internal.h"
	26
	27	#define LOG_PREFIX "maynuo-m97"
	28
ffb580cf AJ	29	struct maynuo_m97_model {
	30	unsigned int id;
	31	const char *name;
	32	unsigned int max_current;
	33	unsigned int max_voltage;
	34	unsigned int max_power;
	35	};
	36
e1ccfb19 AJ	37	/** Private, per-device-instance driver context. */
	38	struct dev_context {
	39	/* Model-specific information */
ffb580cf	40	const struct maynuo_m97_model *model;
e1ccfb19 AJ	41
e1ccfb19 AJ	42	/* Acquisition settings */
ffb580cf AJ	43	uint64_t limit_samples;
ffb580cf AJ	44	uint64_t limit_msec;
e1ccfb19 AJ	45
e1ccfb19 AJ	46	/* Operational state */
ffb580cf AJ	47	uint64_t num_samples;
	48	int64_t starttime;
	49	int expecting_registers;
	50	};
e1ccfb19	51
ffb580cf AJ	52	enum maynuo_m97_coil {
	53	PC1 = 0x0500,
	54	PC2 = 0X0501,
	55	TRIG = 0x0502,
	56	REMOTE = 0x0503,
	57	ISTATE = 0x0510,
	58	TRACK = 0x0511,
	59	MEMORY = 0x0512,
	60	VOICEEN = 0x0513,
	61	CONNECT = 0x0514,
	62	ATEST = 0x0515,
	63	ATESTUN = 0x0516,
	64	ATESTPASS = 0x0517,
	65	IOVER = 0x0520,
	66	UOVER = 0x0521,
	67	POVER = 0x0522,
	68	HEAT = 0x0523,
	69	REVERSE = 0x0524,
	70	UNREG = 0x0525,
	71	ERREP = 0x0526,
	72	ERRCAL = 0x0527,
	73	};
e1ccfb19	74
ffb580cf AJ	75	enum maynuo_m97_register {
	76	CMD = 0x0A00,
	77	IFIX = 0x0A01,
	78	UFIX = 0x0A03,
	79	PFIX = 0x0A05,
	80	RFIX = 0x0A07,
	81	TMCCS = 0x0A09,
	82	TMCVS = 0x0A0B,
	83	UCCONSET = 0x0A0D,
	84	UCCOFFSET = 0x0A0F,
	85	UCVONSET = 0x0A11,
	86	UCVOFFSET = 0x0A13,
	87	UCPONSET = 0x0A15,
	88	UCPOFFSET = 0x0A17,
	89	UCRONSET = 0x0A19,
	90	UCROFFSET = 0x0A1B,
	91	UCCCV = 0x0A1D,
	92	UCRCV = 0x0A1F,
	93	IA = 0x0A21,
	94	IB = 0x0A23,
	95	TMAWD = 0x0A25,
	96	TMBWD = 0x0A27,
	97	TMTRANSRIS = 0x0A29,
	98	TMTRANSFAL = 0x0A2B,
	99	MODETRAN = 0x0A2D,
	100	UBATTEND = 0x0A2E,
	101	BATT = 0x0A30,
	102	SERLIST = 0x0A32,
	103	SERATEST = 0x0A33,
	104	IMAX = 0x0A34,
	105	UMAX = 0x0A36,
	106	PMAX = 0x0A38,
	107	ILCAL = 0x0A3A,
	108	IHCAL = 0x0A3C,
	109	ULCAL = 0x0A3E,
	110	UHCAL = 0x0A40,
	111	TAGSCAL = 0x0A42,
	112	U = 0x0B00,
	113	I = 0x0B02,
	114	SETMODE = 0x0B04,
	115	INPUTMODE = 0x0B05,
	116	MODEL = 0x0B06,
	117	EDITION = 0x0B07,
e1ccfb19 AJ	118	};
e1ccfb19 AJ	119
ffb580cf AJ	120	enum maynuo_m97_mode {
	121	CC = 1,
	122	CV = 2,
	123	CW = 3,
	124	CR = 4,
	125	CC_SOFT_START = 20,
	126	DYNAMIC = 25,
	127	SHORT_CIRCUIT = 26,
	128	LIST = 27,
	129	CC_L_AND_UL = 30,
	130	CV_L_AND_UL = 31,
	131	CW_L_AND_UL = 32,
	132	CR_L_AND_UL = 33,
	133	CC_TO_CV = 34,
	134	CR_TO_CV = 36,
	135	BATTERY_TEST = 38,
	136	CV_SOFT_START = 39,
	137	SYSTEM_PARAM = 41,
	138	INPUT_ON = 42,
	139	INPUT_OFF = 43,
	140	};
	141
	142	SR_PRIV int maynuo_m97_get_bit(struct sr_modbus_dev_inst *modbus,
	143	enum maynuo_m97_coil address, int *value);
	144	SR_PRIV int maynuo_m97_set_bit(struct sr_modbus_dev_inst *modbus,
	145	enum maynuo_m97_coil address, int value);
	146	SR_PRIV int maynuo_m97_get_float(struct sr_modbus_dev_inst *modbus,
	147	enum maynuo_m97_register address, float *value);
	148	SR_PRIV int maynuo_m97_set_float(struct sr_modbus_dev_inst *modbus,
	149	enum maynuo_m97_register address, float value);
	150
	151	SR_PRIV int maynuo_m97_get_mode(struct sr_modbus_dev_inst *modbus,
	152	enum maynuo_m97_mode *mode);
	153	SR_PRIV int maynuo_m97_set_mode(struct sr_modbus_dev_inst *modbus,
	154	enum maynuo_m97_mode mode);
	155	SR_PRIV int maynuo_m97_set_input(struct sr_modbus_dev_inst *modbus, int enable);
	156	SR_PRIV int maynuo_m97_get_model_version(struct sr_modbus_dev_inst *modbus,
	157	uint16_t model, uint16_t version);
	158
	159	SR_PRIV const char *maynuo_m97_mode_to_str(enum maynuo_m97_mode mode);
	160
	161	SR_PRIV int maynuo_m97_capture_start(const struct sr_dev_inst *sdi);
e1ccfb19 AJ	162	SR_PRIV int maynuo_m97_receive_data(int fd, int revents, void *cb_data);
	163
	164	#endif