[libsigrok.git] / src / hardware / itech-it8500 / protocol.h

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2020 Timo Kokkonen <tjko@iki.fi>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#ifndef LIBSIGROK_HARDWARE_ITECH_IT8500_PROTOCOL_H
#define LIBSIGROK_HARDWARE_ITECH_IT8500_PROTOCOL_H

#include <stdint.h>
#include <glib.h>
#include <libsigrok/libsigrok.h>
#include "libsigrok-internal.h"

#define LOG_PREFIX "itech-it8500"

/*
 * Unit uses 26 byte binary packets for communications.
 * Packets have fixed format:
 *
 * Offset|Length|Description
 * ------|------|-------------------------------------
 *     0 |    1 | Preable (always set to 0xAA).
 *     1 |    1 | Unit Address (0-254, 255=broadcast).
 *     2 |    1 | Command number.
 *     3 |   22 | Variable data.
 *    25 |    1 | Parity code (checksum).
 */
#define IT8500_HEADER_LEN 3
#define IT8500_DATA_LEN 22
#define IT8500_PACKET_LEN (IT8500_HEADER_LEN + IT8500_DATA_LEN + 1)

/*
 * Data structure to track commands and reponses.
 */
struct itech_it8500_cmd_packet {
	uint8_t command; /* Command number. */
	uint8_t address; /* Unit address: 0..254 (255 = broadcast). */
	uint8_t data[IT8500_DATA_LEN]; /* Command/Response data. */
};

#define IT8500_PREAMBLE 0xaa

/*
 * Operating modes.
 * Note! These map directly to mode numbers used in CMD_SET_MODE
 * and CMD_GET_MODE commands, so values are manually defined below.
 */
enum itech_it8500_modes {
	CC = 0,
	CV = 1,
	CW = 2,
	CR = 3,
	IT8500_MODES, /* Total count, for internal use. */
};

enum itech_it8500_command {
	CMD_GET_LOAD_LIMITS = 0x01,
	CMD_SET_HW_OPP_VALUE = 0x02,
	CMD_GET_HW_OPP_VALUE = 0x03,
	CMD_SET_VON_MODE = 0x0e,
	CMD_GET_VON_MODE = 0x0f,
	CMD_SET_VON_VALUE = 0x10,
	CMD_GET_VON_VALUE = 0x11,
	CMD_RESPONSE = 0x12, /* Response to commands not returning any data. */
	CMD_SET_REMOTE_MODE = 0x20,
	CMD_LOAD_ON_OFF = 0x21,
	CMD_SET_MAX_VOLTAGE = 0x22,
	CMD_GET_MAX_VOLTAGE = 0x23,
	CMD_SET_MAX_CURRENT = 0x24,
	CMD_GET_MAX_CURRENT = 0x25,
	CMD_SET_MAX_POWER = 0x26,
	CMD_GET_MAX_POWER = 0x27,
	CMD_SET_MODE = 0x28,
	CMD_GET_MODE = 0x29,
	CMD_SET_CC_CURRENT = 0x2a,
	CMD_GET_CC_CURRENT = 0x2b,
	CMD_SET_CV_VOLTAGE = 0x2c,
	CMD_GET_CV_VOLTAGE = 0x2d,
	CMD_SET_CW_POWER = 0x2e,
	CMD_GET_CW_POWER = 0x2f,
	CMD_SET_CR_RESISTANCE = 0x30,
	CMD_GET_CR_RESISTANCE = 0x31,
	CMD_SET_BATTERY_MIN_VOLTAGE = 0x4e,
	CMD_GET_BATTERY_MIN_VOLTAGE = 0x4f,
	CMD_SET_LOAD_ON_TIMER = 0x50,
	CMD_GET_LOAD_ON_TIMER = 0x51,
	CMD_LOAD_ON_TIMER = 0x52,
	CMD_LOAD_ON_TIME_STATUS = 0x53,
	CMD_SET_ADDRESS = 0x54,
	CMD_LOCAL_CONTROL = 0x55,
	CMD_REMOTE_SENSING = 0x56,
	CMD_REMOTE_SENSING_STATUS = 0x57,
	CMD_SET_TRIGGER_SOURCE = 0x58,
	CMD_GET_TRIGGER_SOURCE = 0x59,
	CMD_TRIGGER = 0x5a,
	CMD_SAVE_SETTINGS = 0x5b,
	CMD_LOAD_SETTINGS = 0x5c,
	CMD_SET_FUNCTION = 0x5d,
	CMD_GET_FUNCTION = 0x5e,
	CMD_GET_STATE = 0x5f,
	CMD_GET_MODEL_INFO = 0x6a,
	CMD_GET_BARCODE_INFO = 0x6b,
	CMD_SET_OCP_VALUE = 0x80,
	CMD_GET_OCP_VALUE = 0x81,
	CMD_SET_OCP_DELAY = 0x82,
	CMD_GET_OCP_DELAY = 0x83,
	CMD_ENABLE_OCP = 0x84,
	CMD_DISABLE_OCP = 0x85,
	CMD_SET_OPP_VALUE = 0x86,
	CMD_GET_OPP_VALUE = 0x87,
	CMD_SET_OPP_DELAY = 0x88,
	CMD_GET_OPP_DELAY = 0x89,
};

/* Status packet status byte values. */
enum itech_it8500_status_code {
	STS_COMMAND_SUCCESSFUL = 0x80,
	STS_INVALID_CHECKSUM = 0x90,
	STS_INVALID_PARAMETER = 0xa0,
	STS_UNKNOWN_COMMAND = 0xb0,
	STS_INVALID_COMMAND = 0xc0,
};

/*
 * "Operation state" register flags.
 */
#define OS_CAL_FLAG   (1UL << 0)
#define OS_WTG_FLAG   (1UL << 1)
#define OS_REM_FLAG   (1UL << 2)
#define OS_OUT_FLAG   (1UL << 3)
#define OS_LOCAL_FLAG (1UL << 4)
#define OS_SENSE_FLAG (1UL << 5)
#define OS_LOT_FLAG   (1UL << 6)

/*
 * "Demand state" register flags.
 */
#define DS_RV_FLAG      (1UL << 0)
#define DS_OV_FLAG      (1UL << 1)
#define DS_OC_FLAG      (1UL << 2)
#define DS_OP_FLAG      (1UL << 3)
#define DS_OT_FLAG      (1UL << 4)
#define DS_SV_FLAG      (1UL << 5)
#define DS_CC_MODE_FLAG (1UL << 6)
#define DS_CV_MODE_FLAG (1UL << 7)
#define DS_CW_MODE_FLAG (1UL << 8)
#define DS_CR_MODE_FLAG (1UL << 9)

#define IT8500_MAX_MODEL_NAME_LEN 5

struct dev_context {
	char model[IT8500_MAX_MODEL_NAME_LEN + 1];
	uint8_t fw_ver_major;
	uint8_t fw_ver_minor;
	uint8_t address;
	double max_current;
	double min_voltage;
	double max_voltage;
	double max_power;
	double min_resistance;
	double max_resistance;
	size_t max_sample_rate_idx;

	double voltage;
	double current;
	double power;
	uint8_t operation_state;
	uint16_t demand_state;
	enum itech_it8500_modes mode;
	gboolean load_on;

	uint64_t sample_rate;
	struct sr_sw_limits limits;

	GMutex mutex;
};

SR_PRIV uint8_t itech_it8500_checksum(const uint8_t *packet);
SR_PRIV const char *itech_it8500_mode_to_string(enum itech_it8500_modes mode);
SR_PRIV int itech_it8500_string_to_mode(const char *modename,
		enum itech_it8500_modes *mode);
SR_PRIV int itech_it8500_send_cmd(struct sr_serial_dev_inst *serial,
		struct itech_it8500_cmd_packet *cmd,
		struct itech_it8500_cmd_packet **response);
SR_PRIV int itech_it8500_cmd(const struct sr_dev_inst *sdi,
		struct itech_it8500_cmd_packet *cmd,
		struct itech_it8500_cmd_packet **response);
SR_PRIV void itech_it8500_status_change(const struct sr_dev_inst *sdi,
		uint8_t old_op, uint8_t new_op,
		uint16_t old_de, uint16_t new_de,
		enum itech_it8500_modes old_m, enum itech_it8500_modes new_m);
SR_PRIV int itech_it8500_get_status(const struct sr_dev_inst *sdi);
SR_PRIV int itech_it8500_get_int(const struct sr_dev_inst *sdi,
		enum itech_it8500_command command, int *result);
SR_PRIV void itech_it8500_channel_send_value(const struct sr_dev_inst *sdi,
		struct sr_channel *ch, double value, enum sr_mq mq,
		enum sr_mqflag mqflags, enum sr_unit unit, int digits);
SR_PRIV int itech_it8500_receive_data(int fd, int revents, void *cb_data);

#endif
Commit	Line	Data
c16effae TK	1	/*
	2	* This file is part of the libsigrok project.
	3	*
	4	* Copyright (C) 2020 Timo Kokkonen <tjko@iki.fi>
	5	*
	6	* This program is free software: you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation, either version 3 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
	20	#ifndef LIBSIGROK_HARDWARE_ITECH_IT8500_PROTOCOL_H
	21	#define LIBSIGROK_HARDWARE_ITECH_IT8500_PROTOCOL_H
	22
	23	#include <stdint.h>
	24	#include <glib.h>
	25	#include <libsigrok/libsigrok.h>
	26	#include "libsigrok-internal.h"
	27
	28	#define LOG_PREFIX "itech-it8500"
	29
f21b6983 TK	30	/*
	31	* Unit uses 26 byte binary packets for communications.
	32	* Packets have fixed format:
	33	*
	34	* Offset\|Length\|Description
	35	* ------\|------\|-------------------------------------
	36	* 0 \| 1 \| Preable (always set to 0xAA).
	37	* 1 \| 1 \| Unit Address (0-254, 255=broadcast).
	38	* 2 \| 1 \| Command number.
	39	* 3 \| 22 \| Variable data.
	40	* 25 \| 1 \| Parity code (checksum).
	41	*/
	42	#define IT8500_HEADER_LEN 3
	43	#define IT8500_DATA_LEN 22
	44	#define IT8500_PACKET_LEN (IT8500_HEADER_LEN + IT8500_DATA_LEN + 1)
	45
8c8fff47 GS	46	/*
	47	* Data structure to track commands and reponses.
	48	*/
	49	struct itech_it8500_cmd_packet {
	50	uint8_t command; /* Command number. */
	51	uint8_t address; /* Unit address: 0..254 (255 = broadcast). */
	52	uint8_t data[IT8500_DATA_LEN]; /* Command/Response data. */
	53	};
f21b6983	54
8c8fff47	55	#define IT8500_PREAMBLE 0xaa
f21b6983 TK	56
	57	/*
	58	* Operating modes.
	59	* Note! These map directly to mode numbers used in CMD_SET_MODE
	60	* and CMD_GET_MODE commands, so values are manually defined below.
	61	*/
	62	enum itech_it8500_modes {
	63	CC = 0,
	64	CV = 1,
	65	CW = 2,
	66	CR = 3,
	67	IT8500_MODES, /* Total count, for internal use. */
	68	};
	69
	70	enum itech_it8500_command {
	71	CMD_GET_LOAD_LIMITS = 0x01,
	72	CMD_SET_HW_OPP_VALUE = 0x02,
	73	CMD_GET_HW_OPP_VALUE = 0x03,
	74	CMD_SET_VON_MODE = 0x0e,
	75	CMD_GET_VON_MODE = 0x0f,
	76	CMD_SET_VON_VALUE = 0x10,
	77	CMD_GET_VON_VALUE = 0x11,
	78	CMD_RESPONSE = 0x12, /* Response to commands not returning any data. */
	79	CMD_SET_REMOTE_MODE = 0x20,
	80	CMD_LOAD_ON_OFF = 0x21,
	81	CMD_SET_MAX_VOLTAGE = 0x22,
	82	CMD_GET_MAX_VOLTAGE = 0x23,
	83	CMD_SET_MAX_CURRENT = 0x24,
	84	CMD_GET_MAX_CURRENT = 0x25,
	85	CMD_SET_MAX_POWER = 0x26,
	86	CMD_GET_MAX_POWER = 0x27,
	87	CMD_SET_MODE = 0x28,
	88	CMD_GET_MODE = 0x29,
	89	CMD_SET_CC_CURRENT = 0x2a,
	90	CMD_GET_CC_CURRENT = 0x2b,
	91	CMD_SET_CV_VOLTAGE = 0x2c,
	92	CMD_GET_CV_VOLTAGE = 0x2d,
	93	CMD_SET_CW_POWER = 0x2e,
	94	CMD_GET_CW_POWER = 0x2f,
	95	CMD_SET_CR_RESISTANCE = 0x30,
	96	CMD_GET_CR_RESISTANCE = 0x31,
	97	CMD_SET_BATTERY_MIN_VOLTAGE = 0x4e,
	98	CMD_GET_BATTERY_MIN_VOLTAGE = 0x4f,
	99	CMD_SET_LOAD_ON_TIMER = 0x50,
	100	CMD_GET_LOAD_ON_TIMER = 0x51,
	101	CMD_LOAD_ON_TIMER = 0x52,
	102	CMD_LOAD_ON_TIME_STATUS = 0x53,
	103	CMD_SET_ADDRESS = 0x54,
	104	CMD_LOCAL_CONTROL = 0x55,
	105	CMD_REMOTE_SENSING = 0x56,
	106	CMD_REMOTE_SENSING_STATUS = 0x57,
	107	CMD_SET_TRIGGER_SOURCE = 0x58,
	108	CMD_GET_TRIGGER_SOURCE = 0x59,
	109	CMD_TRIGGER = 0x5a,
	110	CMD_SAVE_SETTINGS = 0x5b,
	111	CMD_LOAD_SETTINGS = 0x5c,
	112	CMD_SET_FUNCTION = 0x5d,
	113	CMD_GET_FUNCTION = 0x5e,
	114	CMD_GET_STATE = 0x5f,
	115	CMD_GET_MODEL_INFO = 0x6a,
	116	CMD_GET_BARCODE_INFO = 0x6b,
	117	CMD_SET_OCP_VALUE = 0x80,
	118	CMD_GET_OCP_VALUE = 0x81,
	119	CMD_SET_OCP_DELAY = 0x82,
120	CMD_GET_OCP_DELAY = 0x83,
121	CMD_ENABLE_OCP = 0x84,
122	CMD_DISABLE_OCP = 0x85,
123	CMD_SET_OPP_VALUE = 0x86,
124	CMD_GET_OPP_VALUE = 0x87,
125	CMD_SET_OPP_DELAY = 0x88,
126	CMD_GET_OPP_DELAY = 0x89,
127	};
128
8c8fff47 GS	129	/* Status packet status byte values. */
	130	enum itech_it8500_status_code {
	131	STS_COMMAND_SUCCESSFUL = 0x80,
	132	STS_INVALID_CHECKSUM = 0x90,
	133	STS_INVALID_PARAMETER = 0xa0,
	134	STS_UNKNOWN_COMMAND = 0xb0,
	135	STS_INVALID_COMMAND = 0xc0,
f21b6983 TK	136	};
	137
	138	/*
	139	* "Operation state" register flags.
	140	*/
8c8fff47 GS	141	#define OS_CAL_FLAG (1UL << 0)
	142	#define OS_WTG_FLAG (1UL << 1)
	143	#define OS_REM_FLAG (1UL << 2)
	144	#define OS_OUT_FLAG (1UL << 3)
	145	#define OS_LOCAL_FLAG (1UL << 4)
	146	#define OS_SENSE_FLAG (1UL << 5)
	147	#define OS_LOT_FLAG (1UL << 6)
f21b6983 TK	148
	149	/*
	150	* "Demand state" register flags.
	151	*/
8c8fff47 GS	152	#define DS_RV_FLAG (1UL << 0)
	153	#define DS_OV_FLAG (1UL << 1)
	154	#define DS_OC_FLAG (1UL << 2)
	155	#define DS_OP_FLAG (1UL << 3)
	156	#define DS_OT_FLAG (1UL << 4)
	157	#define DS_SV_FLAG (1UL << 5)
	158	#define DS_CC_MODE_FLAG (1UL << 6)
	159	#define DS_CV_MODE_FLAG (1UL << 7)
	160	#define DS_CW_MODE_FLAG (1UL << 8)
	161	#define DS_CR_MODE_FLAG (1UL << 9)
	162
	163	#define IT8500_MAX_MODEL_NAME_LEN 5
f21b6983	164
c16effae	165	struct dev_context {
f21b6983 TK	166	char model[IT8500_MAX_MODEL_NAME_LEN + 1];
	167	uint8_t fw_ver_major;
	168	uint8_t fw_ver_minor;
	169	uint8_t address;
	170	double max_current;
	171	double min_voltage;
	172	double max_voltage;
	173	double max_power;
	174	double min_resistance;
	175	double max_resistance;
	176	size_t max_sample_rate_idx;
	177
	178	double voltage;
	179	double current;
	180	double power;
	181	uint8_t operation_state;
	182	uint16_t demand_state;
	183	enum itech_it8500_modes mode;
	184	gboolean load_on;
	185
	186	uint64_t sample_rate;
	187	struct sr_sw_limits limits;
	188
	189	GMutex mutex;
c16effae TK	190	};
c16effae TK	191
f21b6983 TK	192	SR_PRIV uint8_t itech_it8500_checksum(const uint8_t *packet);
	193	SR_PRIV const char *itech_it8500_mode_to_string(enum itech_it8500_modes mode);
	194	SR_PRIV int itech_it8500_string_to_mode(const char *modename,
	195	enum itech_it8500_modes *mode);
	196	SR_PRIV int itech_it8500_send_cmd(struct sr_serial_dev_inst *serial,
	197	struct itech_it8500_cmd_packet *cmd,
	198	struct itech_it8500_cmd_packet **response);
	199	SR_PRIV int itech_it8500_cmd(const struct sr_dev_inst *sdi,
	200	struct itech_it8500_cmd_packet *cmd,
	201	struct itech_it8500_cmd_packet **response);
	202	SR_PRIV void itech_it8500_status_change(const struct sr_dev_inst *sdi,
	203	uint8_t old_op, uint8_t new_op,
	204	uint16_t old_de, uint16_t new_de,
	205	enum itech_it8500_modes old_m, enum itech_it8500_modes new_m);
	206	SR_PRIV int itech_it8500_get_status(const struct sr_dev_inst *sdi);
	207	SR_PRIV int itech_it8500_get_int(const struct sr_dev_inst *sdi,
	208	enum itech_it8500_command command, int *result);
	209	SR_PRIV void itech_it8500_channel_send_value(const struct sr_dev_inst *sdi,
	210	struct sr_channel *ch, double value, enum sr_mq mq,
24be1e05	211	enum sr_mqflag mqflags, enum sr_unit unit, int digits);
c16effae TK	212	SR_PRIV int itech_it8500_receive_data(int fd, int revents, void *cb_data);
	213
	214	#endif