]> sigrok.org Git - libsigrok.git/blame - src/hardware/hantek-4032l/api.c
hantek-4032l: Add initial driver implementation.
[libsigrok.git] / src / hardware / hantek-4032l / api.c
CommitLineData
6a25fa42
AZ
1/*
2 * This file is part of the libsigrok project.
3 *
5089a143
AZ
4 * Copyright (C) 2016 Andreas Zschunke <andreas.zschunke@gmx.net>
5 * Copyright (C) 2017 Andrej Valek <andy@skyrain.eu>
6 * Copyright (C) 2017 Uwe Hermann <uwe@hermann-uwe.de>
6a25fa42
AZ
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <config.h>
23#include "protocol.h"
24
5089a143
AZ
25#define USB_INTERFACE 0
26#define NUM_CHANNELS 32
6a25fa42 27
5089a143
AZ
28static const uint32_t scanopts[] = {
29 SR_CONF_CONN,
30};
31
32static const uint32_t drvopts[] = {
33 SR_CONF_LOGIC_ANALYZER,
34};
35
36static const uint32_t devopts[] = {
37 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
38 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
39 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
40 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
41 SR_CONF_CONN | SR_CONF_GET,
42 SR_CONF_VOLTAGE_THRESHOLD | SR_CONF_SET | SR_CONF_LIST,
43};
44
45static const int32_t trigger_matches[] = {
46 SR_TRIGGER_ZERO,
47 SR_TRIGGER_ONE,
48 SR_TRIGGER_RISING,
49 SR_TRIGGER_FALLING,
50 SR_TRIGGER_EDGE,
51};
52
53static const uint64_t samplerates[] = {
54 SR_KHZ(1),
55 SR_KHZ(2),
56 SR_KHZ(4),
57 SR_KHZ(8),
58 SR_KHZ(16),
59 SR_HZ(31250),
60 SR_HZ(62500),
61 SR_KHZ(125),
62 SR_KHZ(250),
63 SR_KHZ(500),
64 SR_KHZ(625),
65 SR_HZ(781250),
66 SR_MHZ(1),
67 SR_KHZ(1250),
68 SR_HZ(1562500),
69 SR_MHZ(2),
70 SR_KHZ(2500),
71 SR_KHZ(3125),
72 SR_MHZ(4),
73 SR_MHZ(5),
74 SR_KHZ(6250),
75 SR_MHZ(10),
76 SR_KHZ(12500),
77 SR_MHZ(20),
78 SR_MHZ(25),
79 SR_MHZ(40),
80 SR_MHZ(50),
81 SR_MHZ(80),
82 SR_MHZ(100),
83 SR_MHZ(160),
84 SR_MHZ(200),
85 SR_MHZ(320),
86 SR_MHZ(400),
87};
88
89static const uint64_t samplerates_hw[] = {
90 SR_MHZ(100),
91 SR_MHZ(50),
92 SR_MHZ(25),
93 SR_KHZ(12500),
94 SR_KHZ(6250),
95 SR_KHZ(3125),
96 SR_HZ(1562500),
97 SR_HZ(781250),
98 SR_MHZ(80),
99 SR_MHZ(40),
100 SR_MHZ(20),
101 SR_MHZ(10),
102 SR_MHZ(5),
103 SR_KHZ(2500),
104 SR_KHZ(1250),
105 SR_KHZ(625),
106 SR_MHZ(4),
107 SR_MHZ(2),
108 SR_MHZ(1),
109 SR_KHZ(500),
110 SR_KHZ(250),
111 SR_KHZ(125),
112 SR_HZ(62500),
113 SR_HZ(31250),
114 SR_KHZ(16),
115 SR_KHZ(8),
116 SR_KHZ(4),
117 SR_KHZ(2),
118 SR_KHZ(1),
119 0,
120 0,
121 0,
122 SR_MHZ(200),
123 SR_MHZ(160),
124 SR_MHZ(400),
125 SR_MHZ(320),
126};
127
128SR_PRIV struct sr_dev_driver hantek_4032l_driver_info;
6a25fa42
AZ
129
130static GSList *scan(struct sr_dev_driver *di, GSList *options)
131{
5089a143
AZ
132 struct drv_context *drvc = di->context;
133 GSList *l, *devices, *conn_devices;
134 libusb_device **devlist;
135 struct libusb_device_descriptor des;
136 const char *conn;
137 int i;
138 char connection_id[64];
139 struct sr_channel_group *cg;
140 struct sr_dev_inst *sdi;
141 struct sr_channel *ch;
6a25fa42
AZ
142
143 devices = NULL;
5089a143 144 conn_devices = NULL;
6a25fa42 145 drvc->instances = NULL;
5089a143
AZ
146 conn = NULL;
147
148 for (l = options; l; l = l->next) {
149 struct sr_config *src = l->data;
150 if (src->key == SR_CONF_CONN) {
151 conn = g_variant_get_string(src->data, NULL);
152 break;
153 }
154 }
6a25fa42 155
5089a143
AZ
156 if (conn)
157 conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn);
158 else
159 conn_devices = NULL;
160
161 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
162 for (i = 0; devlist[i]; i++) {
163 if (conn) {
164 struct sr_usb_dev_inst *usb = NULL;
165 for (l = conn_devices; l; l = l->next) {
166 usb = l->data;
167 if (usb->bus == libusb_get_bus_number(devlist[i])
168 && usb->address == libusb_get_device_address(devlist[i]))
169 break;
170 }
171 if (!l)
172 /* This device matched none of the ones that
173 * matched the conn specification. */
174 continue;
175 }
176
177 libusb_get_device_descriptor(devlist[i], &des);
178
179 if (des.idVendor != H4032L_USB_VENDOR ||
180 des.idProduct != H4032L_USB_PRODUCT)
181 continue;
182
183 usb_get_port_path(devlist[i], connection_id, sizeof(connection_id));
184
185 sdi = g_malloc0(sizeof(struct sr_dev_inst));
186 sdi->driver = &hantek_4032l_driver_info;
187 sdi->vendor = g_strdup("Hantek");
188 sdi->model = g_strdup("4032L");
189 sdi->connection_id = g_strdup(connection_id);
190
191 struct sr_channel_group *channel_groups[2];
192 for (int j = 0; j < 2; j++) {
193 cg = g_malloc0(sizeof(struct sr_channel_group));
194 cg->name = g_strdup_printf("%c", 'A' + j);
195 channel_groups[j] = cg;
196 sdi->channel_groups = g_slist_append(sdi->channel_groups, cg);
197 }
198
199 /* Assemble channel list and add channel to channel groups. */
200 for (int j = 0; j < NUM_CHANNELS; j++) {
201 char channel_name[4];
202 sprintf(channel_name, "%c%d", 'A' + (j & 1), j / 2);
203 ch = sr_channel_new(sdi, j, SR_CHANNEL_LOGIC, TRUE, channel_name);
204 cg = channel_groups[j & 1];
205 cg->channels = g_slist_append(cg->channels, ch);
206 }
207
208 struct dev_context *devc = g_malloc0(sizeof(struct dev_context));
209
210 /* Initialize command packet. */
211 devc->cmd_pkt.magic = H4032L_CMD_PKT_MAGIC;
212 devc->cmd_pkt.pwm_a = h4032l_voltage2pwm(2.5);
213 devc->cmd_pkt.pwm_b = h4032l_voltage2pwm(2.5);
214 devc->cmd_pkt.sample_size = 16384;
215 devc->cmd_pkt.pre_trigger_size = 1024;
216
217 devc->status = H4032L_STATUS_IDLE;
218
219 devc->capture_ratio = 5;
220
221 devc->usb_transfer = libusb_alloc_transfer(0);
222
223 sdi->priv = devc;
224 devices = g_slist_append(devices, sdi);
225
226 sdi->status = SR_ST_INACTIVE;
227 sdi->inst_type = SR_INST_USB;
228 sdi->conn = sr_usb_dev_inst_new(
229 libusb_get_bus_number(devlist[i]),
230 libusb_get_device_address(devlist[i]), NULL);
231 }
6a25fa42 232
5089a143
AZ
233 g_slist_free_full(conn_devices, (GDestroyNotify)sr_usb_dev_inst_free);
234 libusb_free_device_list(devlist, 1);
6a25fa42 235
5089a143 236 return std_scan_complete(di, devices);
6a25fa42
AZ
237}
238
239static int dev_open(struct sr_dev_inst *sdi)
240{
5089a143
AZ
241 struct sr_usb_dev_inst *usb = sdi->conn;
242 int ret;
6a25fa42 243
5089a143
AZ
244 ret = h4032l_dev_open(sdi);
245 if (ret != SR_OK) {
246 sr_err("Unable to open device.");
247 return SR_ERR;
248 }
6a25fa42 249
5089a143
AZ
250 ret = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
251 if (ret != 0) {
252 switch (ret) {
253 case LIBUSB_ERROR_BUSY:
254 sr_err("Unable to claim USB interface. Another "
255 "program or driver has already claimed it.");
256 break;
257 case LIBUSB_ERROR_NO_DEVICE:
258 sr_err("Device has been disconnected.");
259 break;
260 default:
261 sr_err("Unable to claim interface: %s.",
262 libusb_error_name(ret));
263 break;
264 }
265
266 return SR_ERR;
267 }
6a25fa42
AZ
268
269 return SR_OK;
270}
271
272static int dev_close(struct sr_dev_inst *sdi)
273{
5089a143 274 struct sr_usb_dev_inst *usb;
6a25fa42 275
5089a143 276 usb = sdi->conn;
6a25fa42 277
5089a143
AZ
278 if (!usb->devhdl)
279 return SR_ERR_BUG;
6a25fa42 280
5089a143
AZ
281 sr_info("Closing device on %d.%d (logical) / %s (physical) interface %d.",
282 usb->bus, usb->address, sdi->connection_id, USB_INTERFACE);
283 libusb_release_interface(usb->devhdl, USB_INTERFACE);
284 libusb_close(usb->devhdl);
285 usb->devhdl = NULL;
6a25fa42
AZ
286
287 return SR_OK;
288}
289
290static int config_get(uint32_t key, GVariant **data,
291 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
292{
5089a143
AZ
293 struct dev_context *devc = sdi->priv;
294 struct sr_usb_dev_inst *usb;
6a25fa42 295
6a25fa42
AZ
296 (void)cg;
297
6a25fa42 298 switch (key) {
5089a143
AZ
299 case SR_CONF_SAMPLERATE:
300 *data = g_variant_new_uint64(samplerates_hw[devc->cmd_pkt.sample_rate]);
301 break;
302 case SR_CONF_CAPTURE_RATIO:
303 *data = g_variant_new_uint64(devc->capture_ratio);
304 break;
305 case SR_CONF_LIMIT_SAMPLES:
306 *data = g_variant_new_uint64(devc->cmd_pkt.sample_size);
307 break;
308 case SR_CONF_CONN:
309 if (!sdi || !(usb = sdi->conn))
310 return SR_ERR_ARG;
311 *data = g_variant_new_printf("%d.%d", usb->bus, usb->address);
312 break;
6a25fa42
AZ
313 default:
314 return SR_ERR_NA;
315 }
316
5089a143 317 return SR_OK;
6a25fa42
AZ
318}
319
320static int config_set(uint32_t key, GVariant *data,
321 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
322{
5089a143
AZ
323 struct dev_context *devc = sdi->priv;
324 struct h4032l_cmd_pkt *cmd_pkt = &devc->cmd_pkt;
6a25fa42 325
6a25fa42
AZ
326 (void)cg;
327
6a25fa42 328 switch (key) {
5089a143
AZ
329 case SR_CONF_SAMPLERATE: {
330 uint64_t sample_rate = g_variant_get_uint64(data);
331 uint8_t i = 0;
332 while (i < ARRAY_SIZE(samplerates_hw) && samplerates_hw[i] != sample_rate)
333 i++;
334
335 if (i == ARRAY_SIZE(samplerates_hw) || sample_rate == 0) {
336 sr_err("invalid sample rate");
337 return SR_ERR_SAMPLERATE;
338 }
339 cmd_pkt->sample_rate = i;
340
341 return SR_OK;
342 }
343 case SR_CONF_CAPTURE_RATIO:
344 devc->capture_ratio = g_variant_get_uint64(data);
345 return SR_OK;
346 case SR_CONF_LIMIT_SAMPLES: {
347 uint64_t number_samples = g_variant_get_uint64(data);
348 number_samples += 511;
349 number_samples &= 0xfffffe00;
350 if (number_samples < 2048
351 || number_samples > 64 * 1024 * 1024) {
352 sr_err("invalid sample range 2k...64M: %ld",
353 number_samples);
354 return SR_ERR;
355 }
356 cmd_pkt->sample_size = number_samples;
357 return SR_OK;
358 }
359 case SR_CONF_VOLTAGE_THRESHOLD: {
360 double d1, d2;
361 g_variant_get(data, "(dd)", &d1, &d2);
362 devc->cmd_pkt.pwm_a = h4032l_voltage2pwm(d1);
363 devc->cmd_pkt.pwm_b = h4032l_voltage2pwm(d2);
364 return SR_OK;
365 }
6a25fa42
AZ
366 }
367
5089a143 368 return SR_ERR_NA;
6a25fa42
AZ
369}
370
371static int config_list(uint32_t key, GVariant **data,
372 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
373{
6a25fa42 374 switch (key) {
5089a143
AZ
375 case SR_CONF_SCAN_OPTIONS:
376 case SR_CONF_DEVICE_OPTIONS:
377 return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
378 case SR_CONF_SAMPLERATE:
379 *data = std_gvar_samplerates(ARRAY_AND_SIZE(samplerates));
380 break;
381 case SR_CONF_TRIGGER_MATCH:
382 *data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches));
383 break;
384 case SR_CONF_VOLTAGE_THRESHOLD:
385 *data = std_gvar_tuple_double(2.5, 2.5);
386 break;
6a25fa42
AZ
387 default:
388 return SR_ERR_NA;
389 }
390
5089a143 391 return SR_OK;
6a25fa42
AZ
392}
393
5089a143 394static int dev_acquisition_start(const struct sr_dev_inst *sdi)
6a25fa42 395{
5089a143
AZ
396 struct sr_dev_driver *di = sdi->driver;
397 struct drv_context *drvc = di->context;
398 struct dev_context *devc = sdi->priv;
399 struct sr_trigger *trigger = sr_session_trigger_get(sdi->session);
400 struct h4032l_cmd_pkt *cmd_pkt = &devc->cmd_pkt;
401
402 /* Calculate packet ratio. */
403 cmd_pkt->pre_trigger_size = (cmd_pkt->sample_size * devc->capture_ratio) / 100;
404
405 cmd_pkt->trig_flags.enable_trigger1 = 0;
406 cmd_pkt->trig_flags.enable_trigger2 = 0;
407 cmd_pkt->trig_flags.trigger_and_logic = 0;
408
409 if (trigger && trigger->stages) {
410 GSList *stages = trigger->stages;
411 struct sr_trigger_stage *stage1 = stages->data;
412 if (stages->next) {
413 sr_err("only one trigger stage supported for now");
414 return SR_ERR;
415 }
416 cmd_pkt->trig_flags.enable_trigger1 = 1;
417 cmd_pkt->trigger[0].flags.edge_type = H4032L_TRIGGER_EDGE_TYPE_DISABLED;
418 cmd_pkt->trigger[0].flags.data_range_enabled = 0;
419 cmd_pkt->trigger[0].flags.time_range_enabled = 0;
420 cmd_pkt->trigger[0].flags.combined_enabled = 0;
421 cmd_pkt->trigger[0].flags.data_range_type = H4032L_TRIGGER_DATA_RANGE_TYPE_MAX;
422 cmd_pkt->trigger[0].data_range_mask = 0;
423 cmd_pkt->trigger[0].data_range_max = 0;
424
425 /* Initialize range mask values. */
426 uint32_t range_mask = 0;
427 uint32_t range_value = 0;
428
429 GSList *channel = stage1->matches;
430 while (channel) {
431 struct sr_trigger_match *match = channel->data;
432
433 switch (match->match) {
434 case SR_TRIGGER_ZERO:
435 range_mask |= (1 << match->channel->index);
436 break;
437 case SR_TRIGGER_ONE:
438 range_mask |= (1 << match->channel->index);
439 range_value |= (1 << match->channel->index);
440 break;
441 case SR_TRIGGER_RISING:
442 if (cmd_pkt->trigger[0].flags.edge_type != H4032L_TRIGGER_EDGE_TYPE_DISABLED) {
443 sr_err("only one trigger signal with fall/rising/edge allowed");
444 return SR_ERR;
445 }
446 cmd_pkt->trigger[0].flags.edge_type = H4032L_TRIGGER_EDGE_TYPE_RISE;
447 cmd_pkt->trigger[0].flags.edge_signal = match->channel->index;
448 break;
449 case SR_TRIGGER_FALLING:
450 if (cmd_pkt->trigger[0].flags.edge_type != H4032L_TRIGGER_EDGE_TYPE_DISABLED) {
451 sr_err("only one trigger signal with fall/rising/edge allowed");
452 return SR_ERR;
453 }
454 cmd_pkt->trigger[0].flags.edge_type = H4032L_TRIGGER_EDGE_TYPE_FALL;
455 cmd_pkt->trigger[0].flags.edge_signal = match->channel->index;
456 break;
457 case SR_TRIGGER_EDGE:
458 if (cmd_pkt->trigger[0].flags.edge_type != H4032L_TRIGGER_EDGE_TYPE_DISABLED) {
459 sr_err("only one trigger signal with fall/rising/edge allowed");
460 return SR_ERR;
461 }
462 cmd_pkt->trigger[0].flags.edge_type = H4032L_TRIGGER_EDGE_TYPE_TOGGLE;
463 cmd_pkt->trigger[0].flags.edge_signal = match->channel->index;
464 break;
465 default:
466 sr_err("unknown trigger value");
467 return SR_ERR;
468 }
469
470 channel = channel->next;
471 }
472
473 /* Compress range mask value and apply range settings. */
474 if (range_mask) {
475 cmd_pkt->trigger[0].flags.data_range_enabled = 1;
476 cmd_pkt->trigger[0].data_range_mask |= (range_mask);
477
478 uint32_t new_range_value = 0;
479 uint32_t bit_mask = 1;
480 while (range_mask) {
481 if ((range_mask & 1) != 0) {
482 new_range_value <<= 1;
483 if ((range_value & 1) != 0)
484 new_range_value |= bit_mask;
485 bit_mask <<= 1;
486 }
487 range_mask >>= 1;
488 range_value >>= 1;
489 }
490 cmd_pkt->trigger[0].data_range_max |= range_value;
491 }
492 }
6a25fa42 493
5089a143
AZ
494 usb_source_add(sdi->session, drvc->sr_ctx, 10000,
495 h4032l_receive_data, sdi->driver->context);
6a25fa42 496
5089a143
AZ
497 /* Start capturing. */
498 return h4032l_start(sdi);
6a25fa42
AZ
499}
500
5089a143 501static int dev_acquisition_stop(struct sr_dev_inst *sdi)
6a25fa42 502{
5089a143 503 (void)sdi;
6a25fa42
AZ
504
505 /* TODO: stop acquisition. */
506
507 return SR_OK;
508}
509
510SR_PRIV struct sr_dev_driver hantek_4032l_driver_info = {
511 .name = "hantek-4032l",
5089a143 512 .longname = "Hantek 4032L",
6a25fa42 513 .api_version = 1,
5089a143
AZ
514 .init = std_init,
515 .cleanup = std_cleanup,
6a25fa42 516 .scan = scan,
5089a143
AZ
517 .dev_list = std_dev_list,
518 .dev_clear = std_dev_clear,
6a25fa42
AZ
519 .config_get = config_get,
520 .config_set = config_set,
521 .config_list = config_list,
522 .dev_open = dev_open,
523 .dev_close = dev_close,
524 .dev_acquisition_start = dev_acquisition_start,
525 .dev_acquisition_stop = dev_acquisition_stop,
526 .context = NULL,
527};
5089a143 528SR_REGISTER_DEV_DRIVER(hantek_4032l_driver_info);