[libsigrok.git] / src / hardware / asix-sigma / api.c

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
 * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
 * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

/*
 * ASIX SIGMA/SIGMA2 logic analyzer driver
 */

#include <config.h>
#include "protocol.h"

/*
 * Channel numbers seem to go from 1-16, according to this image:
 * http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg
 * (the cable has two additional GND pins, and a TI and TO pin)
 */
static const char *channel_names[] = {
	"1", "2", "3", "4", "5", "6", "7", "8",
	"9", "10", "11", "12", "13", "14", "15", "16",
};

static const uint32_t drvopts[] = {
	SR_CONF_LOGIC_ANALYZER,
};

static const uint32_t devopts[] = {
	SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
#if ASIX_SIGMA_WITH_TRIGGER
	SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
	SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
#endif
};

#if ASIX_SIGMA_WITH_TRIGGER
static const int32_t trigger_matches[] = {
	SR_TRIGGER_ZERO,
	SR_TRIGGER_ONE,
	SR_TRIGGER_RISING,
	SR_TRIGGER_FALLING,
};
#endif

static int dev_clear(const struct sr_dev_driver *di)
{
	return std_dev_clear(di, sigma_clear_helper);
}

static GSList *scan(struct sr_dev_driver *di, GSList *options)
{
	struct sr_dev_inst *sdi;
	struct dev_context *devc;
	struct ftdi_device_list *devlist;
	char serial_txt[10];
	uint32_t serial;
	int ret;
	unsigned int i;

	(void)options;

	devc = g_malloc0(sizeof(struct dev_context));

	ftdi_init(&devc->ftdic);

	/* Look for SIGMAs. */

	if ((ret = ftdi_usb_find_all(&devc->ftdic, &devlist,
	    USB_VENDOR, USB_PRODUCT)) <= 0) {
		if (ret < 0)
			sr_err("ftdi_usb_find_all(): %d", ret);
		goto free;
	}

	/* Make sure it's a version 1 or 2 SIGMA. */
	ftdi_usb_get_strings(&devc->ftdic, devlist->dev, NULL, 0, NULL, 0,
			     serial_txt, sizeof(serial_txt));
	sscanf(serial_txt, "%x", &serial);

	if (serial < 0xa6010000 || serial > 0xa602ffff) {
		sr_err("Only SIGMA and SIGMA2 are supported "
		       "in this version of libsigrok.");
		goto free;
	}

	sr_info("Found ASIX SIGMA - Serial: %s", serial_txt);

	devc->cur_samplerate = samplerates[0];
	devc->limit_msec = 0;
	devc->limit_samples = 0;
	devc->cur_firmware = -1;
	devc->num_channels = 0;
	devc->samples_per_event = 0;
	devc->capture_ratio = 50;
	devc->use_triggers = 0;

	/* Register SIGMA device. */
	sdi = g_malloc0(sizeof(struct sr_dev_inst));
	sdi->status = SR_ST_INITIALIZING;
	sdi->vendor = g_strdup(USB_VENDOR_NAME);
	sdi->model = g_strdup(USB_MODEL_NAME);

	for (i = 0; i < ARRAY_SIZE(channel_names); i++)
		sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_names[i]);

	sdi->priv = devc;

	/* We will open the device again when we need it. */
	ftdi_list_free(&devlist);

	return std_scan_complete(di, g_slist_append(NULL, sdi));

free:
	ftdi_deinit(&devc->ftdic);
	g_free(devc);
	return NULL;
}

static int dev_open(struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	int ret;

	devc = sdi->priv;

	/* Make sure it's an ASIX SIGMA. */
	if ((ret = ftdi_usb_open_desc(&devc->ftdic,
		USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {

		sr_err("ftdi_usb_open failed: %s",
		       ftdi_get_error_string(&devc->ftdic));

		return 0;
	}

	sdi->status = SR_ST_ACTIVE;

	return SR_OK;
}

static int dev_close(struct sr_dev_inst *sdi)
{
	struct dev_context *devc;

	devc = sdi->priv;

	/* TODO */
	if (sdi->status == SR_ST_ACTIVE)
		ftdi_usb_close(&devc->ftdic);

	sdi->status = SR_ST_INACTIVE;

	return SR_OK;
}

static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
		const struct sr_channel_group *cg)
{
	struct dev_context *devc;

	(void)cg;

	if (!sdi)
		return SR_ERR;
	devc = sdi->priv;

	switch (key) {
	case SR_CONF_SAMPLERATE:
		*data = g_variant_new_uint64(devc->cur_samplerate);
		break;
	case SR_CONF_LIMIT_MSEC:
		*data = g_variant_new_uint64(devc->limit_msec);
		break;
	case SR_CONF_LIMIT_SAMPLES:
		*data = g_variant_new_uint64(devc->limit_samples);
		break;
#if ASIX_SIGMA_WITH_TRIGGER
	case SR_CONF_CAPTURE_RATIO:
		*data = g_variant_new_uint64(devc->capture_ratio);
		break;
#endif
	default:
		return SR_ERR_NA;
	}

	return SR_OK;
}

static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
		const struct sr_channel_group *cg)
{
	struct dev_context *devc;
	uint64_t tmp;
	int ret;

	(void)cg;

	if (sdi->status != SR_ST_ACTIVE)
		return SR_ERR_DEV_CLOSED;

	devc = sdi->priv;

	ret = SR_OK;
	switch (key) {
	case SR_CONF_SAMPLERATE:
		ret = sigma_set_samplerate(sdi, g_variant_get_uint64(data));
		break;
	case SR_CONF_LIMIT_MSEC:
		tmp = g_variant_get_uint64(data);
		if (tmp > 0)
			devc->limit_msec = g_variant_get_uint64(data);
		else
			ret = SR_ERR;
		break;
	case SR_CONF_LIMIT_SAMPLES:
		tmp = g_variant_get_uint64(data);
		devc->limit_samples = tmp;
		devc->limit_msec = sigma_limit_samples_to_msec(devc, tmp);
		break;
#if ASIX_SIGMA_WITH_TRIGGER
	case SR_CONF_CAPTURE_RATIO:
		tmp = g_variant_get_uint64(data);
		if (tmp > 100)
			return SR_ERR;
		devc->capture_ratio = tmp;
		break;
#endif
	default:
		ret = SR_ERR_NA;
	}

	return ret;
}

static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
		const struct sr_channel_group *cg)
{
	GVariant *gvar;
	GVariantBuilder gvb;

	(void)cg;

	switch (key) {
	case SR_CONF_DEVICE_OPTIONS:
		if (!sdi)
			*data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
					drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
		else
			*data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
					devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
		break;
	case SR_CONF_SAMPLERATE:
		g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
		gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
				samplerates_count, sizeof(samplerates[0]));
		g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar);
		*data = g_variant_builder_end(&gvb);
		break;
#if ASIX_SIGMA_WITH_TRIGGER
	case SR_CONF_TRIGGER_MATCH:
		*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
				trigger_matches, ARRAY_SIZE(trigger_matches),
				sizeof(int32_t));
		break;
#endif
	default:
		return SR_ERR_NA;
	}

	return SR_OK;
}

static int dev_acquisition_start(const struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	struct clockselect_50 clockselect;
	int triggerpin, ret;
	uint8_t triggerselect;
	struct triggerinout triggerinout_conf;
	struct triggerlut lut;
	uint8_t regval;
	uint8_t clock_bytes[sizeof(clockselect)];
	size_t clock_idx;

	devc = sdi->priv;

	if (sigma_convert_trigger(sdi) != SR_OK) {
		sr_err("Failed to configure triggers.");
		return SR_ERR;
	}

	/* If the samplerate has not been set, default to 200 kHz. */
	if (devc->cur_firmware == -1) {
		if ((ret = sigma_set_samplerate(sdi, SR_KHZ(200))) != SR_OK)
			return ret;
	}

	/* Enter trigger programming mode. */
	sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, devc);

	triggerselect = 0;
	if (devc->cur_samplerate >= SR_MHZ(100)) {
		/* 100 and 200 MHz mode. */
		sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, devc);

		/* Find which pin to trigger on from mask. */
		for (triggerpin = 0; triggerpin < 8; triggerpin++)
			if ((devc->trigger.risingmask | devc->trigger.fallingmask) &
			    (1 << triggerpin))
				break;

		/* Set trigger pin and light LED on trigger. */
		triggerselect = (1 << LEDSEL1) | (triggerpin & 0x7);

		/* Default rising edge. */
		if (devc->trigger.fallingmask)
			triggerselect |= 1 << 3;

	} else if (devc->cur_samplerate <= SR_MHZ(50)) {
		/* All other modes. */
		sigma_build_basic_trigger(&lut, devc);

		sigma_write_trigger_lut(&lut, devc);

		triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0);
	}

	/* Setup trigger in and out pins to default values. */
	memset(&triggerinout_conf, 0, sizeof(struct triggerinout));
	triggerinout_conf.trgout_bytrigger = 1;
	triggerinout_conf.trgout_enable = 1;

	sigma_write_register(WRITE_TRIGGER_OPTION,
			     (uint8_t *) &triggerinout_conf,
			     sizeof(struct triggerinout), devc);

	/* Go back to normal mode. */
	sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, devc);

	/* Set clock select register. */
	clockselect.async = 0;
	clockselect.fraction = 1 - 1;		/* Divider 1. */
	clockselect.disabled_channels = 0x0000;	/* All channels enabled. */
	if (devc->cur_samplerate == SR_MHZ(200)) {
		/* Enable 4 channels. */
		clockselect.disabled_channels = 0xf0ff;
	} else if (devc->cur_samplerate == SR_MHZ(100)) {
		/* Enable 8 channels. */
		clockselect.disabled_channels = 0x00ff;
	} else {
		/*
		 * 50 MHz mode, or fraction thereof. The 50MHz reference
		 * can get divided by any integer in the range 1 to 256.
		 * Divider minus 1 gets written to the hardware.
		 * (The driver lists a discrete set of sample rates, but
		 * all of them fit the above description.)
		 */
		clockselect.fraction = SR_MHZ(50) / devc->cur_samplerate - 1;
	}
	clock_idx = 0;
	clock_bytes[clock_idx++] = clockselect.async;
	clock_bytes[clock_idx++] = clockselect.fraction;
	clock_bytes[clock_idx++] = clockselect.disabled_channels & 0xff;
	clock_bytes[clock_idx++] = clockselect.disabled_channels >> 8;
	sigma_write_register(WRITE_CLOCK_SELECT, clock_bytes, clock_idx, devc);

	/* Setup maximum post trigger time. */
	sigma_set_register(WRITE_POST_TRIGGER,
			   (devc->capture_ratio * 255) / 100, devc);

	/* Start acqusition. */
	devc->start_time = g_get_monotonic_time();
	regval =  WMR_TRGRES | WMR_SDRAMWRITEEN;
#if ASIX_SIGMA_WITH_TRIGGER
	regval |= WMR_TRGEN;
#endif
	sigma_set_register(WRITE_MODE, regval, devc);

	std_session_send_df_header(sdi);

	/* Add capture source. */
	sr_session_source_add(sdi->session, -1, 0, 10, sigma_receive_data, (void *)sdi);

	devc->state.state = SIGMA_CAPTURE;

	return SR_OK;
}

static int dev_acquisition_stop(struct sr_dev_inst *sdi)
{
	struct dev_context *devc;

	devc = sdi->priv;
	devc->state.state = SIGMA_IDLE;

	sr_session_source_remove(sdi->session, -1);

	return SR_OK;
}

static struct sr_dev_driver asix_sigma_driver_info = {
	.name = "asix-sigma",
	.longname = "ASIX SIGMA/SIGMA2",
	.api_version = 1,
	.init = std_init,
	.cleanup = std_cleanup,
	.scan = scan,
	.dev_list = std_dev_list,
	.dev_clear = dev_clear,
	.config_get = config_get,
	.config_set = config_set,
	.config_list = config_list,
	.dev_open = dev_open,
	.dev_close = dev_close,
	.dev_acquisition_start = dev_acquisition_start,
	.dev_acquisition_stop = dev_acquisition_stop,
	.context = NULL,
};
SR_REGISTER_DEV_DRIVER(asix_sigma_driver_info);
Commit	Line	Data
3ba56876	1	/*
	2	* This file is part of the libsigrok project.
	3	*
	4	* Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
	5	* Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
	6	* Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
	7	*
	8	* This program is free software: you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation, either version 3 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	20	*/
	21
	22	/*
	23	* ASIX SIGMA/SIGMA2 logic analyzer driver
	24	*/
	25
	26	#include <config.h>
	27	#include "protocol.h"
	28
3ba56876	29	/*
	30	* Channel numbers seem to go from 1-16, according to this image:
	31	* http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg
	32	* (the cable has two additional GND pins, and a TI and TO pin)
	33	*/
	34	static const char *channel_names[] = {
	35	"1", "2", "3", "4", "5", "6", "7", "8",
	36	"9", "10", "11", "12", "13", "14", "15", "16",
	37	};
	38
	39	static const uint32_t drvopts[] = {
	40	SR_CONF_LOGIC_ANALYZER,
	41	};
	42
	43	static const uint32_t devopts[] = {
	44	SR_CONF_LIMIT_MSEC \| SR_CONF_GET \| SR_CONF_SET,
2f7e529c	45	SR_CONF_LIMIT_SAMPLES \| SR_CONF_GET \| SR_CONF_SET,
3ba56876	46	SR_CONF_SAMPLERATE \| SR_CONF_GET \| SR_CONF_SET \| SR_CONF_LIST,
de3f7acb	47	#if ASIX_SIGMA_WITH_TRIGGER
3ba56876	48	SR_CONF_TRIGGER_MATCH \| SR_CONF_LIST,
3ba56876	49	SR_CONF_CAPTURE_RATIO \| SR_CONF_GET \| SR_CONF_SET,
de3f7acb	50	#endif
3ba56876	51	};
3ba56876	52
eac48b34	53	#if ASIX_SIGMA_WITH_TRIGGER
3ba56876	54	static const int32_t trigger_matches[] = {
	55	SR_TRIGGER_ZERO,
	56	SR_TRIGGER_ONE,
	57	SR_TRIGGER_RISING,
	58	SR_TRIGGER_FALLING,
	59	};
eac48b34	60	#endif
3ba56876	61
	62	static int dev_clear(const struct sr_dev_driver *di)
	63	{
	64	return std_dev_clear(di, sigma_clear_helper);
	65	}
	66
3ba56876	67	static GSList scan(struct sr_dev_driver di, GSList *options)
	68	{
	69	struct sr_dev_inst *sdi;
3ba56876	70	struct dev_context *devc;
3ba56876	71	struct ftdi_device_list *devlist;
	72	char serial_txt[10];
	73	uint32_t serial;
	74	int ret;
	75	unsigned int i;
	76
	77	(void)options;
	78
3ba56876	79	devc = g_malloc0(sizeof(struct dev_context));
	80
	81	ftdi_init(&devc->ftdic);
	82
	83	/* Look for SIGMAs. */
	84
	85	if ((ret = ftdi_usb_find_all(&devc->ftdic, &devlist,
	86	USB_VENDOR, USB_PRODUCT)) <= 0) {
	87	if (ret < 0)
	88	sr_err("ftdi_usb_find_all(): %d", ret);
	89	goto free;
	90	}
	91
	92	/* Make sure it's a version 1 or 2 SIGMA. */
	93	ftdi_usb_get_strings(&devc->ftdic, devlist->dev, NULL, 0, NULL, 0,
	94	serial_txt, sizeof(serial_txt));
	95	sscanf(serial_txt, "%x", &serial);
	96
	97	if (serial < 0xa6010000 \|\| serial > 0xa602ffff) {
	98	sr_err("Only SIGMA and SIGMA2 are supported "
	99	"in this version of libsigrok.");
	100	goto free;
	101	}
	102
	103	sr_info("Found ASIX SIGMA - Serial: %s", serial_txt);
	104
	105	devc->cur_samplerate = samplerates[0];
3ba56876	106	devc->limit_msec = 0;
2f7e529c	107	devc->limit_samples = 0;
3ba56876	108	devc->cur_firmware = -1;
	109	devc->num_channels = 0;
	110	devc->samples_per_event = 0;
	111	devc->capture_ratio = 50;
	112	devc->use_triggers = 0;
	113
	114	/* Register SIGMA device. */
	115	sdi = g_malloc0(sizeof(struct sr_dev_inst));
	116	sdi->status = SR_ST_INITIALIZING;
	117	sdi->vendor = g_strdup(USB_VENDOR_NAME);
	118	sdi->model = g_strdup(USB_MODEL_NAME);
3ba56876	119
	120	for (i = 0; i < ARRAY_SIZE(channel_names); i++)
	121	sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_names[i]);
	122
3ba56876	123	sdi->priv = devc;
	124
	125	/* We will open the device again when we need it. */
	126	ftdi_list_free(&devlist);
	127
43376f33	128	return std_scan_complete(di, g_slist_append(NULL, sdi));
3ba56876	129
	130	free:
	131	ftdi_deinit(&devc->ftdic);
	132	g_free(devc);
	133	return NULL;
	134	}
	135
3ba56876	136	static int dev_open(struct sr_dev_inst *sdi)
	137	{
	138	struct dev_context *devc;
	139	int ret;
	140
	141	devc = sdi->priv;
	142
	143	/* Make sure it's an ASIX SIGMA. */
	144	if ((ret = ftdi_usb_open_desc(&devc->ftdic,
	145	USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
	146
	147	sr_err("ftdi_usb_open failed: %s",
	148	ftdi_get_error_string(&devc->ftdic));
	149
	150	return 0;
	151	}
	152
	153	sdi->status = SR_ST_ACTIVE;
	154
	155	return SR_OK;
	156	}
	157
	158	static int dev_close(struct sr_dev_inst *sdi)
	159	{
	160	struct dev_context *devc;
	161
	162	devc = sdi->priv;
	163
	164	/* TODO */
	165	if (sdi->status == SR_ST_ACTIVE)
	166	ftdi_usb_close(&devc->ftdic);
	167
	168	sdi->status = SR_ST_INACTIVE;
	169
	170	return SR_OK;
	171	}
	172
3ba56876	173	static int config_get(uint32_t key, GVariant *data, const struct sr_dev_inst sdi,
	174	const struct sr_channel_group *cg)
	175	{
	176	struct dev_context *devc;
	177
	178	(void)cg;
	179
	180	if (!sdi)
	181	return SR_ERR;
	182	devc = sdi->priv;
	183
	184	switch (key) {
	185	case SR_CONF_SAMPLERATE:
	186	*data = g_variant_new_uint64(devc->cur_samplerate);
	187	break;
	188	case SR_CONF_LIMIT_MSEC:
	189	*data = g_variant_new_uint64(devc->limit_msec);
	190	break;
2f7e529c GS	191	case SR_CONF_LIMIT_SAMPLES:
	192	*data = g_variant_new_uint64(devc->limit_samples);
	193	break;
de3f7acb	194	#if ASIX_SIGMA_WITH_TRIGGER
3ba56876	195	case SR_CONF_CAPTURE_RATIO:
	196	*data = g_variant_new_uint64(devc->capture_ratio);
	197	break;
de3f7acb	198	#endif
3ba56876	199	default:
	200	return SR_ERR_NA;
	201	}
	202
	203	return SR_OK;
	204	}
	205
	206	static int config_set(uint32_t key, GVariant data, const struct sr_dev_inst sdi,
	207	const struct sr_channel_group *cg)
	208	{
	209	struct dev_context *devc;
	210	uint64_t tmp;
	211	int ret;
	212
	213	(void)cg;
	214
	215	if (sdi->status != SR_ST_ACTIVE)
	216	return SR_ERR_DEV_CLOSED;
	217
	218	devc = sdi->priv;
	219
	220	ret = SR_OK;
	221	switch (key) {
	222	case SR_CONF_SAMPLERATE:
	223	ret = sigma_set_samplerate(sdi, g_variant_get_uint64(data));
	224	break;
	225	case SR_CONF_LIMIT_MSEC:
	226	tmp = g_variant_get_uint64(data);
	227	if (tmp > 0)
	228	devc->limit_msec = g_variant_get_uint64(data);
	229	else
	230	ret = SR_ERR;
	231	break;
	232	case SR_CONF_LIMIT_SAMPLES:
	233	tmp = g_variant_get_uint64(data);
2f7e529c	234	devc->limit_samples = tmp;
9a0a606a	235	devc->limit_msec = sigma_limit_samples_to_msec(devc, tmp);
3ba56876	236	break;
de3f7acb	237	#if ASIX_SIGMA_WITH_TRIGGER
3ba56876	238	case SR_CONF_CAPTURE_RATIO:
3ba56876	239	tmp = g_variant_get_uint64(data);
de3f7acb GS	240	if (tmp > 100)
	241	return SR_ERR;
	242	devc->capture_ratio = tmp;
3ba56876	243	break;
de3f7acb	244	#endif
3ba56876	245	default:
	246	ret = SR_ERR_NA;
	247	}
	248
	249	return ret;
	250	}
	251
	252	static int config_list(uint32_t key, GVariant *data, const struct sr_dev_inst sdi,
	253	const struct sr_channel_group *cg)
	254	{
	255	GVariant *gvar;
	256	GVariantBuilder gvb;
	257
	258	(void)cg;
	259
	260	switch (key) {
	261	case SR_CONF_DEVICE_OPTIONS:
	262	if (!sdi)
	263	*data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
	264	drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
	265	else
	266	*data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
	267	devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
	268	break;
	269	case SR_CONF_SAMPLERATE:
	270	g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
	271	gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
4154a516	272	samplerates_count, sizeof(samplerates[0]));
3ba56876	273	g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar);
	274	*data = g_variant_builder_end(&gvb);
	275	break;
de3f7acb	276	#if ASIX_SIGMA_WITH_TRIGGER
3ba56876	277	case SR_CONF_TRIGGER_MATCH:
	278	*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
	279	trigger_matches, ARRAY_SIZE(trigger_matches),
	280	sizeof(int32_t));
	281	break;
de3f7acb	282	#endif
3ba56876	283	default:
	284	return SR_ERR_NA;
	285	}
	286
	287	return SR_OK;
	288	}
	289
695dc859	290	static int dev_acquisition_start(const struct sr_dev_inst *sdi)
3ba56876	291	{
	292	struct dev_context *devc;
	293	struct clockselect_50 clockselect;
8256ed15	294	int triggerpin, ret;
f06fb3e9	295	uint8_t triggerselect;
3ba56876	296	struct triggerinout triggerinout_conf;
3ba56876	297	struct triggerlut lut;
22f64ed8	298	uint8_t regval;
8256ed15 GS	299	uint8_t clock_bytes[sizeof(clockselect)];
8256ed15 GS	300	size_t clock_idx;
3ba56876	301
3ba56876	302	devc = sdi->priv;
	303
	304	if (sigma_convert_trigger(sdi) != SR_OK) {
	305	sr_err("Failed to configure triggers.");
	306	return SR_ERR;
	307	}
	308
	309	/* If the samplerate has not been set, default to 200 kHz. */
	310	if (devc->cur_firmware == -1) {
	311	if ((ret = sigma_set_samplerate(sdi, SR_KHZ(200))) != SR_OK)
	312	return ret;
	313	}
	314
	315	/* Enter trigger programming mode. */
	316	sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, devc);
	317
f06fb3e9	318	triggerselect = 0;
3ba56876	319	if (devc->cur_samplerate >= SR_MHZ(100)) {
f06fb3e9	320	/* 100 and 200 MHz mode. */
3ba56876	321	sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, devc);
	322
	323	/* Find which pin to trigger on from mask. */
0a1f7b09	324	for (triggerpin = 0; triggerpin < 8; triggerpin++)
3ba56876	325	if ((devc->trigger.risingmask \| devc->trigger.fallingmask) &
	326	(1 << triggerpin))
	327	break;
	328
	329	/* Set trigger pin and light LED on trigger. */
	330	triggerselect = (1 << LEDSEL1) \| (triggerpin & 0x7);
	331
	332	/* Default rising edge. */
	333	if (devc->trigger.fallingmask)
	334	triggerselect \|= 1 << 3;
	335
3ba56876	336	} else if (devc->cur_samplerate <= SR_MHZ(50)) {
f06fb3e9	337	/* All other modes. */
3ba56876	338	sigma_build_basic_trigger(&lut, devc);
	339
	340	sigma_write_trigger_lut(&lut, devc);
	341
	342	triggerselect = (1 << LEDSEL1) \| (1 << LEDSEL0);
	343	}
	344
	345	/* Setup trigger in and out pins to default values. */
	346	memset(&triggerinout_conf, 0, sizeof(struct triggerinout));
	347	triggerinout_conf.trgout_bytrigger = 1;
	348	triggerinout_conf.trgout_enable = 1;
	349
	350	sigma_write_register(WRITE_TRIGGER_OPTION,
	351	(uint8_t *) &triggerinout_conf,
	352	sizeof(struct triggerinout), devc);
	353
	354	/* Go back to normal mode. */
	355	sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, devc);
	356
	357	/* Set clock select register. */
8256ed15 GS	358	clockselect.async = 0;
	359	clockselect.fraction = 1 - 1; /* Divider 1. */
	360	clockselect.disabled_channels = 0x0000; /* All channels enabled. */
	361	if (devc->cur_samplerate == SR_MHZ(200)) {
3ba56876	362	/* Enable 4 channels. */
8256ed15 GS	363	clockselect.disabled_channels = 0xf0ff;
8256ed15 GS	364	} else if (devc->cur_samplerate == SR_MHZ(100)) {
3ba56876	365	/* Enable 8 channels. */
8256ed15 GS	366	clockselect.disabled_channels = 0x00ff;
8256ed15 GS	367	} else {
3ba56876	368	/*
8256ed15 GS	369	* 50 MHz mode, or fraction thereof. The 50MHz reference
	370	* can get divided by any integer in the range 1 to 256.
	371	* Divider minus 1 gets written to the hardware.
	372	* (The driver lists a discrete set of sample rates, but
	373	* all of them fit the above description.)
3ba56876	374	*/
8256ed15	375	clockselect.fraction = SR_MHZ(50) / devc->cur_samplerate - 1;
3ba56876	376	}
8256ed15 GS	377	clock_idx = 0;
	378	clock_bytes[clock_idx++] = clockselect.async;
	379	clock_bytes[clock_idx++] = clockselect.fraction;
	380	clock_bytes[clock_idx++] = clockselect.disabled_channels & 0xff;
	381	clock_bytes[clock_idx++] = clockselect.disabled_channels >> 8;
	382	sigma_write_register(WRITE_CLOCK_SELECT, clock_bytes, clock_idx, devc);
3ba56876	383
	384	/* Setup maximum post trigger time. */
	385	sigma_set_register(WRITE_POST_TRIGGER,
	386	(devc->capture_ratio * 255) / 100, devc);
	387
	388	/* Start acqusition. */
2f425a56	389	devc->start_time = g_get_monotonic_time();
22f64ed8 GS	390	regval = WMR_TRGRES \| WMR_SDRAMWRITEEN;
	391	#if ASIX_SIGMA_WITH_TRIGGER
	392	regval \|= WMR_TRGEN;
	393	#endif
	394	sigma_set_register(WRITE_MODE, regval, devc);
3ba56876	395
bee2b016	396	std_session_send_df_header(sdi);
3ba56876	397
	398	/* Add capture source. */
	399	sr_session_source_add(sdi->session, -1, 0, 10, sigma_receive_data, (void *)sdi);
	400
	401	devc->state.state = SIGMA_CAPTURE;
	402
	403	return SR_OK;
	404	}
	405
695dc859	406	static int dev_acquisition_stop(struct sr_dev_inst *sdi)
3ba56876	407	{
	408	struct dev_context *devc;
	409
3ba56876	410	devc = sdi->priv;
	411	devc->state.state = SIGMA_IDLE;
	412
	413	sr_session_source_remove(sdi->session, -1);
	414
	415	return SR_OK;
	416	}
	417
dd5c48a6	418	static struct sr_dev_driver asix_sigma_driver_info = {
3ba56876	419	.name = "asix-sigma",
	420	.longname = "ASIX SIGMA/SIGMA2",
	421	.api_version = 1,
c2fdcc25	422	.init = std_init,
700d6b64	423	.cleanup = std_cleanup,
3ba56876	424	.scan = scan,
c01bf34c	425	.dev_list = std_dev_list,
3ba56876	426	.dev_clear = dev_clear,
	427	.config_get = config_get,
	428	.config_set = config_set,
	429	.config_list = config_list,
	430	.dev_open = dev_open,
	431	.dev_close = dev_close,
	432	.dev_acquisition_start = dev_acquisition_start,
	433	.dev_acquisition_stop = dev_acquisition_stop,
	434	.context = NULL,
	435	};
dd5c48a6	436	SR_REGISTER_DEV_DRIVER(asix_sigma_driver_info);