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3ba56876 | 1 | /* |
2 | * This file is part of the libsigrok project. | |
3 | * | |
4 | * Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>, | |
5 | * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no> | |
6 | * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no> | |
7 | * | |
8 | * This program is free software: you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation, either version 3 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
20 | */ | |
21 | ||
22 | /* | |
23 | * ASIX SIGMA/SIGMA2 logic analyzer driver | |
24 | */ | |
25 | ||
26 | #include <config.h> | |
27 | #include "protocol.h" | |
28 | ||
29 | SR_PRIV struct sr_dev_driver asix_sigma_driver_info; | |
30 | ||
31 | /* | |
32 | * Channel numbers seem to go from 1-16, according to this image: | |
33 | * http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg | |
34 | * (the cable has two additional GND pins, and a TI and TO pin) | |
35 | */ | |
36 | static const char *channel_names[] = { | |
37 | "1", "2", "3", "4", "5", "6", "7", "8", | |
38 | "9", "10", "11", "12", "13", "14", "15", "16", | |
39 | }; | |
40 | ||
41 | static const uint32_t drvopts[] = { | |
42 | SR_CONF_LOGIC_ANALYZER, | |
43 | }; | |
44 | ||
45 | static const uint32_t devopts[] = { | |
46 | SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET, | |
47 | SR_CONF_LIMIT_SAMPLES | SR_CONF_SET, | |
48 | SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
49 | SR_CONF_TRIGGER_MATCH | SR_CONF_LIST, | |
50 | SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET, | |
51 | }; | |
52 | ||
53 | static const int32_t trigger_matches[] = { | |
54 | SR_TRIGGER_ZERO, | |
55 | SR_TRIGGER_ONE, | |
56 | SR_TRIGGER_RISING, | |
57 | SR_TRIGGER_FALLING, | |
58 | }; | |
59 | ||
60 | ||
61 | static int dev_clear(const struct sr_dev_driver *di) | |
62 | { | |
63 | return std_dev_clear(di, sigma_clear_helper); | |
64 | } | |
65 | ||
3ba56876 | 66 | static GSList *scan(struct sr_dev_driver *di, GSList *options) |
67 | { | |
68 | struct sr_dev_inst *sdi; | |
69 | struct drv_context *drvc; | |
70 | struct dev_context *devc; | |
71 | GSList *devices; | |
72 | struct ftdi_device_list *devlist; | |
73 | char serial_txt[10]; | |
74 | uint32_t serial; | |
75 | int ret; | |
76 | unsigned int i; | |
77 | ||
78 | (void)options; | |
79 | ||
80 | drvc = di->context; | |
81 | ||
82 | devices = NULL; | |
83 | ||
84 | devc = g_malloc0(sizeof(struct dev_context)); | |
85 | ||
86 | ftdi_init(&devc->ftdic); | |
87 | ||
88 | /* Look for SIGMAs. */ | |
89 | ||
90 | if ((ret = ftdi_usb_find_all(&devc->ftdic, &devlist, | |
91 | USB_VENDOR, USB_PRODUCT)) <= 0) { | |
92 | if (ret < 0) | |
93 | sr_err("ftdi_usb_find_all(): %d", ret); | |
94 | goto free; | |
95 | } | |
96 | ||
97 | /* Make sure it's a version 1 or 2 SIGMA. */ | |
98 | ftdi_usb_get_strings(&devc->ftdic, devlist->dev, NULL, 0, NULL, 0, | |
99 | serial_txt, sizeof(serial_txt)); | |
100 | sscanf(serial_txt, "%x", &serial); | |
101 | ||
102 | if (serial < 0xa6010000 || serial > 0xa602ffff) { | |
103 | sr_err("Only SIGMA and SIGMA2 are supported " | |
104 | "in this version of libsigrok."); | |
105 | goto free; | |
106 | } | |
107 | ||
108 | sr_info("Found ASIX SIGMA - Serial: %s", serial_txt); | |
109 | ||
110 | devc->cur_samplerate = samplerates[0]; | |
111 | devc->period_ps = 0; | |
112 | devc->limit_msec = 0; | |
113 | devc->cur_firmware = -1; | |
114 | devc->num_channels = 0; | |
115 | devc->samples_per_event = 0; | |
116 | devc->capture_ratio = 50; | |
117 | devc->use_triggers = 0; | |
118 | ||
119 | /* Register SIGMA device. */ | |
120 | sdi = g_malloc0(sizeof(struct sr_dev_inst)); | |
121 | sdi->status = SR_ST_INITIALIZING; | |
122 | sdi->vendor = g_strdup(USB_VENDOR_NAME); | |
123 | sdi->model = g_strdup(USB_MODEL_NAME); | |
124 | sdi->driver = di; | |
125 | ||
126 | for (i = 0; i < ARRAY_SIZE(channel_names); i++) | |
127 | sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_names[i]); | |
128 | ||
129 | devices = g_slist_append(devices, sdi); | |
130 | drvc->instances = g_slist_append(drvc->instances, sdi); | |
131 | sdi->priv = devc; | |
132 | ||
133 | /* We will open the device again when we need it. */ | |
134 | ftdi_list_free(&devlist); | |
135 | ||
136 | return devices; | |
137 | ||
138 | free: | |
139 | ftdi_deinit(&devc->ftdic); | |
140 | g_free(devc); | |
141 | return NULL; | |
142 | } | |
143 | ||
3ba56876 | 144 | static int dev_open(struct sr_dev_inst *sdi) |
145 | { | |
146 | struct dev_context *devc; | |
147 | int ret; | |
148 | ||
149 | devc = sdi->priv; | |
150 | ||
151 | /* Make sure it's an ASIX SIGMA. */ | |
152 | if ((ret = ftdi_usb_open_desc(&devc->ftdic, | |
153 | USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) { | |
154 | ||
155 | sr_err("ftdi_usb_open failed: %s", | |
156 | ftdi_get_error_string(&devc->ftdic)); | |
157 | ||
158 | return 0; | |
159 | } | |
160 | ||
161 | sdi->status = SR_ST_ACTIVE; | |
162 | ||
163 | return SR_OK; | |
164 | } | |
165 | ||
166 | static int dev_close(struct sr_dev_inst *sdi) | |
167 | { | |
168 | struct dev_context *devc; | |
169 | ||
170 | devc = sdi->priv; | |
171 | ||
172 | /* TODO */ | |
173 | if (sdi->status == SR_ST_ACTIVE) | |
174 | ftdi_usb_close(&devc->ftdic); | |
175 | ||
176 | sdi->status = SR_ST_INACTIVE; | |
177 | ||
178 | return SR_OK; | |
179 | } | |
180 | ||
3ba56876 | 181 | static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi, |
182 | const struct sr_channel_group *cg) | |
183 | { | |
184 | struct dev_context *devc; | |
185 | ||
186 | (void)cg; | |
187 | ||
188 | if (!sdi) | |
189 | return SR_ERR; | |
190 | devc = sdi->priv; | |
191 | ||
192 | switch (key) { | |
193 | case SR_CONF_SAMPLERATE: | |
194 | *data = g_variant_new_uint64(devc->cur_samplerate); | |
195 | break; | |
196 | case SR_CONF_LIMIT_MSEC: | |
197 | *data = g_variant_new_uint64(devc->limit_msec); | |
198 | break; | |
199 | case SR_CONF_CAPTURE_RATIO: | |
200 | *data = g_variant_new_uint64(devc->capture_ratio); | |
201 | break; | |
202 | default: | |
203 | return SR_ERR_NA; | |
204 | } | |
205 | ||
206 | return SR_OK; | |
207 | } | |
208 | ||
209 | static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi, | |
210 | const struct sr_channel_group *cg) | |
211 | { | |
212 | struct dev_context *devc; | |
213 | uint64_t tmp; | |
214 | int ret; | |
215 | ||
216 | (void)cg; | |
217 | ||
218 | if (sdi->status != SR_ST_ACTIVE) | |
219 | return SR_ERR_DEV_CLOSED; | |
220 | ||
221 | devc = sdi->priv; | |
222 | ||
223 | ret = SR_OK; | |
224 | switch (key) { | |
225 | case SR_CONF_SAMPLERATE: | |
226 | ret = sigma_set_samplerate(sdi, g_variant_get_uint64(data)); | |
227 | break; | |
228 | case SR_CONF_LIMIT_MSEC: | |
229 | tmp = g_variant_get_uint64(data); | |
230 | if (tmp > 0) | |
231 | devc->limit_msec = g_variant_get_uint64(data); | |
232 | else | |
233 | ret = SR_ERR; | |
234 | break; | |
235 | case SR_CONF_LIMIT_SAMPLES: | |
236 | tmp = g_variant_get_uint64(data); | |
237 | devc->limit_msec = tmp * 1000 / devc->cur_samplerate; | |
238 | break; | |
239 | case SR_CONF_CAPTURE_RATIO: | |
240 | tmp = g_variant_get_uint64(data); | |
241 | if (tmp <= 100) | |
242 | devc->capture_ratio = tmp; | |
243 | else | |
244 | ret = SR_ERR; | |
245 | break; | |
246 | default: | |
247 | ret = SR_ERR_NA; | |
248 | } | |
249 | ||
250 | return ret; | |
251 | } | |
252 | ||
253 | static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi, | |
254 | const struct sr_channel_group *cg) | |
255 | { | |
256 | GVariant *gvar; | |
257 | GVariantBuilder gvb; | |
258 | ||
259 | (void)cg; | |
260 | ||
261 | switch (key) { | |
262 | case SR_CONF_DEVICE_OPTIONS: | |
263 | if (!sdi) | |
264 | *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32, | |
265 | drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t)); | |
266 | else | |
267 | *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32, | |
268 | devopts, ARRAY_SIZE(devopts), sizeof(uint32_t)); | |
269 | break; | |
270 | case SR_CONF_SAMPLERATE: | |
271 | g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}")); | |
272 | gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates, | |
273 | SAMPLERATES_COUNT, sizeof(uint64_t)); | |
274 | g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar); | |
275 | *data = g_variant_builder_end(&gvb); | |
276 | break; | |
277 | case SR_CONF_TRIGGER_MATCH: | |
278 | *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32, | |
279 | trigger_matches, ARRAY_SIZE(trigger_matches), | |
280 | sizeof(int32_t)); | |
281 | break; | |
282 | default: | |
283 | return SR_ERR_NA; | |
284 | } | |
285 | ||
286 | return SR_OK; | |
287 | } | |
288 | ||
695dc859 | 289 | static int dev_acquisition_start(const struct sr_dev_inst *sdi) |
3ba56876 | 290 | { |
291 | struct dev_context *devc; | |
292 | struct clockselect_50 clockselect; | |
293 | int frac, triggerpin, ret; | |
294 | uint8_t triggerselect = 0; | |
295 | struct triggerinout triggerinout_conf; | |
296 | struct triggerlut lut; | |
297 | ||
298 | if (sdi->status != SR_ST_ACTIVE) | |
299 | return SR_ERR_DEV_CLOSED; | |
300 | ||
301 | devc = sdi->priv; | |
302 | ||
303 | if (sigma_convert_trigger(sdi) != SR_OK) { | |
304 | sr_err("Failed to configure triggers."); | |
305 | return SR_ERR; | |
306 | } | |
307 | ||
308 | /* If the samplerate has not been set, default to 200 kHz. */ | |
309 | if (devc->cur_firmware == -1) { | |
310 | if ((ret = sigma_set_samplerate(sdi, SR_KHZ(200))) != SR_OK) | |
311 | return ret; | |
312 | } | |
313 | ||
314 | /* Enter trigger programming mode. */ | |
315 | sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, devc); | |
316 | ||
317 | /* 100 and 200 MHz mode. */ | |
318 | if (devc->cur_samplerate >= SR_MHZ(100)) { | |
319 | sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, devc); | |
320 | ||
321 | /* Find which pin to trigger on from mask. */ | |
0a1f7b09 | 322 | for (triggerpin = 0; triggerpin < 8; triggerpin++) |
3ba56876 | 323 | if ((devc->trigger.risingmask | devc->trigger.fallingmask) & |
324 | (1 << triggerpin)) | |
325 | break; | |
326 | ||
327 | /* Set trigger pin and light LED on trigger. */ | |
328 | triggerselect = (1 << LEDSEL1) | (triggerpin & 0x7); | |
329 | ||
330 | /* Default rising edge. */ | |
331 | if (devc->trigger.fallingmask) | |
332 | triggerselect |= 1 << 3; | |
333 | ||
334 | /* All other modes. */ | |
335 | } else if (devc->cur_samplerate <= SR_MHZ(50)) { | |
336 | sigma_build_basic_trigger(&lut, devc); | |
337 | ||
338 | sigma_write_trigger_lut(&lut, devc); | |
339 | ||
340 | triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0); | |
341 | } | |
342 | ||
343 | /* Setup trigger in and out pins to default values. */ | |
344 | memset(&triggerinout_conf, 0, sizeof(struct triggerinout)); | |
345 | triggerinout_conf.trgout_bytrigger = 1; | |
346 | triggerinout_conf.trgout_enable = 1; | |
347 | ||
348 | sigma_write_register(WRITE_TRIGGER_OPTION, | |
349 | (uint8_t *) &triggerinout_conf, | |
350 | sizeof(struct triggerinout), devc); | |
351 | ||
352 | /* Go back to normal mode. */ | |
353 | sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, devc); | |
354 | ||
355 | /* Set clock select register. */ | |
356 | if (devc->cur_samplerate == SR_MHZ(200)) | |
357 | /* Enable 4 channels. */ | |
358 | sigma_set_register(WRITE_CLOCK_SELECT, 0xf0, devc); | |
359 | else if (devc->cur_samplerate == SR_MHZ(100)) | |
360 | /* Enable 8 channels. */ | |
361 | sigma_set_register(WRITE_CLOCK_SELECT, 0x00, devc); | |
362 | else { | |
363 | /* | |
364 | * 50 MHz mode (or fraction thereof). Any fraction down to | |
365 | * 50 MHz / 256 can be used, but is not supported by sigrok API. | |
366 | */ | |
367 | frac = SR_MHZ(50) / devc->cur_samplerate - 1; | |
368 | ||
369 | clockselect.async = 0; | |
370 | clockselect.fraction = frac; | |
371 | clockselect.disabled_channels = 0; | |
372 | ||
373 | sigma_write_register(WRITE_CLOCK_SELECT, | |
374 | (uint8_t *) &clockselect, | |
375 | sizeof(clockselect), devc); | |
376 | } | |
377 | ||
378 | /* Setup maximum post trigger time. */ | |
379 | sigma_set_register(WRITE_POST_TRIGGER, | |
380 | (devc->capture_ratio * 255) / 100, devc); | |
381 | ||
382 | /* Start acqusition. */ | |
383 | gettimeofday(&devc->start_tv, 0); | |
384 | sigma_set_register(WRITE_MODE, 0x0d, devc); | |
385 | ||
3ba56876 | 386 | std_session_send_df_header(sdi, LOG_PREFIX); |
387 | ||
388 | /* Add capture source. */ | |
389 | sr_session_source_add(sdi->session, -1, 0, 10, sigma_receive_data, (void *)sdi); | |
390 | ||
391 | devc->state.state = SIGMA_CAPTURE; | |
392 | ||
393 | return SR_OK; | |
394 | } | |
395 | ||
695dc859 | 396 | static int dev_acquisition_stop(struct sr_dev_inst *sdi) |
3ba56876 | 397 | { |
398 | struct dev_context *devc; | |
399 | ||
3ba56876 | 400 | devc = sdi->priv; |
401 | devc->state.state = SIGMA_IDLE; | |
402 | ||
403 | sr_session_source_remove(sdi->session, -1); | |
404 | ||
405 | return SR_OK; | |
406 | } | |
407 | ||
408 | SR_PRIV struct sr_dev_driver asix_sigma_driver_info = { | |
409 | .name = "asix-sigma", | |
410 | .longname = "ASIX SIGMA/SIGMA2", | |
411 | .api_version = 1, | |
c2fdcc25 | 412 | .init = std_init, |
700d6b64 | 413 | .cleanup = std_cleanup, |
3ba56876 | 414 | .scan = scan, |
c01bf34c | 415 | .dev_list = std_dev_list, |
3ba56876 | 416 | .dev_clear = dev_clear, |
417 | .config_get = config_get, | |
418 | .config_set = config_set, | |
419 | .config_list = config_list, | |
420 | .dev_open = dev_open, | |
421 | .dev_close = dev_close, | |
422 | .dev_acquisition_start = dev_acquisition_start, | |
423 | .dev_acquisition_stop = dev_acquisition_stop, | |
424 | .context = NULL, | |
425 | }; |