[libsigrok.git] / hardware / rigol-ds1xx2 / api.c

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <fcntl.h>
#include <unistd.h>
#include <stdlib.h>
#include <string.h>
#include <glib.h>
#include "libsigrok.h"
#include "libsigrok-internal.h"
#include "protocol.h"

#define NUM_TIMEBASE  12
#define NUM_VDIV      8

static const int32_t hwcaps[] = {
	SR_CONF_OSCILLOSCOPE,
	SR_CONF_LIMIT_SAMPLES,
	SR_CONF_TIMEBASE,
	SR_CONF_TRIGGER_SOURCE,
	SR_CONF_TRIGGER_SLOPE,
	SR_CONF_HORIZ_TRIGGERPOS,
	SR_CONF_VDIV,
	SR_CONF_COUPLING,
	SR_CONF_NUM_TIMEBASE,
	SR_CONF_NUM_VDIV,
};

static const uint64_t timebases[][2] = {
	/* nanoseconds */
	{ 2, 1000000000 },
	{ 5, 1000000000 },
	{ 10, 1000000000 },
	{ 20, 1000000000 },
	{ 50, 1000000000 },
	{ 100, 1000000000 },
	{ 500, 1000000000 },
	/* microseconds */
	{ 1, 1000000 },
	{ 2, 1000000 },
	{ 5, 1000000 },
	{ 10, 1000000 },
	{ 20, 1000000 },
	{ 50, 1000000 },
	{ 100, 1000000 },
	{ 200, 1000000 },
	{ 500, 1000000 },
	/* milliseconds */
	{ 1, 1000 },
	{ 2, 1000 },
	{ 5, 1000 },
	{ 10, 1000 },
	{ 20, 1000 },
	{ 50, 1000 },
	{ 100, 1000 },
	{ 200, 1000 },
	{ 500, 1000 },
	/* seconds */
	{ 1, 1 },
	{ 2, 1 },
	{ 5, 1 },
	{ 10, 1 },
	{ 20, 1 },
	{ 50, 1 },
};

static const uint64_t vdivs[][2] = {
	/* millivolts */
	{ 2, 1000 },
	{ 5, 1000 },
	{ 10, 1000 },
	{ 20, 1000 },
	{ 50, 1000 },
	{ 100, 1000 },
	{ 200, 1000 },
	{ 500, 1000 },
	/* volts */
	{ 1, 1 },
	{ 2, 1 },
	{ 5, 1 },
	{ 10, 1 },
};

static const char *trigger_sources[] = {
	"CH1",
	"CH2",
	"EXT",
	"AC Line",
};

static const char *coupling[] = {
	"AC",
	"DC",
	"GND",
};

static const char *supported_models[] = {
	"DS1052E",
	"DS1102E",
	"DS1052D",
	"DS1102D",
};

SR_PRIV struct sr_dev_driver rigol_ds1xx2_driver_info;
static struct sr_dev_driver *di = &rigol_ds1xx2_driver_info;

/* Properly close and free all devices. */
static int clear_instances(void)
{
	struct sr_dev_inst *sdi;
	struct drv_context *drvc;
	struct dev_context *devc;
	GSList *l;

	if (!(drvc = di->priv))
		return SR_OK;

	for (l = drvc->instances; l; l = l->next) {
		if (!(sdi = l->data))
			continue;
		if (!(devc = sdi->priv))
			continue;

		g_free(devc->device);
		g_slist_free(devc->enabled_probes);
		close(devc->fd);

		sr_dev_inst_free(sdi);
	}

	g_slist_free(drvc->instances);
	drvc->instances = NULL;

	return SR_OK;
}

static int hw_init(struct sr_context *sr_ctx)
{
	return std_hw_init(sr_ctx, di, DRIVER_LOG_DOMAIN);
}

static GSList *hw_scan(GSList *options)
{
	struct drv_context *drvc;
	struct sr_dev_inst *sdi;
	struct dev_context *devc;
	struct sr_probe *probe;
	GSList *devices;
	GDir *dir;
	const gchar *dev_name;
	const gchar *dev_dir = "/dev/";
	const gchar *prefix = "usbtmc";
	gchar *device;
	const gchar *idn_query = "*IDN?";
	unsigned int i;
	int len, num_tokens, fd;
	const gchar *delimiter = ",";
	gchar **tokens;
	const char *manufacturer, *model, *version;
	gboolean matched = FALSE;
	char buf[256];

	(void)options;

	drvc = di->priv;
	drvc->instances = NULL;

	devices = NULL;

	dir = g_dir_open("/sys/class/usb/", 0, NULL);

	if (dir == NULL)
		return NULL;

	while ((dev_name = g_dir_read_name(dir)) != NULL) {
		if (strncmp(dev_name, prefix, strlen(prefix))) 
			continue;

		device = g_strconcat(dev_dir, dev_name, NULL);

		fd = open(device, O_RDWR);
		len = write(fd, idn_query, strlen(idn_query));
		len = read(fd, buf, sizeof(buf));
		close(fd);
		if (len == 0) {
			g_free(device);
			return NULL;
		}

		buf[len] = 0;
		tokens = g_strsplit(buf, delimiter, 0);
		close(fd);
		sr_dbg("response: %s %d [%s]", device, len, buf);

		for (num_tokens = 0; tokens[num_tokens] != NULL; num_tokens++);

		if (num_tokens < 4) {
			g_strfreev(tokens);
			g_free(device);
			return NULL;
		}

		manufacturer = tokens[0];
		model = tokens[1];
		version = tokens[3];

		if (strcmp(manufacturer, "Rigol Technologies")) {
			g_strfreev(tokens);
			g_free(device);
			return NULL;
		}

		for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
			if (!strcmp(model, supported_models[i])) {
				matched = 1;
				break;
			}
		}

		if (!matched || !(sdi = sr_dev_inst_new(0, SR_ST_ACTIVE,
			manufacturer, model, version))) {
			g_strfreev(tokens);
			g_free(device);
			return NULL;
		}

		g_strfreev(tokens);

		if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
			sr_err("Device context malloc failed.");
			g_free(device);
			return NULL;
		}

		devc->device = device;

		sdi->priv = devc;
		sdi->driver = di;

		for (i = 0; i < 2; i++) {
			if (!(probe = sr_probe_new(0, SR_PROBE_ANALOG, TRUE,
			    i == 0 ? "CH1" : "CH2")))
				return NULL;
			sdi->probes = g_slist_append(sdi->probes, probe);
		}

		drvc->instances = g_slist_append(drvc->instances, sdi);
		devices = g_slist_append(devices, sdi);
	}

	g_dir_close(dir);

	return devices;
}

static GSList *hw_dev_list(void)
{
	return ((struct drv_context *)(di->priv))->instances;
}

static int hw_dev_open(struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	int fd;

	devc = sdi->priv;

	if ((fd = open(devc->device, O_RDWR)) == -1)
		return SR_ERR;

	devc->fd = fd;

	devc->scale = 1;

	return SR_OK;
}

static int hw_dev_close(struct sr_dev_inst *sdi)
{
	struct dev_context *devc;

	devc = sdi->priv;

	close(devc->fd);

	return SR_OK;
}

static int hw_cleanup(void)
{
	clear_instances();

	return SR_OK;
}

static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi)
{

	(void)sdi;

	switch (id) {
	case SR_CONF_NUM_TIMEBASE:
		*data = g_variant_new_int32(NUM_TIMEBASE);
		break;
	case SR_CONF_NUM_VDIV:
		*data = g_variant_new_int32(NUM_VDIV);
		break;
	default:
		return SR_ERR_ARG;
	}

	return SR_OK;
}

static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	uint64_t tmp_u64, p, q;
	double tmp_double;
	unsigned int i;
	int tmp_int, ret;
	const char *tmp_str, *channel;

	devc = sdi->priv;

	if (sdi->status != SR_ST_ACTIVE) {
		sr_err("Device inactive, can't set config options.");
		return SR_ERR;
	}

	ret = SR_OK;
	switch (id) {
	case SR_CONF_LIMIT_FRAMES:
		devc->limit_frames = g_variant_get_uint64(data);
		break;
	case SR_CONF_TRIGGER_SLOPE:
		tmp_u64 = g_variant_get_uint64(data);
		rigol_ds1xx2_send_data(devc->fd, ":TRIG:EDGE:SLOP %s\n",
				       tmp_u64 ? "POS" : "NEG");
		break;
	case SR_CONF_HORIZ_TRIGGERPOS:
		tmp_double = g_variant_get_double(data);
		rigol_ds1xx2_send_data(devc->fd, ":TIM:OFFS %.9f\n", tmp_double);
		break;
	case SR_CONF_TIMEBASE:
		g_variant_get(data, "(tt)", &p, &q);
		tmp_int = -1;
		for (i = 0; i < ARRAY_SIZE(timebases); i++) {
			if (timebases[i][0] == p && timebases[i][1] == q) {
				tmp_int = i;
				break;
			}
		}
		if (tmp_int >= 0)
			rigol_ds1xx2_send_data(devc->fd, ":TIM:SCAL %.9f\n",
					(float)timebases[i][0] / timebases[i][1]);
		break;
	case SR_CONF_TRIGGER_SOURCE:
		tmp_str = g_variant_get_string(data, NULL);
		if (!strcmp(tmp_str, "CH1"))
			channel = "CHAN1";
		else if (!strcmp(tmp_str, "CH2"))
			channel = "CHAN2";
		else if (!strcmp(tmp_str, "EXT"))
			channel = "EXT";
		else if (!strcmp(tmp_str, "AC Line"))
			channel = "ACL";
		else {
			ret = SR_ERR_ARG;
			break;
		}
		rigol_ds1xx2_send_data(devc->fd, ":TRIG:EDGE:SOUR %s\n", channel);
		break;
	case SR_CONF_VDIV:
		g_variant_get(data, "(tt)", &p, &q);
		tmp_int = -1;
		for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
			if (vdivs[i][0] != p || vdivs[i][1] != q)
				continue;
			devc->scale = (float)vdivs[i][0] / vdivs[i][1];
			rigol_ds1xx2_send_data(devc->fd, ":CHAN0:SCAL %.3f\n",
					devc->scale);
			rigol_ds1xx2_send_data(devc->fd, ":CHAN1:SCAL %.3f\n",
					devc->scale);
			break;
		}
		if (i == ARRAY_SIZE(vdivs))
			ret = SR_ERR_ARG;
		break;
	case SR_CONF_COUPLING:
		/* TODO: Not supporting coupling per channel yet. */
		tmp_str = g_variant_get_string(data, NULL);
		for (i = 0; i < ARRAY_SIZE(coupling); i++) {
			if (!strcmp(tmp_str, coupling[i])) {
				rigol_ds1xx2_send_data(devc->fd, ":CHAN0:COUP %s\n",
						coupling[i]);
				rigol_ds1xx2_send_data(devc->fd, ":CHAN1:COUP %s\n",
						coupling[i]);
				break;
			}
		}
		if (i == ARRAY_SIZE(coupling))
			ret = SR_ERR_ARG;
		break;
	default:
		sr_err("Unknown hardware capability: %d.", id);
		ret = SR_ERR_ARG;
		break;
	}

	return ret;
}

static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi)
{
	GVariant *tuple, *rational[2];
	GVariantBuilder gvb;
	unsigned int i;

	(void)sdi;

	switch (key) {
	case SR_CONF_DEVICE_OPTIONS:
		*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
				hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
		break;
	case SR_CONF_COUPLING:
		*data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
		break;
	case SR_CONF_VDIV:
		g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
		for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
			rational[0] = g_variant_new_uint64(vdivs[i][0]);
			rational[1] = g_variant_new_uint64(vdivs[i][1]);
			tuple = g_variant_new_tuple(rational, 2);
			g_variant_builder_add_value(&gvb, tuple);
		}
		*data = g_variant_builder_end(&gvb);
		break;
	case SR_CONF_TIMEBASE:
		g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
		for (i = 0; i < ARRAY_SIZE(timebases); i++) {
			rational[0] = g_variant_new_uint64(timebases[i][0]);
			rational[1] = g_variant_new_uint64(timebases[i][1]);
			tuple = g_variant_new_tuple(rational, 2);
			g_variant_builder_add_value(&gvb, tuple);
		}
		*data = g_variant_builder_end(&gvb);
		break;
	case SR_CONF_TRIGGER_SOURCE:
		*data = g_variant_new_strv(trigger_sources,
				ARRAY_SIZE(trigger_sources));
		break;
	default:
		return SR_ERR_ARG;
	}

	return SR_OK;
}

static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
				    void *cb_data)
{
	struct dev_context *devc;
	char buf[256];
	int len;

	(void)cb_data;

	devc = sdi->priv;

	devc->num_frames = devc->num_frame_samples = 0;

	sr_source_add(devc->fd, G_IO_IN, 50, rigol_ds1xx2_receive_data, (void *)sdi);

	/* Send header packet to the session bus. */
	std_session_send_df_header(cb_data, DRIVER_LOG_DOMAIN);

	/* Hardcoded to CH1 only. */
	devc->enabled_probes = g_slist_append(NULL, sdi->probes->data);
	rigol_ds1xx2_send_data(devc->fd, ":CHAN1:SCAL?\n");
	len = read(devc->fd, buf, sizeof(buf));
	buf[len] = 0;
	devc->scale = atof(buf);
	sr_dbg("Scale is %.3f.", devc->scale);
	rigol_ds1xx2_send_data(devc->fd, ":CHAN1:OFFS?\n");
	len = read(devc->fd, buf, sizeof(buf));
	buf[len] = 0;
	devc->offset = atof(buf);
	sr_dbg("Offset is %.6f.", devc->offset);
	rigol_ds1xx2_send_data(devc->fd, ":WAV:DATA?\n");

	return SR_OK;
}

static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
{
	struct dev_context *devc;

	(void)cb_data;

	devc = sdi->priv;

	if (sdi->status != SR_ST_ACTIVE) {
		sr_err("Device inactive, can't stop acquisition.");
		return SR_ERR;
	}

	sr_source_remove(devc->fd);

	return SR_OK;
}

SR_PRIV struct sr_dev_driver rigol_ds1xx2_driver_info = {
	.name = "rigol-ds1xx2",
	.longname = "Rigol DS1xx2",
	.api_version = 1,
	.init = hw_init,
	.cleanup = hw_cleanup,
	.scan = hw_scan,
	.dev_list = hw_dev_list,
	.dev_clear = clear_instances,
	.config_get = config_get,
	.config_set = config_set,
	.config_list = config_list,
	.dev_open = hw_dev_open,
	.dev_close = hw_dev_close,
	.dev_acquisition_start = hw_dev_acquisition_start,
	.dev_acquisition_stop = hw_dev_acquisition_stop,
	.priv = NULL,
};
Commit	Line	Data
f4816ac6 ML	1	/*
	2	* This file is part of the libsigrok project.
	3	*
	4	* Copyright (C) 2012 Martin Ling <martin-git@earth.li>
	5	*
	6	* This program is free software: you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation, either version 3 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
e0b7d23c ML	20	#include <fcntl.h>
	21	#include <unistd.h>
	22	#include <stdlib.h>
	23	#include <string.h>
f4816ac6 ML	24	#include <glib.h>
	25	#include "libsigrok.h"
	26	#include "libsigrok-internal.h"
	27	#include "protocol.h"
	28
d62d7ad1 BV	29	#define NUM_TIMEBASE 12
	30	#define NUM_VDIV 8
	31
f6a0ac9f	32	static const int32_t hwcaps[] = {
1953564a BV	33	SR_CONF_OSCILLOSCOPE,
	34	SR_CONF_LIMIT_SAMPLES,
	35	SR_CONF_TIMEBASE,
	36	SR_CONF_TRIGGER_SOURCE,
	37	SR_CONF_TRIGGER_SLOPE,
	38	SR_CONF_HORIZ_TRIGGERPOS,
	39	SR_CONF_VDIV,
	40	SR_CONF_COUPLING,
d62d7ad1 BV	41	SR_CONF_NUM_TIMEBASE,
d62d7ad1 BV	42	SR_CONF_NUM_VDIV,
e0b7d23c ML	43	};
e0b7d23c ML	44
f6a0ac9f	45	static const uint64_t timebases[][2] = {
e0b7d23c ML	46	/* nanoseconds */
	47	{ 2, 1000000000 },
	48	{ 5, 1000000000 },
	49	{ 10, 1000000000 },
	50	{ 20, 1000000000 },
	51	{ 50, 1000000000 },
	52	{ 100, 1000000000 },
	53	{ 500, 1000000000 },
	54	/* microseconds */
	55	{ 1, 1000000 },
	56	{ 2, 1000000 },
	57	{ 5, 1000000 },
	58	{ 10, 1000000 },
	59	{ 20, 1000000 },
	60	{ 50, 1000000 },
	61	{ 100, 1000000 },
	62	{ 200, 1000000 },
	63	{ 500, 1000000 },
	64	/* milliseconds */
	65	{ 1, 1000 },
	66	{ 2, 1000 },
	67	{ 5, 1000 },
	68	{ 10, 1000 },
	69	{ 20, 1000 },
	70	{ 50, 1000 },
	71	{ 100, 1000 },
	72	{ 200, 1000 },
	73	{ 500, 1000 },
	74	/* seconds */
	75	{ 1, 1 },
	76	{ 2, 1 },
	77	{ 5, 1 },
	78	{ 10, 1 },
	79	{ 20, 1 },
	80	{ 50, 1 },
e0b7d23c ML	81	};
e0b7d23c ML	82
f6a0ac9f	83	static const uint64_t vdivs[][2] = {
e0b7d23c ML	84	/* millivolts */
	85	{ 2, 1000 },
	86	{ 5, 1000 },
	87	{ 10, 1000 },
	88	{ 20, 1000 },
	89	{ 50, 1000 },
	90	{ 100, 1000 },
	91	{ 200, 1000 },
	92	{ 500, 1000 },
	93	/* volts */
	94	{ 1, 1 },
	95	{ 2, 1 },
	96	{ 5, 1 },
	97	{ 10, 1 },
e0b7d23c ML	98	};
	99
	100	static const char *trigger_sources[] = {
	101	"CH1",
	102	"CH2",
	103	"EXT",
	104	"AC Line",
e0b7d23c ML	105	};
	106
	107	static const char *coupling[] = {
	108	"AC",
	109	"DC",
	110	"GND",
e0b7d23c ML	111	};
e0b7d23c ML	112
512bb890 BV	113	static const char *supported_models[] = {
	114	"DS1052E",
	115	"DS1102E",
	116	"DS1052D",
333bf022	117	"DS1102D",
512bb890 BV	118	};
512bb890 BV	119
f4816ac6 ML	120	SR_PRIV struct sr_dev_driver rigol_ds1xx2_driver_info;
	121	static struct sr_dev_driver *di = &rigol_ds1xx2_driver_info;
	122
	123	/* Properly close and free all devices. */
	124	static int clear_instances(void)
	125	{
	126	struct sr_dev_inst *sdi;
	127	struct drv_context *drvc;
	128	struct dev_context *devc;
	129	GSList *l;
	130
	131	if (!(drvc = di->priv))
	132	return SR_OK;
	133
	134	for (l = drvc->instances; l; l = l->next) {
	135	if (!(sdi = l->data))
	136	continue;
	137	if (!(devc = sdi->priv))
	138	continue;
	139
fb6e5ba8	140	g_free(devc->device);
69e19dd7	141	g_slist_free(devc->enabled_probes);
e0b7d23c	142	close(devc->fd);
f4816ac6 ML	143
	144	sr_dev_inst_free(sdi);
	145	}
	146
	147	g_slist_free(drvc->instances);
	148	drvc->instances = NULL;
	149
	150	return SR_OK;
	151	}
	152
e0b7d23c	153	static int hw_init(struct sr_context *sr_ctx)
f4816ac6	154	{
063e7aef	155	return std_hw_init(sr_ctx, di, DRIVER_LOG_DOMAIN);
f4816ac6 ML	156	}
	157
	158	static GSList hw_scan(GSList options)
	159	{
	160	struct drv_context *drvc;
e0b7d23c ML	161	struct sr_dev_inst *sdi;
	162	struct dev_context *devc;
	163	struct sr_probe *probe;
f4816ac6	164	GSList *devices;
fb6e5ba8 ML	165	GDir *dir;
	166	const gchar *dev_name;
	167	const gchar *dev_dir = "/dev/";
	168	const gchar *prefix = "usbtmc";
	169	gchar *device;
	170	const gchar idn_query = "IDN?";
f6a0ac9f BV	171	unsigned int i;
f6a0ac9f BV	172	int len, num_tokens, fd;
fb6e5ba8 ML	173	const gchar *delimiter = ",";
fb6e5ba8 ML	174	gchar **tokens;
512bb890	175	const char manufacturer, model, *version;
512bb890	176	gboolean matched = FALSE;
fb6e5ba8 ML	177	char buf[256];
fb6e5ba8 ML	178
f4816ac6 ML	179	(void)options;
f4816ac6 ML	180
f4816ac6 ML	181	drvc = di->priv;
	182	drvc->instances = NULL;
	183
4b97c74e UH	184	devices = NULL;
4b97c74e UH	185
fb6e5ba8	186	dir = g_dir_open("/sys/class/usb/", 0, NULL);
e0b7d23c	187
fb6e5ba8 ML	188	if (dir == NULL)
fb6e5ba8 ML	189	return NULL;
e0b7d23c	190
29d957ce	191	while ((dev_name = g_dir_read_name(dir)) != NULL) {
fb6e5ba8 ML	192	if (strncmp(dev_name, prefix, strlen(prefix)))
	193	continue;
	194
	195	device = g_strconcat(dev_dir, dev_name, NULL);
	196
	197	fd = open(device, O_RDWR);
	198	len = write(fd, idn_query, strlen(idn_query));
	199	len = read(fd, buf, sizeof(buf));
	200	close(fd);
29d957ce	201	if (len == 0) {
fb6e5ba8 ML	202	g_free(device);
	203	return NULL;
	204	}
	205
	206	buf[len] = 0;
	207	tokens = g_strsplit(buf, delimiter, 0);
	208	close(fd);
512bb890	209	sr_dbg("response: %s %d [%s]", device, len, buf);
fb6e5ba8 ML	210
	211	for (num_tokens = 0; tokens[num_tokens] != NULL; num_tokens++);
	212
512bb890	213	if (num_tokens < 4) {
fb6e5ba8 ML	214	g_strfreev(tokens);
fb6e5ba8 ML	215	g_free(device);
e0b7d23c	216	return NULL;
fb6e5ba8	217	}
512bb890 BV	218
	219	manufacturer = tokens[0];
	220	model = tokens[1];
	221	version = tokens[3];
	222
	223	if (strcmp(manufacturer, "Rigol Technologies")) {
	224	g_strfreev(tokens);
	225	g_free(device);
	226	return NULL;
	227	}
	228
333bf022	229	for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
512bb890 BV	230	if (!strcmp(model, supported_models[i])) {
	231	matched = 1;
	232	break;
	233	}
	234	}
	235
	236	if (!matched \|\| !(sdi = sr_dev_inst_new(0, SR_ST_ACTIVE,
	237	manufacturer, model, version))) {
	238	g_strfreev(tokens);
	239	g_free(device);
	240	return NULL;
	241	}
	242
fb6e5ba8 ML	243	g_strfreev(tokens);
fb6e5ba8 ML	244
29d957ce UH	245	if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
29d957ce UH	246	sr_err("Device context malloc failed.");
fb6e5ba8 ML	247	g_free(device);
	248	return NULL;
	249	}
	250
	251	devc->device = device;
	252
	253	sdi->priv = devc;
	254	sdi->driver = di;
	255
29d957ce UH	256	for (i = 0; i < 2; i++) {
	257	if (!(probe = sr_probe_new(0, SR_PROBE_ANALOG, TRUE,
	258	i == 0 ? "CH1" : "CH2")))
fb6e5ba8 ML	259	return NULL;
	260	sdi->probes = g_slist_append(sdi->probes, probe);
	261	}
	262
	263	drvc->instances = g_slist_append(drvc->instances, sdi);
	264	devices = g_slist_append(devices, sdi);
e0b7d23c	265	}
fb6e5ba8 ML	266
fb6e5ba8 ML	267	g_dir_close(dir);
f4816ac6 ML	268
	269	return devices;
	270	}
	271
	272	static GSList *hw_dev_list(void)
	273	{
0e94d524	274	return ((struct drv_context *)(di->priv))->instances;
f4816ac6 ML	275	}
	276
	277	static int hw_dev_open(struct sr_dev_inst *sdi)
	278	{
29d957ce UH	279	struct dev_context *devc;
29d957ce UH	280	int fd;
fb6e5ba8	281
29d957ce	282	devc = sdi->priv;
e0b7d23c	283
29d957ce	284	if ((fd = open(devc->device, O_RDWR)) == -1)
e0b7d23c ML	285	return SR_ERR;
e0b7d23c ML	286
e0b7d23c ML	287	devc->fd = fd;
	288
	289	devc->scale = 1;
f4816ac6 ML	290
	291	return SR_OK;
	292	}
	293
	294	static int hw_dev_close(struct sr_dev_inst *sdi)
	295	{
29d957ce UH	296	struct dev_context *devc;
	297
	298	devc = sdi->priv;
e0b7d23c ML	299
e0b7d23c ML	300	close(devc->fd);
f4816ac6 ML	301
	302	return SR_OK;
	303	}
	304
	305	static int hw_cleanup(void)
	306	{
	307	clear_instances();
	308
f4816ac6 ML	309	return SR_OK;
	310	}
	311
d62d7ad1 BV	312	static int config_get(int id, GVariant *data, const struct sr_dev_inst sdi)
	313	{
	314
	315	(void)sdi;
	316
	317	switch (id) {
	318	case SR_CONF_NUM_TIMEBASE:
	319	*data = g_variant_new_int32(NUM_TIMEBASE);
	320	break;
	321	case SR_CONF_NUM_VDIV:
	322	*data = g_variant_new_int32(NUM_VDIV);
	323	break;
	324	default:
	325	return SR_ERR_ARG;
	326	}
	327
	328	return SR_OK;
	329	}
	330
f6a0ac9f	331	static int config_set(int id, GVariant data, const struct sr_dev_inst sdi)
f4816ac6	332	{
29d957ce	333	struct dev_context *devc;
f6a0ac9f BV	334	uint64_t tmp_u64, p, q;
	335	double tmp_double;
	336	unsigned int i;
	337	int tmp_int, ret;
	338	const char tmp_str, channel;
f4816ac6	339
29d957ce UH	340	devc = sdi->priv;
29d957ce UH	341
f4816ac6 ML	342	if (sdi->status != SR_ST_ACTIVE) {
	343	sr_err("Device inactive, can't set config options.");
	344	return SR_ERR;
	345	}
	346
	347	ret = SR_OK;
035a1078	348	switch (id) {
1953564a	349	case SR_CONF_LIMIT_FRAMES:
f6a0ac9f	350	devc->limit_frames = g_variant_get_uint64(data);
e0b7d23c	351	break;
1953564a	352	case SR_CONF_TRIGGER_SLOPE:
f6a0ac9f	353	tmp_u64 = g_variant_get_uint64(data);
29d957ce UH	354	rigol_ds1xx2_send_data(devc->fd, ":TRIG:EDGE:SLOP %s\n",
29d957ce UH	355	tmp_u64 ? "POS" : "NEG");
e0b7d23c	356	break;
1953564a	357	case SR_CONF_HORIZ_TRIGGERPOS:
f6a0ac9f BV	358	tmp_double = g_variant_get_double(data);
f6a0ac9f BV	359	rigol_ds1xx2_send_data(devc->fd, ":TIM:OFFS %.9f\n", tmp_double);
e0b7d23c	360	break;
1953564a	361	case SR_CONF_TIMEBASE:
f6a0ac9f BV	362	g_variant_get(data, "(tt)", &p, &q);
	363	tmp_int = -1;
	364	for (i = 0; i < ARRAY_SIZE(timebases); i++) {
	365	if (timebases[i][0] == p && timebases[i][1] == q) {
	366	tmp_int = i;
	367	break;
	368	}
	369	}
	370	if (tmp_int >= 0)
	371	rigol_ds1xx2_send_data(devc->fd, ":TIM:SCAL %.9f\n",
	372	(float)timebases[i][0] / timebases[i][1]);
e0b7d23c	373	break;
1953564a	374	case SR_CONF_TRIGGER_SOURCE:
f6a0ac9f BV	375	tmp_str = g_variant_get_string(data, NULL);
f6a0ac9f BV	376	if (!strcmp(tmp_str, "CH1"))
e0b7d23c	377	channel = "CHAN1";
f6a0ac9f	378	else if (!strcmp(tmp_str, "CH2"))
e0b7d23c	379	channel = "CHAN2";
f6a0ac9f	380	else if (!strcmp(tmp_str, "EXT"))
e0b7d23c	381	channel = "EXT";
f6a0ac9f	382	else if (!strcmp(tmp_str, "AC Line"))
e0b7d23c	383	channel = "ACL";
29d957ce	384	else {
e0b7d23c ML	385	ret = SR_ERR_ARG;
e0b7d23c ML	386	break;
4e108ace ML	387	}
4e108ace ML	388	rigol_ds1xx2_send_data(devc->fd, ":TRIG:EDGE:SOUR %s\n", channel);
e0b7d23c	389	break;
1953564a	390	case SR_CONF_VDIV:
f6a0ac9f BV	391	g_variant_get(data, "(tt)", &p, &q);
	392	tmp_int = -1;
	393	for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
	394	if (vdivs[i][0] != p \|\| vdivs[i][1] != q)
	395	continue;
	396	devc->scale = (float)vdivs[i][0] / vdivs[i][1];
	397	rigol_ds1xx2_send_data(devc->fd, ":CHAN0:SCAL %.3f\n",
	398	devc->scale);
	399	rigol_ds1xx2_send_data(devc->fd, ":CHAN1:SCAL %.3f\n",
	400	devc->scale);
	401	break;
e0b7d23c	402	}
f6a0ac9f	403	if (i == ARRAY_SIZE(vdivs))
e0b7d23c ML	404	ret = SR_ERR_ARG;
e0b7d23c ML	405	break;
1953564a	406	case SR_CONF_COUPLING:
e0b7d23c	407	/* TODO: Not supporting coupling per channel yet. */
f6a0ac9f BV	408	tmp_str = g_variant_get_string(data, NULL);
	409	for (i = 0; i < ARRAY_SIZE(coupling); i++) {
	410	if (!strcmp(tmp_str, coupling[i])) {
	411	rigol_ds1xx2_send_data(devc->fd, ":CHAN0:COUP %s\n",
	412	coupling[i]);
	413	rigol_ds1xx2_send_data(devc->fd, ":CHAN1:COUP %s\n",
	414	coupling[i]);
e0b7d23c ML	415	break;
	416	}
	417	}
f6a0ac9f	418	if (i == ARRAY_SIZE(coupling))
e0b7d23c ML	419	ret = SR_ERR_ARG;
e0b7d23c ML	420	break;
f4816ac6	421	default:
035a1078	422	sr_err("Unknown hardware capability: %d.", id);
f4816ac6	423	ret = SR_ERR_ARG;
29d957ce	424	break;
f4816ac6 ML	425	}
	426
	427	return ret;
	428	}
	429
f6a0ac9f	430	static int config_list(int key, GVariant *data, const struct sr_dev_inst sdi)
a1c743fc	431	{
861c447b BV	432	GVariant tuple, rational[2];
	433	GVariantBuilder gvb;
	434	unsigned int i;
a1c743fc BV	435
	436	(void)sdi;
	437
	438	switch (key) {
9a6517d1	439	case SR_CONF_DEVICE_OPTIONS:
f6a0ac9f BV	440	*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
f6a0ac9f BV	441	hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
9a6517d1	442	break;
2a7b113d	443	case SR_CONF_COUPLING:
f6a0ac9f	444	*data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
2a7b113d	445	break;
e4f2b2ad	446	case SR_CONF_VDIV:
861c447b BV	447	g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
	448	for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
	449	rational[0] = g_variant_new_uint64(vdivs[i][0]);
	450	rational[1] = g_variant_new_uint64(vdivs[i][1]);
	451	tuple = g_variant_new_tuple(rational, 2);
	452	g_variant_builder_add_value(&gvb, tuple);
	453	}
	454	*data = g_variant_builder_end(&gvb);
e4f2b2ad	455	break;
41f5bd09	456	case SR_CONF_TIMEBASE:
861c447b BV	457	g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
	458	for (i = 0; i < ARRAY_SIZE(timebases); i++) {
	459	rational[0] = g_variant_new_uint64(timebases[i][0]);
	460	rational[1] = g_variant_new_uint64(timebases[i][1]);
	461	tuple = g_variant_new_tuple(rational, 2);
	462	g_variant_builder_add_value(&gvb, tuple);
	463	}
	464	*data = g_variant_builder_end(&gvb);
41f5bd09	465	break;
328bafab	466	case SR_CONF_TRIGGER_SOURCE:
f6a0ac9f BV	467	*data = g_variant_new_strv(trigger_sources,
f6a0ac9f BV	468	ARRAY_SIZE(trigger_sources));
328bafab	469	break;
a1c743fc BV	470	default:
	471	return SR_ERR_ARG;
	472	}
	473
	474	return SR_OK;
	475	}
	476
f4816ac6 ML	477	static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
	478	void *cb_data)
	479	{
29d957ce	480	struct dev_context *devc;
e0b7d23c ML	481	char buf[256];
e0b7d23c ML	482	int len;
29d957ce	483
e0b7d23c ML	484	(void)cb_data;
e0b7d23c ML	485
29d957ce UH	486	devc = sdi->priv;
29d957ce UH	487
75d8a4e5	488	devc->num_frames = devc->num_frame_samples = 0;
e0b7d23c ML	489
	490	sr_source_add(devc->fd, G_IO_IN, 50, rigol_ds1xx2_receive_data, (void *)sdi);
	491
	492	/* Send header packet to the session bus. */
4afdfd46	493	std_session_send_df_header(cb_data, DRIVER_LOG_DOMAIN);
e0b7d23c	494
69e19dd7 BV	495	/* Hardcoded to CH1 only. */
69e19dd7 BV	496	devc->enabled_probes = g_slist_append(NULL, sdi->probes->data);
e0b7d23c ML	497	rigol_ds1xx2_send_data(devc->fd, ":CHAN1:SCAL?\n");
	498	len = read(devc->fd, buf, sizeof(buf));
	499	buf[len] = 0;
	500	devc->scale = atof(buf);
29d957ce	501	sr_dbg("Scale is %.3f.", devc->scale);
e0b7d23c ML	502	rigol_ds1xx2_send_data(devc->fd, ":CHAN1:OFFS?\n");
	503	len = read(devc->fd, buf, sizeof(buf));
	504	buf[len] = 0;
	505	devc->offset = atof(buf);
29d957ce	506	sr_dbg("Offset is %.6f.", devc->offset);
e0b7d23c	507	rigol_ds1xx2_send_data(devc->fd, ":WAV:DATA?\n");
f4816ac6 ML	508
	509	return SR_OK;
	510	}
	511
	512	static int hw_dev_acquisition_stop(struct sr_dev_inst sdi, void cb_data)
	513	{
29d957ce UH	514	struct dev_context *devc;
29d957ce UH	515
f4816ac6 ML	516	(void)cb_data;
f4816ac6 ML	517
29d957ce UH	518	devc = sdi->priv;
29d957ce UH	519
f4816ac6 ML	520	if (sdi->status != SR_ST_ACTIVE) {
	521	sr_err("Device inactive, can't stop acquisition.");
	522	return SR_ERR;
	523	}
	524
e0b7d23c	525	sr_source_remove(devc->fd);
f4816ac6 ML	526
	527	return SR_OK;
	528	}
	529
	530	SR_PRIV struct sr_dev_driver rigol_ds1xx2_driver_info = {
	531	.name = "rigol-ds1xx2",
	532	.longname = "Rigol DS1xx2",
	533	.api_version = 1,
	534	.init = hw_init,
	535	.cleanup = hw_cleanup,
	536	.scan = hw_scan,
	537	.dev_list = hw_dev_list,
	538	.dev_clear = clear_instances,
d62d7ad1	539	.config_get = config_get,
035a1078	540	.config_set = config_set,
a1c743fc	541	.config_list = config_list,
f4816ac6 ML	542	.dev_open = hw_dev_open,
f4816ac6 ML	543	.dev_close = hw_dev_close,
f4816ac6 ML	544	.dev_acquisition_start = hw_dev_acquisition_start,
	545	.dev_acquisition_stop = hw_dev_acquisition_stop,
	546	.priv = NULL,
	547	};