[libsigrok.git] / hardware / rigol-ds1xx2 / api.c

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <fcntl.h>
#include <unistd.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#include <glib.h>
#include "libsigrok.h"
#include "libsigrok-internal.h"
#include "protocol.h"

#define NUM_TIMEBASE  12
#define NUM_VDIV      8

static const int32_t hwcaps[] = {
	SR_CONF_OSCILLOSCOPE,
	SR_CONF_LIMIT_SAMPLES,
	SR_CONF_TIMEBASE,
	SR_CONF_TRIGGER_SOURCE,
	SR_CONF_TRIGGER_SLOPE,
	SR_CONF_HORIZ_TRIGGERPOS,
	SR_CONF_VDIV,
	SR_CONF_COUPLING,
	SR_CONF_NUM_TIMEBASE,
	SR_CONF_NUM_VDIV,
};

static const uint64_t timebases[][2] = {
	/* nanoseconds */
	{ 2, 1000000000 },
	{ 5, 1000000000 },
	{ 10, 1000000000 },
	{ 20, 1000000000 },
	{ 50, 1000000000 },
	{ 100, 1000000000 },
	{ 500, 1000000000 },
	/* microseconds */
	{ 1, 1000000 },
	{ 2, 1000000 },
	{ 5, 1000000 },
	{ 10, 1000000 },
	{ 20, 1000000 },
	{ 50, 1000000 },
	{ 100, 1000000 },
	{ 200, 1000000 },
	{ 500, 1000000 },
	/* milliseconds */
	{ 1, 1000 },
	{ 2, 1000 },
	{ 5, 1000 },
	{ 10, 1000 },
	{ 20, 1000 },
	{ 50, 1000 },
	{ 100, 1000 },
	{ 200, 1000 },
	{ 500, 1000 },
	/* seconds */
	{ 1, 1 },
	{ 2, 1 },
	{ 5, 1 },
	{ 10, 1 },
	{ 20, 1 },
	{ 50, 1 },
};

static const uint64_t vdivs[][2] = {
	/* millivolts */
	{ 2, 1000 },
	{ 5, 1000 },
	{ 10, 1000 },
	{ 20, 1000 },
	{ 50, 1000 },
	{ 100, 1000 },
	{ 200, 1000 },
	{ 500, 1000 },
	/* volts */
	{ 1, 1 },
	{ 2, 1 },
	{ 5, 1 },
	{ 10, 1 },
};

static const char *trigger_sources[] = {
	"CH1",
	"CH2",
	"EXT",
	"AC Line",
};

static const char *coupling[] = {
	"AC",
	"DC",
	"GND",
};

static const char *supported_models[] = {
	"DS1052E",
	"DS1102E",
	"DS1052D",
	"DS1102D",
};

SR_PRIV struct sr_dev_driver rigol_ds1xx2_driver_info;
static struct sr_dev_driver *di = &rigol_ds1xx2_driver_info;

/* Properly close and free all devices. */
static int clear_instances(void)
{
	struct sr_dev_inst *sdi;
	struct drv_context *drvc;
	struct dev_context *devc;
	GSList *l;

	if (!(drvc = di->priv))
		return SR_OK;

	for (l = drvc->instances; l; l = l->next) {
		if (!(sdi = l->data))
			continue;
		if (!(devc = sdi->priv))
			continue;

		g_free(devc->device);
		g_free(devc->coupling[0]);
		g_free(devc->coupling[1]);
		g_free(devc->trigger_source);
		g_free(devc->trigger_slope);
		close(devc->fd);

		sr_dev_inst_free(sdi);
	}

	g_slist_free(drvc->instances);
	drvc->instances = NULL;

	return SR_OK;
}

static int set_cfg(const struct sr_dev_inst *sdi, const char *format, ...)
{
	struct dev_context *devc;
	struct timespec delay;
	va_list args;
	char buf[256];

	devc = sdi->priv;

	va_start(args, format);
	vsnprintf(buf, 255, format, args);
	va_end(args);
	if (rigol_ds1xx2_send(devc, buf) != SR_OK)
		return SR_ERR;

	/* When setting a bunch of parameters in a row, the DS1052E scrambles
	 * some of them unless there is at least 100ms delay in between. */
	delay.tv_sec = 0;
	delay.tv_nsec = 100000000L;
	sr_spew("delay %dms", delay.tv_nsec / 1000000);
	nanosleep(&delay, NULL);

	return SR_OK;
}

static int hw_init(struct sr_context *sr_ctx)
{
	return std_hw_init(sr_ctx, di, DRIVER_LOG_DOMAIN);
}

static GSList *hw_scan(GSList *options)
{
	struct drv_context *drvc;
	struct sr_dev_inst *sdi;
	struct dev_context *devc;
	struct sr_probe *probe;
	GSList *devices;
	GDir *dir;
	const gchar *dev_name;
	const gchar *dev_dir = "/dev/";
	const gchar *prefix = "usbtmc";
	gchar *device;
	const gchar *idn_query = "*IDN?";
	unsigned int i;
	int len, num_tokens, fd;
	const gchar *delimiter = ",";
	gchar **tokens;
	const char *manufacturer, *model, *version;
	gboolean matched = FALSE;
	char buf[256];

	(void)options;

	drvc = di->priv;
	drvc->instances = NULL;

	devices = NULL;

	dir = g_dir_open("/sys/class/usb/", 0, NULL);

	if (dir == NULL)
		return NULL;

	while ((dev_name = g_dir_read_name(dir)) != NULL) {
		if (strncmp(dev_name, prefix, strlen(prefix))) 
			continue;

		device = g_strconcat(dev_dir, dev_name, NULL);

		fd = open(device, O_RDWR);
		len = write(fd, idn_query, strlen(idn_query));
		len = read(fd, buf, sizeof(buf));
		close(fd);
		if (len == 0) {
			g_free(device);
			return NULL;
		}

		buf[len] = 0;
		tokens = g_strsplit(buf, delimiter, 0);
		close(fd);
		sr_dbg("response: %s %d [%s]", device, len, buf);

		for (num_tokens = 0; tokens[num_tokens] != NULL; num_tokens++);

		if (num_tokens < 4) {
			g_strfreev(tokens);
			g_free(device);
			return NULL;
		}

		manufacturer = tokens[0];
		model = tokens[1];
		version = tokens[3];

		if (strcmp(manufacturer, "Rigol Technologies")) {
			g_strfreev(tokens);
			g_free(device);
			return NULL;
		}

		for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
			if (!strcmp(model, supported_models[i])) {
				matched = 1;
				break;
			}
		}

		if (!matched || !(sdi = sr_dev_inst_new(0, SR_ST_ACTIVE,
			manufacturer, model, version))) {
			g_strfreev(tokens);
			g_free(device);
			return NULL;
		}

		g_strfreev(tokens);

		if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
			sr_err("Device context malloc failed.");
			g_free(device);
			return NULL;
		}
		devc->limit_frames = 0;
		devc->device = device;
		sdi->priv = devc;
		sdi->driver = di;

		for (i = 0; i < 2; i++) {
			if (!(probe = sr_probe_new(0, SR_PROBE_ANALOG, TRUE,
			    i == 0 ? "CH1" : "CH2")))
				return NULL;
			sdi->probes = g_slist_append(sdi->probes, probe);
		}

		drvc->instances = g_slist_append(drvc->instances, sdi);
		devices = g_slist_append(devices, sdi);
	}

	g_dir_close(dir);

	return devices;
}

static GSList *hw_dev_list(void)
{
	return ((struct drv_context *)(di->priv))->instances;
}

static int hw_dev_open(struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	int fd;

	devc = sdi->priv;

	if ((fd = open(devc->device, O_RDWR)) == -1)
		return SR_ERR;
	devc->fd = fd;

	if (rigol_ds1xx2_get_dev_cfg(sdi) != SR_OK)
		/* TODO: force configuration? */
		return SR_ERR;

	return SR_OK;
}

static int hw_dev_close(struct sr_dev_inst *sdi)
{
	struct dev_context *devc;

	devc = sdi->priv;

	close(devc->fd);

	return SR_OK;
}

static int hw_cleanup(void)
{
	clear_instances();

	return SR_OK;
}

static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi)
{

	(void)sdi;

	switch (id) {
	case SR_CONF_NUM_TIMEBASE:
		*data = g_variant_new_int32(NUM_TIMEBASE);
		break;
	case SR_CONF_NUM_VDIV:
		*data = g_variant_new_int32(NUM_VDIV);
		break;
	default:
		return SR_ERR_ARG;
	}

	return SR_OK;
}

static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	uint64_t tmp_u64, p, q;
	double t_dbl;
	unsigned int i;
	int ret;
	const char *tmp_str;

	devc = sdi->priv;

	if (sdi->status != SR_ST_ACTIVE) {
		sr_err("Device inactive, can't set config options.");
		return SR_ERR;
	}

	ret = SR_OK;
	switch (id) {
	case SR_CONF_LIMIT_FRAMES:
		devc->limit_frames = g_variant_get_uint64(data);
		break;
	case SR_CONF_TRIGGER_SLOPE:
		tmp_u64 = g_variant_get_uint64(data);
		if (tmp_u64 != 0 && tmp_u64 != 1)
			return SR_ERR;
		g_free(devc->trigger_slope);
		devc->trigger_slope = g_strdup(tmp_u64 ? "POS" : "NEG");
		ret = set_cfg(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
		break;
	case SR_CONF_HORIZ_TRIGGERPOS:
		t_dbl = g_variant_get_double(data);
		if (t_dbl < 0.0 || t_dbl > 1.0)
			return SR_ERR;
		devc->horiz_triggerpos = t_dbl;
		/* We have the trigger offset as a percentage of the frame, but
		 * need to express this in seconds. */
		t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * NUM_TIMEBASE;
		ret = set_cfg(sdi, ":TIM:OFFS %.6f", t_dbl);
		break;
	case SR_CONF_TIMEBASE:
		g_variant_get(data, "(tt)", &p, &q);
		for (i = 0; i < ARRAY_SIZE(timebases); i++) {
			if (timebases[i][0] == p && timebases[i][1] == q) {
				devc->timebase = (float)p / q;
				ret = set_cfg(sdi, ":TIM:SCAL %.9f", devc->timebase);
				break;
			}
		}
		if (i == ARRAY_SIZE(timebases))
			ret = SR_ERR_ARG;
		break;
	case SR_CONF_TRIGGER_SOURCE:
		tmp_str = g_variant_get_string(data, NULL);
		for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
			if (!strcmp(trigger_sources[i], tmp_str)) {
				g_free(devc->trigger_source);
				devc->trigger_source = g_strdup(trigger_sources[i]);
				if (!strcmp(devc->trigger_source, "AC Line"))
					tmp_str = "ACL";
				else if (!strcmp(devc->trigger_source, "CH1"))
					tmp_str = "CHAN1";
				else if (!strcmp(devc->trigger_source, "CH2"))
					tmp_str = "CHAN2";
				else
					tmp_str = (char *)devc->trigger_source;
				ret = set_cfg(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
				break;
			}
		}
		if (i == ARRAY_SIZE(trigger_sources))
			ret = SR_ERR_ARG;
		break;
	case SR_CONF_VDIV:
		g_variant_get(data, "(tt)", &p, &q);
		for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
			if (vdivs[i][0] != p || vdivs[i][1] != q)
				continue;
			devc->vdiv[0] = devc->vdiv[1] = (float)p / q;
			set_cfg(sdi, ":CHAN1:SCAL %.3f", devc->vdiv[0]);
			ret = set_cfg(sdi, ":CHAN2:SCAL %.3f", devc->vdiv[1]);
			break;
		}
		if (i == ARRAY_SIZE(vdivs))
			ret = SR_ERR_ARG;
		break;
	case SR_CONF_COUPLING:
		/* TODO: Not supporting coupling per channel yet. */
		tmp_str = g_variant_get_string(data, NULL);
		for (i = 0; i < ARRAY_SIZE(coupling); i++) {
			if (!strcmp(tmp_str, coupling[i])) {
				g_free(devc->coupling[0]);
				g_free(devc->coupling[1]);
				devc->coupling[0] = g_strdup(coupling[i]);
				devc->coupling[1] = g_strdup(coupling[i]);
				set_cfg(sdi, ":CHAN1:COUP %s", devc->coupling[0]);
				ret = set_cfg(sdi, ":CHAN2:COUP %s", devc->coupling[1]);
				break;
			}
		}
		if (i == ARRAY_SIZE(coupling))
			ret = SR_ERR_ARG;
		break;
	default:
		sr_err("Unknown hardware capability: %d.", id);
		ret = SR_ERR_ARG;
		break;
	}

	return ret;
}

static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi)
{
	GVariant *tuple, *rational[2];
	GVariantBuilder gvb;
	unsigned int i;

	(void)sdi;

	switch (key) {
	case SR_CONF_DEVICE_OPTIONS:
		*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
				hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
		break;
	case SR_CONF_COUPLING:
		*data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
		break;
	case SR_CONF_VDIV:
		g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
		for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
			rational[0] = g_variant_new_uint64(vdivs[i][0]);
			rational[1] = g_variant_new_uint64(vdivs[i][1]);
			tuple = g_variant_new_tuple(rational, 2);
			g_variant_builder_add_value(&gvb, tuple);
		}
		*data = g_variant_builder_end(&gvb);
		break;
	case SR_CONF_TIMEBASE:
		g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
		for (i = 0; i < ARRAY_SIZE(timebases); i++) {
			rational[0] = g_variant_new_uint64(timebases[i][0]);
			rational[1] = g_variant_new_uint64(timebases[i][1]);
			tuple = g_variant_new_tuple(rational, 2);
			g_variant_builder_add_value(&gvb, tuple);
		}
		*data = g_variant_builder_end(&gvb);
		break;
	case SR_CONF_TRIGGER_SOURCE:
		*data = g_variant_new_strv(trigger_sources,
				ARRAY_SIZE(trigger_sources));
		break;
	default:
		return SR_ERR_ARG;
	}

	return SR_OK;
}

static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
{
	struct dev_context *devc;
	struct sr_probe *probe;
	GSList *l;
	int probenum;
	char cmd[256];

	(void)cb_data;

	devc = sdi->priv;

	for (l = sdi->probes; l; l = l->next) {
		probe = l->data;
		probenum = probe->name[2] == '1' ? 0 : 1;
		if (probe->enabled)
			devc->enabled_probes = g_slist_append(devc->enabled_probes, probe);

		if (probe->enabled != devc->channels[probenum]) {
			/* Enabled channel is currently disabled, or vice versa. */
			sprintf(cmd, ":CHAN%d:DISP %s", probenum + 1,
					probe->enabled ? "ON" : "OFF");
			if (rigol_ds1xx2_send(devc, cmd) != SR_OK)
				return SR_ERR;
		}
	}
	if (!devc->enabled_probes)
		return SR_ERR;

	sr_source_add(devc->fd, G_IO_IN, 50, rigol_ds1xx2_receive, (void *)sdi);

	/* Send header packet to the session bus. */
	std_session_send_df_header(cb_data, DRIVER_LOG_DOMAIN);

	/* Fetch the first frame. */
	devc->channel_frame = devc->enabled_probes->data;
	if (rigol_ds1xx2_send(devc, ":WAV:DATA? CHAN%c",
			devc->channel_frame->name[2]) != SR_OK)
		return SR_ERR;

	return SR_OK;
}

static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
{
	struct dev_context *devc;

	(void)cb_data;

	devc = sdi->priv;

	if (sdi->status != SR_ST_ACTIVE) {
		sr_err("Device inactive, can't stop acquisition.");
		return SR_ERR;
	}

	g_slist_free(devc->enabled_probes);
	devc->enabled_probes = NULL;
	sr_source_remove(devc->fd);

	return SR_OK;
}

SR_PRIV struct sr_dev_driver rigol_ds1xx2_driver_info = {
	.name = "rigol-ds1xx2",
	.longname = "Rigol DS1xx2",
	.api_version = 1,
	.init = hw_init,
	.cleanup = hw_cleanup,
	.scan = hw_scan,
	.dev_list = hw_dev_list,
	.dev_clear = clear_instances,
	.config_get = config_get,
	.config_set = config_set,
	.config_list = config_list,
	.dev_open = hw_dev_open,
	.dev_close = hw_dev_close,
	.dev_acquisition_start = dev_acquisition_start,
	.dev_acquisition_stop = dev_acquisition_stop,
	.priv = NULL,
};
Commit	Line	Data
f4816ac6 ML	1	/*
	2	* This file is part of the libsigrok project.
	3	*
	4	* Copyright (C) 2012 Martin Ling <martin-git@earth.li>
88e429c9	5	* Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
f4816ac6 ML	6	*
	7	* This program is free software: you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation, either version 3 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	19	*/
	20
e0b7d23c ML	21	#include <fcntl.h>
	22	#include <unistd.h>
	23	#include <stdlib.h>
	24	#include <string.h>
254dd102	25	#include <time.h>
f4816ac6 ML	26	#include <glib.h>
	27	#include "libsigrok.h"
	28	#include "libsigrok-internal.h"
	29	#include "protocol.h"
	30
d62d7ad1 BV	31	#define NUM_TIMEBASE 12
	32	#define NUM_VDIV 8
	33
f6a0ac9f	34	static const int32_t hwcaps[] = {
1953564a BV	35	SR_CONF_OSCILLOSCOPE,
	36	SR_CONF_LIMIT_SAMPLES,
	37	SR_CONF_TIMEBASE,
	38	SR_CONF_TRIGGER_SOURCE,
	39	SR_CONF_TRIGGER_SLOPE,
	40	SR_CONF_HORIZ_TRIGGERPOS,
	41	SR_CONF_VDIV,
	42	SR_CONF_COUPLING,
d62d7ad1 BV	43	SR_CONF_NUM_TIMEBASE,
d62d7ad1 BV	44	SR_CONF_NUM_VDIV,
e0b7d23c ML	45	};
e0b7d23c ML	46
f6a0ac9f	47	static const uint64_t timebases[][2] = {
e0b7d23c ML	48	/* nanoseconds */
	49	{ 2, 1000000000 },
	50	{ 5, 1000000000 },
	51	{ 10, 1000000000 },
	52	{ 20, 1000000000 },
	53	{ 50, 1000000000 },
	54	{ 100, 1000000000 },
	55	{ 500, 1000000000 },
	56	/* microseconds */
	57	{ 1, 1000000 },
	58	{ 2, 1000000 },
	59	{ 5, 1000000 },
	60	{ 10, 1000000 },
	61	{ 20, 1000000 },
	62	{ 50, 1000000 },
	63	{ 100, 1000000 },
	64	{ 200, 1000000 },
	65	{ 500, 1000000 },
	66	/* milliseconds */
	67	{ 1, 1000 },
	68	{ 2, 1000 },
	69	{ 5, 1000 },
	70	{ 10, 1000 },
	71	{ 20, 1000 },
	72	{ 50, 1000 },
	73	{ 100, 1000 },
	74	{ 200, 1000 },
	75	{ 500, 1000 },
	76	/* seconds */
	77	{ 1, 1 },
	78	{ 2, 1 },
	79	{ 5, 1 },
	80	{ 10, 1 },
	81	{ 20, 1 },
	82	{ 50, 1 },
e0b7d23c ML	83	};
e0b7d23c ML	84
f6a0ac9f	85	static const uint64_t vdivs[][2] = {
e0b7d23c ML	86	/* millivolts */
	87	{ 2, 1000 },
	88	{ 5, 1000 },
	89	{ 10, 1000 },
	90	{ 20, 1000 },
	91	{ 50, 1000 },
	92	{ 100, 1000 },
	93	{ 200, 1000 },
	94	{ 500, 1000 },
	95	/* volts */
	96	{ 1, 1 },
	97	{ 2, 1 },
	98	{ 5, 1 },
	99	{ 10, 1 },
e0b7d23c ML	100	};
	101
	102	static const char *trigger_sources[] = {
	103	"CH1",
	104	"CH2",
	105	"EXT",
	106	"AC Line",
e0b7d23c ML	107	};
	108
	109	static const char *coupling[] = {
	110	"AC",
	111	"DC",
	112	"GND",
e0b7d23c ML	113	};
e0b7d23c ML	114
512bb890 BV	115	static const char *supported_models[] = {
	116	"DS1052E",
	117	"DS1102E",
	118	"DS1052D",
333bf022	119	"DS1102D",
512bb890 BV	120	};
512bb890 BV	121
f4816ac6 ML	122	SR_PRIV struct sr_dev_driver rigol_ds1xx2_driver_info;
	123	static struct sr_dev_driver *di = &rigol_ds1xx2_driver_info;
	124
	125	/* Properly close and free all devices. */
	126	static int clear_instances(void)
	127	{
	128	struct sr_dev_inst *sdi;
	129	struct drv_context *drvc;
	130	struct dev_context *devc;
	131	GSList *l;
	132
	133	if (!(drvc = di->priv))
	134	return SR_OK;
	135
	136	for (l = drvc->instances; l; l = l->next) {
	137	if (!(sdi = l->data))
	138	continue;
	139	if (!(devc = sdi->priv))
	140	continue;
	141
fb6e5ba8	142	g_free(devc->device);
254dd102 BV	143	g_free(devc->coupling[0]);
	144	g_free(devc->coupling[1]);
	145	g_free(devc->trigger_source);
	146	g_free(devc->trigger_slope);
e0b7d23c	147	close(devc->fd);
f4816ac6 ML	148
	149	sr_dev_inst_free(sdi);
	150	}
	151
	152	g_slist_free(drvc->instances);
	153	drvc->instances = NULL;
	154
	155	return SR_OK;
	156	}
	157
254dd102 BV	158	static int set_cfg(const struct sr_dev_inst sdi, const char format, ...)
	159	{
	160	struct dev_context *devc;
	161	struct timespec delay;
	162	va_list args;
	163	char buf[256];
	164
	165	devc = sdi->priv;
	166
	167	va_start(args, format);
	168	vsnprintf(buf, 255, format, args);
	169	va_end(args);
	170	if (rigol_ds1xx2_send(devc, buf) != SR_OK)
	171	return SR_ERR;
	172
	173	/* When setting a bunch of parameters in a row, the DS1052E scrambles
	174	* some of them unless there is at least 100ms delay in between. */
	175	delay.tv_sec = 0;
	176	delay.tv_nsec = 100000000L;
	177	sr_spew("delay %dms", delay.tv_nsec / 1000000);
	178	nanosleep(&delay, NULL);
	179
	180	return SR_OK;
	181	}
	182
e0b7d23c	183	static int hw_init(struct sr_context *sr_ctx)
f4816ac6	184	{
063e7aef	185	return std_hw_init(sr_ctx, di, DRIVER_LOG_DOMAIN);
f4816ac6 ML	186	}
	187
	188	static GSList hw_scan(GSList options)
	189	{
	190	struct drv_context *drvc;
e0b7d23c ML	191	struct sr_dev_inst *sdi;
	192	struct dev_context *devc;
	193	struct sr_probe *probe;
f4816ac6	194	GSList *devices;
fb6e5ba8 ML	195	GDir *dir;
	196	const gchar *dev_name;
	197	const gchar *dev_dir = "/dev/";
	198	const gchar *prefix = "usbtmc";
	199	gchar *device;
	200	const gchar idn_query = "IDN?";
f6a0ac9f BV	201	unsigned int i;
f6a0ac9f BV	202	int len, num_tokens, fd;
fb6e5ba8 ML	203	const gchar *delimiter = ",";
fb6e5ba8 ML	204	gchar **tokens;
512bb890	205	const char manufacturer, model, *version;
512bb890	206	gboolean matched = FALSE;
fb6e5ba8 ML	207	char buf[256];
fb6e5ba8 ML	208
f4816ac6 ML	209	(void)options;
f4816ac6 ML	210
f4816ac6 ML	211	drvc = di->priv;
	212	drvc->instances = NULL;
	213
4b97c74e UH	214	devices = NULL;
4b97c74e UH	215
fb6e5ba8	216	dir = g_dir_open("/sys/class/usb/", 0, NULL);
e0b7d23c	217
fb6e5ba8 ML	218	if (dir == NULL)
fb6e5ba8 ML	219	return NULL;
e0b7d23c	220
29d957ce	221	while ((dev_name = g_dir_read_name(dir)) != NULL) {
fb6e5ba8 ML	222	if (strncmp(dev_name, prefix, strlen(prefix)))
	223	continue;
	224
	225	device = g_strconcat(dev_dir, dev_name, NULL);
	226
	227	fd = open(device, O_RDWR);
	228	len = write(fd, idn_query, strlen(idn_query));
	229	len = read(fd, buf, sizeof(buf));
	230	close(fd);
29d957ce	231	if (len == 0) {
fb6e5ba8 ML	232	g_free(device);
	233	return NULL;
	234	}
	235
	236	buf[len] = 0;
	237	tokens = g_strsplit(buf, delimiter, 0);
	238	close(fd);
512bb890	239	sr_dbg("response: %s %d [%s]", device, len, buf);
fb6e5ba8 ML	240
	241	for (num_tokens = 0; tokens[num_tokens] != NULL; num_tokens++);
	242
512bb890	243	if (num_tokens < 4) {
fb6e5ba8 ML	244	g_strfreev(tokens);
fb6e5ba8 ML	245	g_free(device);
e0b7d23c	246	return NULL;
fb6e5ba8	247	}
512bb890 BV	248
	249	manufacturer = tokens[0];
	250	model = tokens[1];
	251	version = tokens[3];
	252
	253	if (strcmp(manufacturer, "Rigol Technologies")) {
	254	g_strfreev(tokens);
	255	g_free(device);
	256	return NULL;
	257	}
	258
333bf022	259	for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
512bb890 BV	260	if (!strcmp(model, supported_models[i])) {
	261	matched = 1;
	262	break;
	263	}
	264	}
	265
	266	if (!matched \|\| !(sdi = sr_dev_inst_new(0, SR_ST_ACTIVE,
	267	manufacturer, model, version))) {
	268	g_strfreev(tokens);
	269	g_free(device);
	270	return NULL;
	271	}
	272
fb6e5ba8 ML	273	g_strfreev(tokens);
fb6e5ba8 ML	274
29d957ce UH	275	if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
29d957ce UH	276	sr_err("Device context malloc failed.");
fb6e5ba8 ML	277	g_free(device);
	278	return NULL;
	279	}
254dd102	280	devc->limit_frames = 0;
fb6e5ba8	281	devc->device = device;
fb6e5ba8 ML	282	sdi->priv = devc;
	283	sdi->driver = di;
	284
29d957ce UH	285	for (i = 0; i < 2; i++) {
	286	if (!(probe = sr_probe_new(0, SR_PROBE_ANALOG, TRUE,
	287	i == 0 ? "CH1" : "CH2")))
fb6e5ba8 ML	288	return NULL;
	289	sdi->probes = g_slist_append(sdi->probes, probe);
	290	}
	291
	292	drvc->instances = g_slist_append(drvc->instances, sdi);
	293	devices = g_slist_append(devices, sdi);
e0b7d23c	294	}
fb6e5ba8 ML	295
fb6e5ba8 ML	296	g_dir_close(dir);
f4816ac6 ML	297
	298	return devices;
	299	}
	300
	301	static GSList *hw_dev_list(void)
	302	{
0e94d524	303	return ((struct drv_context *)(di->priv))->instances;
f4816ac6 ML	304	}
	305
	306	static int hw_dev_open(struct sr_dev_inst *sdi)
	307	{
29d957ce UH	308	struct dev_context *devc;
29d957ce UH	309	int fd;
fb6e5ba8	310
29d957ce	311	devc = sdi->priv;
e0b7d23c	312
29d957ce	313	if ((fd = open(devc->device, O_RDWR)) == -1)
e0b7d23c	314	return SR_ERR;
e0b7d23c ML	315	devc->fd = fd;
e0b7d23c ML	316
254dd102 BV	317	if (rigol_ds1xx2_get_dev_cfg(sdi) != SR_OK)
	318	/* TODO: force configuration? */
	319	return SR_ERR;
f4816ac6 ML	320
	321	return SR_OK;
	322	}
	323
	324	static int hw_dev_close(struct sr_dev_inst *sdi)
	325	{
29d957ce UH	326	struct dev_context *devc;
	327
	328	devc = sdi->priv;
e0b7d23c ML	329
e0b7d23c ML	330	close(devc->fd);
f4816ac6 ML	331
	332	return SR_OK;
	333	}
	334
	335	static int hw_cleanup(void)
	336	{
	337	clear_instances();
	338
f4816ac6 ML	339	return SR_OK;
	340	}
	341
d62d7ad1 BV	342	static int config_get(int id, GVariant *data, const struct sr_dev_inst sdi)
	343	{
	344
	345	(void)sdi;
	346
	347	switch (id) {
	348	case SR_CONF_NUM_TIMEBASE:
	349	*data = g_variant_new_int32(NUM_TIMEBASE);
	350	break;
	351	case SR_CONF_NUM_VDIV:
	352	*data = g_variant_new_int32(NUM_VDIV);
	353	break;
	354	default:
	355	return SR_ERR_ARG;
	356	}
	357
	358	return SR_OK;
	359	}
	360
f6a0ac9f	361	static int config_set(int id, GVariant data, const struct sr_dev_inst sdi)
f4816ac6	362	{
29d957ce	363	struct dev_context *devc;
f6a0ac9f	364	uint64_t tmp_u64, p, q;
254dd102	365	double t_dbl;
f6a0ac9f	366	unsigned int i;
254dd102 BV	367	int ret;
254dd102 BV	368	const char *tmp_str;
f4816ac6	369
29d957ce UH	370	devc = sdi->priv;
29d957ce UH	371
f4816ac6 ML	372	if (sdi->status != SR_ST_ACTIVE) {
	373	sr_err("Device inactive, can't set config options.");
	374	return SR_ERR;
	375	}
	376
	377	ret = SR_OK;
035a1078	378	switch (id) {
1953564a	379	case SR_CONF_LIMIT_FRAMES:
f6a0ac9f	380	devc->limit_frames = g_variant_get_uint64(data);
e0b7d23c	381	break;
1953564a	382	case SR_CONF_TRIGGER_SLOPE:
f6a0ac9f	383	tmp_u64 = g_variant_get_uint64(data);
254dd102 BV	384	if (tmp_u64 != 0 && tmp_u64 != 1)
	385	return SR_ERR;
	386	g_free(devc->trigger_slope);
	387	devc->trigger_slope = g_strdup(tmp_u64 ? "POS" : "NEG");
	388	ret = set_cfg(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
e0b7d23c	389	break;
1953564a	390	case SR_CONF_HORIZ_TRIGGERPOS:
254dd102 BV	391	t_dbl = g_variant_get_double(data);
	392	if (t_dbl < 0.0 \|\| t_dbl > 1.0)
	393	return SR_ERR;
	394	devc->horiz_triggerpos = t_dbl;
	395	/* We have the trigger offset as a percentage of the frame, but
	396	* need to express this in seconds. */
	397	t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * NUM_TIMEBASE;
	398	ret = set_cfg(sdi, ":TIM:OFFS %.6f", t_dbl);
e0b7d23c	399	break;
1953564a	400	case SR_CONF_TIMEBASE:
f6a0ac9f	401	g_variant_get(data, "(tt)", &p, &q);
f6a0ac9f BV	402	for (i = 0; i < ARRAY_SIZE(timebases); i++) {
f6a0ac9f BV	403	if (timebases[i][0] == p && timebases[i][1] == q) {
254dd102 BV	404	devc->timebase = (float)p / q;
254dd102 BV	405	ret = set_cfg(sdi, ":TIM:SCAL %.9f", devc->timebase);
f6a0ac9f BV	406	break;
	407	}
	408	}
254dd102 BV	409	if (i == ARRAY_SIZE(timebases))
254dd102 BV	410	ret = SR_ERR_ARG;
e0b7d23c	411	break;
1953564a	412	case SR_CONF_TRIGGER_SOURCE:
f6a0ac9f	413	tmp_str = g_variant_get_string(data, NULL);
254dd102 BV	414	for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
	415	if (!strcmp(trigger_sources[i], tmp_str)) {
	416	g_free(devc->trigger_source);
	417	devc->trigger_source = g_strdup(trigger_sources[i]);
	418	if (!strcmp(devc->trigger_source, "AC Line"))
	419	tmp_str = "ACL";
	420	else if (!strcmp(devc->trigger_source, "CH1"))
	421	tmp_str = "CHAN1";
	422	else if (!strcmp(devc->trigger_source, "CH2"))
	423	tmp_str = "CHAN2";
	424	else
	425	tmp_str = (char *)devc->trigger_source;
	426	ret = set_cfg(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
	427	break;
	428	}
4e108ace	429	}
254dd102 BV	430	if (i == ARRAY_SIZE(trigger_sources))
254dd102 BV	431	ret = SR_ERR_ARG;
e0b7d23c	432	break;
1953564a	433	case SR_CONF_VDIV:
f6a0ac9f	434	g_variant_get(data, "(tt)", &p, &q);
f6a0ac9f BV	435	for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
	436	if (vdivs[i][0] != p \|\| vdivs[i][1] != q)
	437	continue;
254dd102 BV	438	devc->vdiv[0] = devc->vdiv[1] = (float)p / q;
	439	set_cfg(sdi, ":CHAN1:SCAL %.3f", devc->vdiv[0]);
	440	ret = set_cfg(sdi, ":CHAN2:SCAL %.3f", devc->vdiv[1]);
f6a0ac9f	441	break;
e0b7d23c	442	}
f6a0ac9f	443	if (i == ARRAY_SIZE(vdivs))
e0b7d23c ML	444	ret = SR_ERR_ARG;
e0b7d23c ML	445	break;
1953564a	446	case SR_CONF_COUPLING:
e0b7d23c	447	/* TODO: Not supporting coupling per channel yet. */
f6a0ac9f BV	448	tmp_str = g_variant_get_string(data, NULL);
	449	for (i = 0; i < ARRAY_SIZE(coupling); i++) {
	450	if (!strcmp(tmp_str, coupling[i])) {
254dd102 BV	451	g_free(devc->coupling[0]);
	452	g_free(devc->coupling[1]);
	453	devc->coupling[0] = g_strdup(coupling[i]);
	454	devc->coupling[1] = g_strdup(coupling[i]);
	455	set_cfg(sdi, ":CHAN1:COUP %s", devc->coupling[0]);
	456	ret = set_cfg(sdi, ":CHAN2:COUP %s", devc->coupling[1]);
e0b7d23c ML	457	break;
	458	}
	459	}
f6a0ac9f	460	if (i == ARRAY_SIZE(coupling))
e0b7d23c ML	461	ret = SR_ERR_ARG;
e0b7d23c ML	462	break;
f4816ac6	463	default:
035a1078	464	sr_err("Unknown hardware capability: %d.", id);
f4816ac6	465	ret = SR_ERR_ARG;
29d957ce	466	break;
f4816ac6 ML	467	}
	468
	469	return ret;
	470	}
	471
f6a0ac9f	472	static int config_list(int key, GVariant *data, const struct sr_dev_inst sdi)
a1c743fc	473	{
861c447b BV	474	GVariant tuple, rational[2];
	475	GVariantBuilder gvb;
	476	unsigned int i;
a1c743fc BV	477
	478	(void)sdi;
	479
	480	switch (key) {
9a6517d1	481	case SR_CONF_DEVICE_OPTIONS:
f6a0ac9f BV	482	*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
f6a0ac9f BV	483	hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
9a6517d1	484	break;
2a7b113d	485	case SR_CONF_COUPLING:
169dbe85 UH	486	*data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
169dbe85 UH	487	break;
e4f2b2ad	488	case SR_CONF_VDIV:
861c447b BV	489	g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
	490	for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
	491	rational[0] = g_variant_new_uint64(vdivs[i][0]);
	492	rational[1] = g_variant_new_uint64(vdivs[i][1]);
	493	tuple = g_variant_new_tuple(rational, 2);
	494	g_variant_builder_add_value(&gvb, tuple);
	495	}
	496	*data = g_variant_builder_end(&gvb);
e4f2b2ad	497	break;
41f5bd09	498	case SR_CONF_TIMEBASE:
861c447b BV	499	g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
	500	for (i = 0; i < ARRAY_SIZE(timebases); i++) {
	501	rational[0] = g_variant_new_uint64(timebases[i][0]);
	502	rational[1] = g_variant_new_uint64(timebases[i][1]);
	503	tuple = g_variant_new_tuple(rational, 2);
	504	g_variant_builder_add_value(&gvb, tuple);
	505	}
	506	*data = g_variant_builder_end(&gvb);
41f5bd09	507	break;
328bafab	508	case SR_CONF_TRIGGER_SOURCE:
f6a0ac9f BV	509	*data = g_variant_new_strv(trigger_sources,
f6a0ac9f BV	510	ARRAY_SIZE(trigger_sources));
328bafab	511	break;
a1c743fc BV	512	default:
	513	return SR_ERR_ARG;
	514	}
	515
	516	return SR_OK;
	517	}
	518
254dd102	519	static int dev_acquisition_start(const struct sr_dev_inst sdi, void cb_data)
f4816ac6	520	{
29d957ce	521	struct dev_context *devc;
254dd102 BV	522	struct sr_probe *probe;
	523	GSList *l;
	524	int probenum;
	525	char cmd[256];
29d957ce	526
e0b7d23c ML	527	(void)cb_data;
e0b7d23c ML	528
29d957ce UH	529	devc = sdi->priv;
29d957ce UH	530
254dd102 BV	531	for (l = sdi->probes; l; l = l->next) {
	532	probe = l->data;
	533	probenum = probe->name[2] == '1' ? 0 : 1;
	534	if (probe->enabled)
	535	devc->enabled_probes = g_slist_append(devc->enabled_probes, probe);
	536
	537	if (probe->enabled != devc->channels[probenum]) {
	538	/* Enabled channel is currently disabled, or vice versa. */
	539	sprintf(cmd, ":CHAN%d:DISP %s", probenum + 1,
	540	probe->enabled ? "ON" : "OFF");
	541	if (rigol_ds1xx2_send(devc, cmd) != SR_OK)
	542	return SR_ERR;
	543	}
	544	}
	545	if (!devc->enabled_probes)
	546	return SR_ERR;
e0b7d23c	547
254dd102	548	sr_source_add(devc->fd, G_IO_IN, 50, rigol_ds1xx2_receive, (void *)sdi);
e0b7d23c ML	549
e0b7d23c ML	550	/* Send header packet to the session bus. */
4afdfd46	551	std_session_send_df_header(cb_data, DRIVER_LOG_DOMAIN);
e0b7d23c	552
254dd102 BV	553	/* Fetch the first frame. */
	554	devc->channel_frame = devc->enabled_probes->data;
	555	if (rigol_ds1xx2_send(devc, ":WAV:DATA? CHAN%c",
	556	devc->channel_frame->name[2]) != SR_OK)
	557	return SR_ERR;
f4816ac6 ML	558
	559	return SR_OK;
	560	}
	561
254dd102	562	static int dev_acquisition_stop(struct sr_dev_inst sdi, void cb_data)
f4816ac6	563	{
29d957ce UH	564	struct dev_context *devc;
29d957ce UH	565
f4816ac6 ML	566	(void)cb_data;
f4816ac6 ML	567
29d957ce UH	568	devc = sdi->priv;
29d957ce UH	569
f4816ac6 ML	570	if (sdi->status != SR_ST_ACTIVE) {
	571	sr_err("Device inactive, can't stop acquisition.");
	572	return SR_ERR;
	573	}
	574
254dd102 BV	575	g_slist_free(devc->enabled_probes);
254dd102 BV	576	devc->enabled_probes = NULL;
e0b7d23c	577	sr_source_remove(devc->fd);
f4816ac6 ML	578
	579	return SR_OK;
	580	}
	581
	582	SR_PRIV struct sr_dev_driver rigol_ds1xx2_driver_info = {
	583	.name = "rigol-ds1xx2",
	584	.longname = "Rigol DS1xx2",
	585	.api_version = 1,
	586	.init = hw_init,
	587	.cleanup = hw_cleanup,
	588	.scan = hw_scan,
	589	.dev_list = hw_dev_list,
	590	.dev_clear = clear_instances,
d62d7ad1	591	.config_get = config_get,
035a1078	592	.config_set = config_set,
a1c743fc	593	.config_list = config_list,
f4816ac6 ML	594	.dev_open = hw_dev_open,
f4816ac6 ML	595	.dev_close = hw_dev_close,
254dd102 BV	596	.dev_acquisition_start = dev_acquisition_start,
254dd102 BV	597	.dev_acquisition_stop = dev_acquisition_stop,
f4816ac6 ML	598	.priv = NULL,
f4816ac6 ML	599	};