[libsigrok.git] / hardware / rigol-ds1xx2 / api.c

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <fcntl.h>
#include <unistd.h>
#include <stdlib.h>
#include <string.h>
#include <glib.h>
#include "libsigrok.h"
#include "libsigrok-internal.h"
#include "protocol.h"

static const int hwcaps[] = {
	SR_HWCAP_OSCILLOSCOPE,
	SR_HWCAP_LIMIT_SAMPLES,
	SR_HWCAP_TIMEBASE,
	SR_HWCAP_TRIGGER_SOURCE,
	SR_HWCAP_TRIGGER_SLOPE,
	SR_HWCAP_HORIZ_TRIGGERPOS,
	SR_HWCAP_VDIV,
	SR_HWCAP_COUPLING,
	0,
};

static const struct sr_rational timebases[] = {
	/* nanoseconds */
	{ 2, 1000000000 },
	{ 5, 1000000000 },
	{ 10, 1000000000 },
	{ 20, 1000000000 },
	{ 50, 1000000000 },
	{ 100, 1000000000 },
	{ 500, 1000000000 },
	/* microseconds */
	{ 1, 1000000 },
	{ 2, 1000000 },
	{ 5, 1000000 },
	{ 10, 1000000 },
	{ 20, 1000000 },
	{ 50, 1000000 },
	{ 100, 1000000 },
	{ 200, 1000000 },
	{ 500, 1000000 },
	/* milliseconds */
	{ 1, 1000 },
	{ 2, 1000 },
	{ 5, 1000 },
	{ 10, 1000 },
	{ 20, 1000 },
	{ 50, 1000 },
	{ 100, 1000 },
	{ 200, 1000 },
	{ 500, 1000 },
	/* seconds */
	{ 1, 1 },
	{ 2, 1 },
	{ 5, 1 },
	{ 10, 1 },
	{ 20, 1 },
	{ 50, 1 },
	{ 0, 0},
};

static const struct sr_rational vdivs[] = {
	/* millivolts */
	{ 2, 1000 },
	{ 5, 1000 },
	{ 10, 1000 },
	{ 20, 1000 },
	{ 50, 1000 },
	{ 100, 1000 },
	{ 200, 1000 },
	{ 500, 1000 },
	/* volts */
	{ 1, 1 },
	{ 2, 1 },
	{ 5, 1 },
	{ 10, 1 },
	{ 0, 0 },
};

static const char *trigger_sources[] = {
	"CH1",
	"CH2",
	"EXT",
	"AC Line",
	NULL,
};

static const char *coupling[] = {
	"AC",
	"DC",
	"GND",
	NULL,
};

static const char *supported_models[] = {
	"DS1052E",
	"DS1102E",
	"DS1052D",
	"DS1102D"
};

SR_PRIV struct sr_dev_driver rigol_ds1xx2_driver_info;
static struct sr_dev_driver *di = &rigol_ds1xx2_driver_info;

/* Properly close and free all devices. */
static int clear_instances(void)
{
	struct sr_dev_inst *sdi;
	struct drv_context *drvc;
	struct dev_context *devc;
	GSList *l;

	if (!(drvc = di->priv))
		return SR_OK;

	for (l = drvc->instances; l; l = l->next) {
		if (!(sdi = l->data))
			continue;
		if (!(devc = sdi->priv))
			continue;

		g_free(devc->device);
		close(devc->fd);

		sr_dev_inst_free(sdi);
	}

	g_slist_free(drvc->instances);
	drvc->instances = NULL;

	return SR_OK;
}

static int hw_init(struct sr_context *sr_ctx)
{
	struct drv_context *drvc;
	(void)sr_ctx;

	if (!(drvc = g_try_malloc0(sizeof(struct drv_context)))) {
		sr_err("Driver context malloc failed.");
		return SR_ERR_MALLOC;
	}

	di->priv = drvc;

	return SR_OK;
}

static GSList *hw_scan(GSList *options)
{
	struct drv_context *drvc;
	struct sr_dev_inst *sdi;
	struct dev_context *devc;
	struct sr_probe *probe;
	GSList *devices;
	GDir *dir;
	const gchar *dev_name;
	const gchar *dev_dir = "/dev/";
	const gchar *prefix = "usbtmc";
	gchar *device;
	const gchar *idn_query = "*IDN?";
	int len, num_tokens, fd, i;
	const gchar *delimiter = ",";
	gchar **tokens;
	const char *manufacturer, *model, *version;
	int num_models;
	gboolean matched = FALSE;
	char buf[256];

	(void)options;

	devices = NULL;
	drvc = di->priv;
	drvc->instances = NULL;

	dir = g_dir_open("/sys/class/usb/", 0, NULL);

	if (dir == NULL)
		return NULL;

	while ((dev_name = g_dir_read_name(dir)) != NULL) {
		if (strncmp(dev_name, prefix, strlen(prefix))) 
			continue;

		device = g_strconcat(dev_dir, dev_name, NULL);

		fd = open(device, O_RDWR);
		len = write(fd, idn_query, strlen(idn_query));
		len = read(fd, buf, sizeof(buf));
		close(fd);
		if (len == 0) {
			g_free(device);
			return NULL;
		}

		buf[len] = 0;
		tokens = g_strsplit(buf, delimiter, 0);
		close(fd);
		sr_dbg("response: %s %d [%s]", device, len, buf);

		for (num_tokens = 0; tokens[num_tokens] != NULL; num_tokens++);

		if (num_tokens < 4) {
			g_strfreev(tokens);
			g_free(device);
			return NULL;
		}

		manufacturer = tokens[0];
		model = tokens[1];
		version = tokens[3];

		if (strcmp(manufacturer, "Rigol Technologies")) {
			g_strfreev(tokens);
			g_free(device);
			return NULL;
		}

		num_models = sizeof(supported_models) / sizeof(supported_models[0]);

		for (i = 0; i < num_models; i++) {
			if (!strcmp(model, supported_models[i])) {
				matched = 1;
				break;
			}
		}

		if (!matched || !(sdi = sr_dev_inst_new(0, SR_ST_ACTIVE,
			manufacturer, model, version))) {
			g_strfreev(tokens);
			g_free(device);
			return NULL;
		}

		g_strfreev(tokens);

		if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
			sr_err("Device context malloc failed.");
			g_free(device);
			return NULL;
		}

		devc->device = device;

		sdi->priv = devc;
		sdi->driver = di;

		for (i = 0; i < 2; i++) {
			if (!(probe = sr_probe_new(0, SR_PROBE_ANALOG, TRUE,
			    i == 0 ? "CH1" : "CH2")))
				return NULL;
			sdi->probes = g_slist_append(sdi->probes, probe);
		}

		drvc->instances = g_slist_append(drvc->instances, sdi);
		devices = g_slist_append(devices, sdi);
	}

	g_dir_close(dir);

	return devices;
}

static GSList *hw_dev_list(void)
{
	struct drv_context *drvc;

	drvc = di->priv;

	return drvc->instances;
}

static int hw_dev_open(struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	int fd;

	devc = sdi->priv;

	if ((fd = open(devc->device, O_RDWR)) == -1)
		return SR_ERR;

	devc->fd = fd;

	devc->scale = 1;

	return SR_OK;
}

static int hw_dev_close(struct sr_dev_inst *sdi)
{
	struct dev_context *devc;

	devc = sdi->priv;

	close(devc->fd);

	return SR_OK;
}

static int hw_cleanup(void)
{
	clear_instances();

	return SR_OK;
}

static int hw_info_get(int info_id, const void **data,
		       const struct sr_dev_inst *sdi)
{
	(void)sdi;

	switch (info_id) {
	case SR_DI_HWCAPS:
		*data = hwcaps;
		break;
	case SR_DI_TIMEBASES:
		*data = timebases;
		break;
	case SR_DI_TRIGGER_SOURCES:
		*data = trigger_sources;
		break;
	case SR_DI_VDIVS:
		*data = vdivs;
		break;
	case SR_DI_COUPLING:
		*data = coupling;
		break;
	default:
		return SR_ERR_ARG;
	}

	return SR_OK;
}

static int hw_dev_config_set(const struct sr_dev_inst *sdi, int hwcap,
			     const void *value)
{
	struct dev_context *devc;
	uint64_t tmp_u64;
	float tmp_float;
	struct sr_rational tmp_rat;
	int ret, i, j;
	char *channel;

	devc = sdi->priv;

	if (sdi->status != SR_ST_ACTIVE) {
		sr_err("Device inactive, can't set config options.");
		return SR_ERR;
	}

	ret = SR_OK;
	switch (hwcap) {
	case SR_HWCAP_LIMIT_FRAMES:
		devc->limit_frames = *(const uint64_t *)value;
		break;
	case SR_HWCAP_TRIGGER_SLOPE:
		tmp_u64 = *(const int *)value;
		rigol_ds1xx2_send_data(devc->fd, ":TRIG:EDGE:SLOP %s\n",
				       tmp_u64 ? "POS" : "NEG");
		break;
	case SR_HWCAP_HORIZ_TRIGGERPOS:
		tmp_float = *(const float *)value;
		rigol_ds1xx2_send_data(devc->fd, ":TIM:OFFS %.9f\n", tmp_float);
		break;
	case SR_HWCAP_TIMEBASE:
		tmp_rat = *(const struct sr_rational *)value;
		rigol_ds1xx2_send_data(devc->fd, ":TIM:SCAL %.9f\n",
				       (float)tmp_rat.p / tmp_rat.q);
		break;
	case SR_HWCAP_TRIGGER_SOURCE:
		if (!strcmp(value, "CH1"))
			channel = "CHAN1";
		else if (!strcmp(value, "CH2"))
			channel = "CHAN2";
		else if (!strcmp(value, "EXT"))
			channel = "EXT";
		else if (!strcmp(value, "AC Line"))
			channel = "ACL";
		else {
			ret = SR_ERR_ARG;
			break;
		}
		rigol_ds1xx2_send_data(devc->fd, ":TRIG:EDGE:SOUR %s\n", channel);
		break;
	case SR_HWCAP_VDIV:
		/* TODO: Not supporting vdiv per channel yet. */
		tmp_rat = *(const struct sr_rational *)value;
		for (i = 0; vdivs[i].p && vdivs[i].q; i++) {
			if (vdivs[i].p == tmp_rat.p
					&& vdivs[i].q == tmp_rat.q) {
				devc->scale = (float)tmp_rat.p / tmp_rat.q;
				for (j = 0; j < 2; j++)
					rigol_ds1xx2_send_data(devc->fd,
					 ":CHAN%d:SCAL %.3f\n", j, devc->scale);
				break;
			}
		}
		if (vdivs[i].p == 0 && vdivs[i].q == 0)
			ret = SR_ERR_ARG;
		break;
	case SR_HWCAP_COUPLING:
		/* TODO: Not supporting coupling per channel yet. */
		for (i = 0; coupling[i]; i++) {
			if (!strcmp(value, coupling[i])) {
				for (j = 0; j < 2; j++)
					rigol_ds1xx2_send_data(devc->fd,
					  ":CHAN%d:COUP %s\n", j, coupling[i]);
				break;
			}
		}
		if (coupling[i] == 0)
			ret = SR_ERR_ARG;
		break;
	default:
		sr_err("Unknown hardware capability: %d.", hwcap);
		ret = SR_ERR_ARG;
		break;
	}

	return ret;
}

static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
				    void *cb_data)
{
	struct dev_context *devc;
	struct sr_datafeed_packet packet;
	struct sr_datafeed_header header;
	char buf[256];
	int len;

	(void)cb_data;

	devc = sdi->priv;

	devc->num_frames = 0;

	sr_source_add(devc->fd, G_IO_IN, 50, rigol_ds1xx2_receive_data, (void *)sdi);

	/* Send header packet to the session bus. */
	packet.type = SR_DF_HEADER;
	packet.payload = (unsigned char *)&header;
	header.feed_version = 1;
	gettimeofday(&header.starttime, NULL);
	sr_session_send(cb_data, &packet);

	rigol_ds1xx2_send_data(devc->fd, ":CHAN1:SCAL?\n");
	len = read(devc->fd, buf, sizeof(buf));
	buf[len] = 0;
	devc->scale = atof(buf);
	sr_dbg("Scale is %.3f.", devc->scale);
	rigol_ds1xx2_send_data(devc->fd, ":CHAN1:OFFS?\n");
	len = read(devc->fd, buf, sizeof(buf));
	buf[len] = 0;
	devc->offset = atof(buf);
	sr_dbg("Offset is %.6f.", devc->offset);
	rigol_ds1xx2_send_data(devc->fd, ":WAV:DATA?\n");

	return SR_OK;
}

static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
{
	struct dev_context *devc;

	(void)cb_data;

	devc = sdi->priv;

	if (sdi->status != SR_ST_ACTIVE) {
		sr_err("Device inactive, can't stop acquisition.");
		return SR_ERR;
	}

	sr_source_remove(devc->fd);

	return SR_OK;
}

SR_PRIV struct sr_dev_driver rigol_ds1xx2_driver_info = {
	.name = "rigol-ds1xx2",
	.longname = "Rigol DS1xx2",
	.api_version = 1,
	.init = hw_init,
	.cleanup = hw_cleanup,
	.scan = hw_scan,
	.dev_list = hw_dev_list,
	.dev_clear = clear_instances,
	.dev_open = hw_dev_open,
	.dev_close = hw_dev_close,
	.info_get = hw_info_get,
	.dev_config_set = hw_dev_config_set,
	.dev_acquisition_start = hw_dev_acquisition_start,
	.dev_acquisition_stop = hw_dev_acquisition_stop,
	.priv = NULL,
};
Commit	Line	Data
f4816ac6 ML	1	/*
	2	* This file is part of the libsigrok project.
	3	*
	4	* Copyright (C) 2012 Martin Ling <martin-git@earth.li>
	5	*
	6	* This program is free software: you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation, either version 3 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
e0b7d23c ML	20	#include <fcntl.h>
	21	#include <unistd.h>
	22	#include <stdlib.h>
	23	#include <string.h>
f4816ac6 ML	24	#include <glib.h>
	25	#include "libsigrok.h"
	26	#include "libsigrok-internal.h"
	27	#include "protocol.h"
	28
e0b7d23c ML	29	static const int hwcaps[] = {
	30	SR_HWCAP_OSCILLOSCOPE,
	31	SR_HWCAP_LIMIT_SAMPLES,
	32	SR_HWCAP_TIMEBASE,
	33	SR_HWCAP_TRIGGER_SOURCE,
	34	SR_HWCAP_TRIGGER_SLOPE,
	35	SR_HWCAP_HORIZ_TRIGGERPOS,
	36	SR_HWCAP_VDIV,
	37	SR_HWCAP_COUPLING,
	38	0,
	39	};
	40
e0b7d23c ML	41	static const struct sr_rational timebases[] = {
	42	/* nanoseconds */
	43	{ 2, 1000000000 },
	44	{ 5, 1000000000 },
	45	{ 10, 1000000000 },
	46	{ 20, 1000000000 },
	47	{ 50, 1000000000 },
	48	{ 100, 1000000000 },
	49	{ 500, 1000000000 },
	50	/* microseconds */
	51	{ 1, 1000000 },
	52	{ 2, 1000000 },
	53	{ 5, 1000000 },
	54	{ 10, 1000000 },
	55	{ 20, 1000000 },
	56	{ 50, 1000000 },
	57	{ 100, 1000000 },
	58	{ 200, 1000000 },
	59	{ 500, 1000000 },
	60	/* milliseconds */
	61	{ 1, 1000 },
	62	{ 2, 1000 },
	63	{ 5, 1000 },
	64	{ 10, 1000 },
	65	{ 20, 1000 },
	66	{ 50, 1000 },
	67	{ 100, 1000 },
	68	{ 200, 1000 },
	69	{ 500, 1000 },
	70	/* seconds */
	71	{ 1, 1 },
	72	{ 2, 1 },
	73	{ 5, 1 },
	74	{ 10, 1 },
	75	{ 20, 1 },
	76	{ 50, 1 },
	77	{ 0, 0},
	78	};
	79
	80	static const struct sr_rational vdivs[] = {
	81	/* millivolts */
	82	{ 2, 1000 },
	83	{ 5, 1000 },
	84	{ 10, 1000 },
	85	{ 20, 1000 },
	86	{ 50, 1000 },
	87	{ 100, 1000 },
	88	{ 200, 1000 },
	89	{ 500, 1000 },
	90	/* volts */
	91	{ 1, 1 },
	92	{ 2, 1 },
	93	{ 5, 1 },
	94	{ 10, 1 },
	95	{ 0, 0 },
	96	};
	97
	98	static const char *trigger_sources[] = {
	99	"CH1",
	100	"CH2",
	101	"EXT",
	102	"AC Line",
	103	NULL,
	104	};
105
106	static const char *coupling[] = {
107	"AC",
108	"DC",
109	"GND",
110	NULL,
111	};
112
512bb890 BV	113	static const char *supported_models[] = {
	114	"DS1052E",
	115	"DS1102E",
	116	"DS1052D",
	117	"DS1102D"
	118	};
	119
f4816ac6 ML	120	SR_PRIV struct sr_dev_driver rigol_ds1xx2_driver_info;
	121	static struct sr_dev_driver *di = &rigol_ds1xx2_driver_info;
	122
	123	/* Properly close and free all devices. */
	124	static int clear_instances(void)
	125	{
	126	struct sr_dev_inst *sdi;
	127	struct drv_context *drvc;
	128	struct dev_context *devc;
	129	GSList *l;
	130
	131	if (!(drvc = di->priv))
	132	return SR_OK;
	133
	134	for (l = drvc->instances; l; l = l->next) {
	135	if (!(sdi = l->data))
	136	continue;
	137	if (!(devc = sdi->priv))
	138	continue;
	139
fb6e5ba8	140	g_free(devc->device);
e0b7d23c	141	close(devc->fd);
f4816ac6 ML	142
	143	sr_dev_inst_free(sdi);
	144	}
	145
	146	g_slist_free(drvc->instances);
	147	drvc->instances = NULL;
	148
	149	return SR_OK;
	150	}
	151
e0b7d23c	152	static int hw_init(struct sr_context *sr_ctx)
f4816ac6 ML	153	{
f4816ac6 ML	154	struct drv_context *drvc;
e0b7d23c	155	(void)sr_ctx;
f4816ac6 ML	156
	157	if (!(drvc = g_try_malloc0(sizeof(struct drv_context)))) {
	158	sr_err("Driver context malloc failed.");
	159	return SR_ERR_MALLOC;
	160	}
	161
f4816ac6 ML	162	di->priv = drvc;
	163
	164	return SR_OK;
	165	}
	166
	167	static GSList hw_scan(GSList options)
	168	{
	169	struct drv_context *drvc;
e0b7d23c ML	170	struct sr_dev_inst *sdi;
	171	struct dev_context *devc;
	172	struct sr_probe *probe;
f4816ac6	173	GSList *devices;
fb6e5ba8 ML	174	GDir *dir;
	175	const gchar *dev_name;
	176	const gchar *dev_dir = "/dev/";
	177	const gchar *prefix = "usbtmc";
	178	gchar *device;
	179	const gchar idn_query = "IDN?";
29d957ce	180	int len, num_tokens, fd, i;
fb6e5ba8 ML	181	const gchar *delimiter = ",";
fb6e5ba8 ML	182	gchar **tokens;
512bb890 BV	183	const char manufacturer, model, *version;
	184	int num_models;
	185	gboolean matched = FALSE;
fb6e5ba8 ML	186	char buf[256];
fb6e5ba8 ML	187
f4816ac6 ML	188	(void)options;
	189
	190	devices = NULL;
	191	drvc = di->priv;
	192	drvc->instances = NULL;
	193
fb6e5ba8	194	dir = g_dir_open("/sys/class/usb/", 0, NULL);
e0b7d23c	195
fb6e5ba8 ML	196	if (dir == NULL)
fb6e5ba8 ML	197	return NULL;
e0b7d23c	198
29d957ce	199	while ((dev_name = g_dir_read_name(dir)) != NULL) {
fb6e5ba8 ML	200	if (strncmp(dev_name, prefix, strlen(prefix)))
	201	continue;
	202
	203	device = g_strconcat(dev_dir, dev_name, NULL);
	204
	205	fd = open(device, O_RDWR);
	206	len = write(fd, idn_query, strlen(idn_query));
	207	len = read(fd, buf, sizeof(buf));
	208	close(fd);
29d957ce	209	if (len == 0) {
fb6e5ba8 ML	210	g_free(device);
	211	return NULL;
	212	}
	213
	214	buf[len] = 0;
	215	tokens = g_strsplit(buf, delimiter, 0);
	216	close(fd);
512bb890	217	sr_dbg("response: %s %d [%s]", device, len, buf);
fb6e5ba8 ML	218
	219	for (num_tokens = 0; tokens[num_tokens] != NULL; num_tokens++);
	220
512bb890	221	if (num_tokens < 4) {
fb6e5ba8 ML	222	g_strfreev(tokens);
fb6e5ba8 ML	223	g_free(device);
e0b7d23c	224	return NULL;
fb6e5ba8	225	}
512bb890 BV	226
	227	manufacturer = tokens[0];
	228	model = tokens[1];
	229	version = tokens[3];
	230
	231	if (strcmp(manufacturer, "Rigol Technologies")) {
	232	g_strfreev(tokens);
	233	g_free(device);
	234	return NULL;
	235	}
	236
	237	num_models = sizeof(supported_models) / sizeof(supported_models[0]);
	238
	239	for (i = 0; i < num_models; i++) {
	240	if (!strcmp(model, supported_models[i])) {
	241	matched = 1;
	242	break;
	243	}
	244	}
	245
	246	if (!matched \|\| !(sdi = sr_dev_inst_new(0, SR_ST_ACTIVE,
	247	manufacturer, model, version))) {
	248	g_strfreev(tokens);
	249	g_free(device);
	250	return NULL;
	251	}
	252
fb6e5ba8 ML	253	g_strfreev(tokens);
fb6e5ba8 ML	254
29d957ce UH	255	if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
29d957ce UH	256	sr_err("Device context malloc failed.");
fb6e5ba8 ML	257	g_free(device);
	258	return NULL;
	259	}
	260
	261	devc->device = device;
	262
	263	sdi->priv = devc;
	264	sdi->driver = di;
	265
29d957ce UH	266	for (i = 0; i < 2; i++) {
	267	if (!(probe = sr_probe_new(0, SR_PROBE_ANALOG, TRUE,
	268	i == 0 ? "CH1" : "CH2")))
fb6e5ba8 ML	269	return NULL;
	270	sdi->probes = g_slist_append(sdi->probes, probe);
	271	}
	272
	273	drvc->instances = g_slist_append(drvc->instances, sdi);
	274	devices = g_slist_append(devices, sdi);
e0b7d23c	275	}
fb6e5ba8 ML	276
fb6e5ba8 ML	277	g_dir_close(dir);
f4816ac6 ML	278
	279	return devices;
	280	}
	281
	282	static GSList *hw_dev_list(void)
	283	{
	284	struct drv_context *drvc;
	285
	286	drvc = di->priv;
	287
	288	return drvc->instances;
	289	}
	290
	291	static int hw_dev_open(struct sr_dev_inst *sdi)
	292	{
29d957ce UH	293	struct dev_context *devc;
29d957ce UH	294	int fd;
fb6e5ba8	295
29d957ce	296	devc = sdi->priv;
e0b7d23c	297
29d957ce	298	if ((fd = open(devc->device, O_RDWR)) == -1)
e0b7d23c ML	299	return SR_ERR;
e0b7d23c ML	300
e0b7d23c ML	301	devc->fd = fd;
	302
	303	devc->scale = 1;
f4816ac6 ML	304
	305	return SR_OK;
	306	}
	307
	308	static int hw_dev_close(struct sr_dev_inst *sdi)
	309	{
29d957ce UH	310	struct dev_context *devc;
	311
	312	devc = sdi->priv;
e0b7d23c ML	313
e0b7d23c ML	314	close(devc->fd);
f4816ac6 ML	315
	316	return SR_OK;
	317	}
	318
	319	static int hw_cleanup(void)
	320	{
	321	clear_instances();
	322
f4816ac6 ML	323	return SR_OK;
	324	}
	325
	326	static int hw_info_get(int info_id, const void **data,
	327	const struct sr_dev_inst *sdi)
	328	{
e0b7d23c ML	329	(void)sdi;
e0b7d23c ML	330
f4816ac6	331	switch (info_id) {
e0b7d23c ML	332	case SR_DI_HWCAPS:
	333	*data = hwcaps;
	334	break;
e0b7d23c ML	335	case SR_DI_TIMEBASES:
	336	*data = timebases;
	337	break;
	338	case SR_DI_TRIGGER_SOURCES:
	339	*data = trigger_sources;
	340	break;
	341	case SR_DI_VDIVS:
	342	*data = vdivs;
	343	break;
	344	case SR_DI_COUPLING:
	345	*data = coupling;
	346	break;
f4816ac6	347	default:
f4816ac6 ML	348	return SR_ERR_ARG;
	349	}
	350
	351	return SR_OK;
	352	}
	353
	354	static int hw_dev_config_set(const struct sr_dev_inst *sdi, int hwcap,
	355	const void *value)
	356	{
29d957ce	357	struct dev_context *devc;
e0b7d23c ML	358	uint64_t tmp_u64;
	359	float tmp_float;
	360	struct sr_rational tmp_rat;
	361	int ret, i, j;
	362	char *channel;
f4816ac6	363
29d957ce UH	364	devc = sdi->priv;
29d957ce UH	365
f4816ac6 ML	366	if (sdi->status != SR_ST_ACTIVE) {
	367	sr_err("Device inactive, can't set config options.");
	368	return SR_ERR;
	369	}
	370
	371	ret = SR_OK;
	372	switch (hwcap) {
29d957ce	373	case SR_HWCAP_LIMIT_FRAMES:
e0b7d23c ML	374	devc->limit_frames = (const uint64_t )value;
	375	break;
	376	case SR_HWCAP_TRIGGER_SLOPE:
	377	tmp_u64 = (const int )value;
29d957ce UH	378	rigol_ds1xx2_send_data(devc->fd, ":TRIG:EDGE:SLOP %s\n",
29d957ce UH	379	tmp_u64 ? "POS" : "NEG");
e0b7d23c ML	380	break;
	381	case SR_HWCAP_HORIZ_TRIGGERPOS:
	382	tmp_float = (const float )value;
542843f7	383	rigol_ds1xx2_send_data(devc->fd, ":TIM:OFFS %.9f\n", tmp_float);
e0b7d23c ML	384	break;
	385	case SR_HWCAP_TIMEBASE:
	386	tmp_rat = (const struct sr_rational )value;
29d957ce UH	387	rigol_ds1xx2_send_data(devc->fd, ":TIM:SCAL %.9f\n",
29d957ce UH	388	(float)tmp_rat.p / tmp_rat.q);
e0b7d23c ML	389	break;
	390	case SR_HWCAP_TRIGGER_SOURCE:
	391	if (!strcmp(value, "CH1"))
	392	channel = "CHAN1";
	393	else if (!strcmp(value, "CH2"))
	394	channel = "CHAN2";
	395	else if (!strcmp(value, "EXT"))
	396	channel = "EXT";
	397	else if (!strcmp(value, "AC Line"))
	398	channel = "ACL";
29d957ce	399	else {
e0b7d23c ML	400	ret = SR_ERR_ARG;
e0b7d23c ML	401	break;
4e108ace ML	402	}
4e108ace ML	403	rigol_ds1xx2_send_data(devc->fd, ":TRIG:EDGE:SOUR %s\n", channel);
e0b7d23c ML	404	break;
	405	case SR_HWCAP_VDIV:
	406	/* TODO: Not supporting vdiv per channel yet. */
	407	tmp_rat = (const struct sr_rational )value;
	408	for (i = 0; vdivs[i].p && vdivs[i].q; i++) {
	409	if (vdivs[i].p == tmp_rat.p
	410	&& vdivs[i].q == tmp_rat.q) {
29d957ce	411	devc->scale = (float)tmp_rat.p / tmp_rat.q;
e0b7d23c	412	for (j = 0; j < 2; j++)
29d957ce UH	413	rigol_ds1xx2_send_data(devc->fd,
29d957ce UH	414	":CHAN%d:SCAL %.3f\n", j, devc->scale);
e0b7d23c ML	415	break;
	416	}
	417	}
	418	if (vdivs[i].p == 0 && vdivs[i].q == 0)
	419	ret = SR_ERR_ARG;
	420	break;
	421	case SR_HWCAP_COUPLING:
	422	/* TODO: Not supporting coupling per channel yet. */
	423	for (i = 0; coupling[i]; i++) {
	424	if (!strcmp(value, coupling[i])) {
	425	for (j = 0; j < 2; j++)
29d957ce UH	426	rigol_ds1xx2_send_data(devc->fd,
29d957ce UH	427	":CHAN%d:COUP %s\n", j, coupling[i]);
e0b7d23c ML	428	break;
	429	}
	430	}
	431	if (coupling[i] == 0)
	432	ret = SR_ERR_ARG;
	433	break;
f4816ac6 ML	434	default:
	435	sr_err("Unknown hardware capability: %d.", hwcap);
	436	ret = SR_ERR_ARG;
29d957ce	437	break;
f4816ac6 ML	438	}
	439
	440	return ret;
	441	}
	442
	443	static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
	444	void *cb_data)
	445	{
29d957ce	446	struct dev_context *devc;
e0b7d23c ML	447	struct sr_datafeed_packet packet;
e0b7d23c ML	448	struct sr_datafeed_header header;
e0b7d23c ML	449	char buf[256];
e0b7d23c ML	450	int len;
29d957ce	451
e0b7d23c ML	452	(void)cb_data;
e0b7d23c ML	453
29d957ce UH	454	devc = sdi->priv;
29d957ce UH	455
e0b7d23c ML	456	devc->num_frames = 0;
	457
	458	sr_source_add(devc->fd, G_IO_IN, 50, rigol_ds1xx2_receive_data, (void *)sdi);
	459
	460	/* Send header packet to the session bus. */
	461	packet.type = SR_DF_HEADER;
	462	packet.payload = (unsigned char *)&header;
	463	header.feed_version = 1;
	464	gettimeofday(&header.starttime, NULL);
	465	sr_session_send(cb_data, &packet);
	466
e0b7d23c ML	467	rigol_ds1xx2_send_data(devc->fd, ":CHAN1:SCAL?\n");
	468	len = read(devc->fd, buf, sizeof(buf));
	469	buf[len] = 0;
	470	devc->scale = atof(buf);
29d957ce	471	sr_dbg("Scale is %.3f.", devc->scale);
e0b7d23c ML	472	rigol_ds1xx2_send_data(devc->fd, ":CHAN1:OFFS?\n");
	473	len = read(devc->fd, buf, sizeof(buf));
	474	buf[len] = 0;
	475	devc->offset = atof(buf);
29d957ce	476	sr_dbg("Offset is %.6f.", devc->offset);
e0b7d23c	477	rigol_ds1xx2_send_data(devc->fd, ":WAV:DATA?\n");
f4816ac6 ML	478
	479	return SR_OK;
	480	}
	481
	482	static int hw_dev_acquisition_stop(struct sr_dev_inst sdi, void cb_data)
	483	{
29d957ce UH	484	struct dev_context *devc;
29d957ce UH	485
f4816ac6 ML	486	(void)cb_data;
f4816ac6 ML	487
29d957ce UH	488	devc = sdi->priv;
29d957ce UH	489
f4816ac6 ML	490	if (sdi->status != SR_ST_ACTIVE) {
	491	sr_err("Device inactive, can't stop acquisition.");
	492	return SR_ERR;
	493	}
	494
e0b7d23c	495	sr_source_remove(devc->fd);
f4816ac6 ML	496
	497	return SR_OK;
	498	}
	499
	500	SR_PRIV struct sr_dev_driver rigol_ds1xx2_driver_info = {
	501	.name = "rigol-ds1xx2",
	502	.longname = "Rigol DS1xx2",
	503	.api_version = 1,
	504	.init = hw_init,
	505	.cleanup = hw_cleanup,
	506	.scan = hw_scan,
	507	.dev_list = hw_dev_list,
	508	.dev_clear = clear_instances,
	509	.dev_open = hw_dev_open,
	510	.dev_close = hw_dev_close,
	511	.info_get = hw_info_get,
	512	.dev_config_set = hw_dev_config_set,
	513	.dev_acquisition_start = hw_dev_acquisition_start,
	514	.dev_acquisition_stop = hw_dev_acquisition_stop,
	515	.priv = NULL,
	516	};