]> sigrok.org Git - libsigrok.git/blame - hardware/rigol-ds/protocol.h
rigol-ds: Support VS5000 series devices.
[libsigrok.git] / hardware / rigol-ds / protocol.h
CommitLineData
f4816ac6
ML
1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
88e429c9 5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
f4816ac6
ML
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
3086efdd
ML
21#ifndef LIBSIGROK_HARDWARE_RIGOL_DS_PROTOCOL_H
22#define LIBSIGROK_HARDWARE_RIGOL_DS_PROTOCOL_H
f4816ac6
ML
23
24#include <stdint.h>
bafd4890 25#include <stdbool.h>
f4816ac6
ML
26#include "libsigrok.h"
27#include "libsigrok-internal.h"
28
29a27196 29/* Message logging helpers with subsystem-specific prefix string. */
3086efdd 30#define LOG_PREFIX "rigol-ds: "
29a27196
UH
31#define sr_log(l, s, args...) sr_log(l, LOG_PREFIX s, ## args)
32#define sr_spew(s, args...) sr_spew(LOG_PREFIX s, ## args)
33#define sr_dbg(s, args...) sr_dbg(LOG_PREFIX s, ## args)
34#define sr_info(s, args...) sr_info(LOG_PREFIX s, ## args)
35#define sr_warn(s, args...) sr_warn(LOG_PREFIX s, ## args)
36#define sr_err(s, args...) sr_err(LOG_PREFIX s, ## args)
f4816ac6 37
babab622
ML
38#define DS1000_ANALOG_LIVE_WAVEFORM_SIZE 600
39#define DS2000_ANALOG_LIVE_WAVEFORM_SIZE 1400
962af1a3 40#define VS5000_ANALOG_LIVE_WAVEFORM_SIZE 2048
babab622
ML
41/* Needs to be made configurable later */
42#define DS2000_ANALOG_MEM_WAVEFORM_SIZE_1C 14000
43#define DS2000_ANALOG_MEM_WAVEFORM_SIZE_2C 7000
6bb192bc 44#define DIGITAL_WAVEFORM_SIZE 1210
babab622
ML
45/* Size of acquisition buffers */
46#define ACQ_BUFFER_SIZE 32768
47
48enum rigol_ds_series {
49 RIGOL_DS1000,
50 RIGOL_DS1000Z,
51 RIGOL_DS2000,
52 RIGOL_DS4000,
53 RIGOL_DS6000,
962af1a3 54 RIGOL_VS5000,
babab622
ML
55};
56
57enum rigol_protocol_flavor {
962af1a3 58 /* Used by DS1000 and VS5000 series */
babab622
ML
59 PROTOCOL_LEGACY,
60 /* Used by DS2000, DS4000, DS6000, ... series */
61 PROTOCOL_IEEE488_2,
62};
63
64enum data_source {
65 DATA_SOURCE_LIVE,
66 DATA_SOURCE_MEMORY,
67 DATA_SOURCE_SEGMENTED,
68};
e0b7d23c 69
bafd4890
ML
70struct rigol_ds_model {
71 char *name;
babab622
ML
72 enum rigol_ds_series series;
73 enum rigol_protocol_flavor protocol;
bafd4890
ML
74 uint64_t min_timebase[2];
75 uint64_t max_timebase[2];
76 uint64_t min_vdiv[2];
77 bool has_digital;
babab622
ML
78 int num_horizontal_divs;
79};
80
81enum wait_events {
82 WAIT_NONE, /* Don't wait */
83 WAIT_TRIGGER, /* Wait for trigger (only live capture) */
84 WAIT_BLOCK, /* Wait for block data (only when reading sample mem) */
85 WAIT_STOP, /* Wait for scope stopping (only single shots) */
bafd4890
ML
86};
87
f4816ac6
ML
88/** Private, per-device-instance driver context. */
89struct dev_context {
bafd4890
ML
90 /* Device model */
91 const struct rigol_ds_model *model;
92
93 /* Device properties */
94 const uint64_t (*timebases)[2];
95 uint64_t num_timebases;
96 const uint64_t (*vdivs)[2];
97 uint64_t num_vdivs;
6bb192bc 98
3d3a601e
ML
99 /* Probe groups */
100 struct sr_probe_group analog_groups[2];
101 struct sr_probe_group digital_group;
102
254dd102 103 /* Acquisition settings */
6bb192bc
ML
104 GSList *enabled_analog_probes;
105 GSList *enabled_digital_probes;
e0b7d23c 106 uint64_t limit_frames;
f4816ac6 107 void *cb_data;
babab622
ML
108 enum data_source data_source;
109 uint64_t analog_frame_size;
f4816ac6 110
254dd102 111 /* Device settings */
6bb192bc
ML
112 gboolean analog_channels[2];
113 gboolean digital_channels[16];
254dd102
BV
114 float timebase;
115 float vdiv[2];
bafd4890 116 int vert_reference[2];
254dd102
BV
117 float vert_offset[2];
118 char *trigger_source;
119 float horiz_triggerpos;
120 char *trigger_slope;
121 char *coupling[2];
122
123 /* Operational state */
254dd102 124 uint64_t num_frames;
bafd4890 125 /* FIXME: misnomer, actually this is number of frame samples? */
ee7e9bee 126 uint64_t num_frame_bytes;
254dd102 127 struct sr_probe *channel_frame;
bafd4890
ML
128 /* Number of bytes in current data block, if 0 block header expected */
129 uint64_t num_block_bytes;
130 /* Number of data block bytes already read */
131 uint64_t num_block_read;
babab622
ML
132 /* What to wait for in *_receive */
133 enum wait_events wait_event;
134 /* Trigger/block copying/stop waiting status */
135 int wait_status;
136 /* Acq buffers used for reading from the scope and sending data to app */
137 unsigned char *buffer;
138 float *data;
f4816ac6
ML
139};
140
babab622 141SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi);
3086efdd 142SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data);
3086efdd 143SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi);
e0b7d23c 144
f4816ac6 145#endif