[libsigrok.git] / hardware / openbench-logic-sniffer / api.c

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include "protocol.h"
#include <libserialport.h>

#define SERIALCOMM "115200/8n1"

static const int32_t hwopts[] = {
	SR_CONF_CONN,
	SR_CONF_SERIALCOMM,
};

static const int32_t hwcaps[] = {
	SR_CONF_LOGIC_ANALYZER,
	SR_CONF_SAMPLERATE,
	SR_CONF_TRIGGER_TYPE,
	SR_CONF_CAPTURE_RATIO,
	SR_CONF_LIMIT_SAMPLES,
	SR_CONF_EXTERNAL_CLOCK,
	SR_CONF_PATTERN_MODE,
	SR_CONF_SWAP,
	SR_CONF_RLE,
};

#define STR_PATTERN_NONE     "None"
#define STR_PATTERN_EXTERNAL "External"
#define STR_PATTERN_INTERNAL "Internal"

/* Supported methods of test pattern outputs */
enum {
	/**
	 * Capture pins 31:16 (unbuffered wing) output a test pattern
	 * that can captured on pins 0:15.
	 */
	PATTERN_EXTERNAL,

	/** Route test pattern internally to capture buffer. */
	PATTERN_INTERNAL,
};

static const char *patterns[] = {
	STR_PATTERN_NONE,
	STR_PATTERN_EXTERNAL,
	STR_PATTERN_INTERNAL,
};

/* Channels are numbered 0-31 (on the PCB silkscreen). */
SR_PRIV const char *ols_channel_names[NUM_PROBES + 1] = {
	"0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
	"13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
	"24", "25", "26", "27", "28", "29", "30", "31",
	NULL,
};

/* Default supported samplerates, can be overridden by device metadata. */
static const uint64_t samplerates[] = {
	SR_HZ(10),
	SR_MHZ(200),
	SR_HZ(1),
};

SR_PRIV struct sr_dev_driver ols_driver_info;
static struct sr_dev_driver *di = &ols_driver_info;

static int init(struct sr_context *sr_ctx)
{
	return std_init(sr_ctx, di, LOG_PREFIX);
}

static GSList *scan(GSList *options)
{
	struct sr_config *src;
	struct sr_dev_inst *sdi;
	struct drv_context *drvc;
	struct dev_context *devc;
	struct sr_channel *ch;
	struct sr_serial_dev_inst *serial;
	GPollFD probefd;
	GSList *l, *devices;
	int ret, i;
	const char *conn, *serialcomm;
	char buf[8];

	drvc = di->priv;

	devices = NULL;

	conn = serialcomm = NULL;
	for (l = options; l; l = l->next) {
		src = l->data;
		switch (src->key) {
		case SR_CONF_CONN:
			conn = g_variant_get_string(src->data, NULL);
			break;
		case SR_CONF_SERIALCOMM:
			serialcomm = g_variant_get_string(src->data, NULL);
			break;
		}
	}
	if (!conn)
		return NULL;

	if (serialcomm == NULL)
		serialcomm = SERIALCOMM;

	if (!(serial = sr_serial_dev_inst_new(conn, serialcomm)))
		return NULL;

	/* The discovery procedure is like this: first send the Reset
	 * command (0x00) 5 times, since the device could be anywhere
	 * in a 5-byte command. Then send the ID command (0x02).
	 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
	 * have a match.
	 */
	sr_info("Probing %s.", conn);
	if (serial_open(serial, SERIAL_RDWR | SERIAL_NONBLOCK) != SR_OK)
		return NULL;

	ret = SR_OK;
	for (i = 0; i < 5; i++) {
		if ((ret = send_shortcommand(serial, CMD_RESET)) != SR_OK) {
			sr_err("Port %s is not writable.", conn);
			break;
		}
	}
	if (ret != SR_OK) {
		serial_close(serial);
		sr_err("Could not use port %s. Quitting.", conn);
		return NULL;
	}
	send_shortcommand(serial, CMD_ID);

	/* Wait 10ms for a response. */
	g_usleep(10000);

	sp_get_port_handle(serial->data, &probefd.fd);
	probefd.events = G_IO_IN;
	g_poll(&probefd, 1, 1);

	if (probefd.revents != G_IO_IN)
		return NULL;
	if (serial_read_blocking(serial, buf, 4) != 4)
		return NULL;
	if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
		return NULL;

	/* Definitely using the OLS protocol, check if it supports
	 * the metadata command.
	 */
	send_shortcommand(serial, CMD_METADATA);
	if (g_poll(&probefd, 1, 10) > 0) {
		/* Got metadata. */
		sdi = get_metadata(serial);
		sdi->index = 0;
		devc = sdi->priv;
	} else {
		/* Not an OLS -- some other board that uses the sump protocol. */
		sr_info("Device does not support metadata.");
		sdi = sr_dev_inst_new(0, SR_ST_INACTIVE,
				"Sump", "Logic Analyzer", "v1.0");
		sdi->driver = di;
		for (i = 0; i < 32; i++) {
			if (!(ch = sr_probe_new(i, SR_PROBE_LOGIC, TRUE,
					ols_channel_names[i])))
				return 0;
			sdi->channels = g_slist_append(sdi->channels, ch);
		}
		devc = ols_dev_new();
		sdi->priv = devc;
	}
	/* Configure samplerate and divider. */
	if (ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
		sr_dbg("Failed to set default samplerate (%"PRIu64").",
				DEFAULT_SAMPLERATE);
	/* Clear trigger masks, values and stages. */
	ols_configure_channels(sdi);
	sdi->inst_type = SR_INST_SERIAL;
	sdi->conn = serial;

	drvc->instances = g_slist_append(drvc->instances, sdi);
	devices = g_slist_append(devices, sdi);

	serial_close(serial);

	return devices;
}

static GSList *dev_list(void)
{
	return ((struct drv_context *)(di->priv))->instances;
}

static int cleanup(void)
{
	return std_dev_clear(di, NULL);
}

static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
		const struct sr_channel_group *cg)
{
	struct dev_context *devc;

	(void)cg;

	if (!sdi)
		return SR_ERR_ARG;

	devc = sdi->priv;
	switch (id) {
	case SR_CONF_SAMPLERATE:
		*data = g_variant_new_uint64(devc->cur_samplerate);
		break;
	case SR_CONF_CAPTURE_RATIO:
		*data = g_variant_new_uint64(devc->capture_ratio);
		break;
	case SR_CONF_LIMIT_SAMPLES:
		*data = g_variant_new_uint64(devc->limit_samples);
		break;
	case SR_CONF_PATTERN_MODE:
		if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
			*data = g_variant_new_string(STR_PATTERN_EXTERNAL);
		else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
			*data = g_variant_new_string(STR_PATTERN_INTERNAL);
		else
			*data = g_variant_new_string(STR_PATTERN_NONE);
		break;
	case SR_CONF_RLE:
		*data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
		break;
	default:
		return SR_ERR_NA;
	}

	return SR_OK;
}

static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi,
		const struct sr_channel_group *cg)
{
	struct dev_context *devc;
	uint16_t flag;
	uint64_t tmp_u64;
	int ret;
	const char *stropt;

	(void)cg;

	if (sdi->status != SR_ST_ACTIVE)
		return SR_ERR_DEV_CLOSED;

	devc = sdi->priv;

	switch (id) {
	case SR_CONF_SAMPLERATE:
		tmp_u64 = g_variant_get_uint64(data);
		if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
			return SR_ERR_SAMPLERATE;
		ret = ols_set_samplerate(sdi, g_variant_get_uint64(data));
		break;
	case SR_CONF_LIMIT_SAMPLES:
		tmp_u64 = g_variant_get_uint64(data);
		if (tmp_u64 < MIN_NUM_SAMPLES)
			return SR_ERR;
		devc->limit_samples = tmp_u64;
		ret = SR_OK;
		break;
	case SR_CONF_CAPTURE_RATIO:
		devc->capture_ratio = g_variant_get_uint64(data);
		if (devc->capture_ratio < 0 || devc->capture_ratio > 100) {
			devc->capture_ratio = 0;
			ret = SR_ERR;
		} else
			ret = SR_OK;
		break;
	case SR_CONF_EXTERNAL_CLOCK:
		if (g_variant_get_boolean(data)) {
			sr_info("Enabling external clock.");
			devc->flag_reg |= FLAG_CLOCK_EXTERNAL;
		} else {
			sr_info("Disabled external clock.");
			devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
		}
		ret = SR_OK;
		break;
	case SR_CONF_PATTERN_MODE:
		stropt = g_variant_get_string(data, NULL);
		ret = SR_OK;
		flag = 0xffff;
		if (!strcmp(stropt, STR_PATTERN_NONE)) {
			sr_info("Disabling test modes.");
			flag = 0x0000;
		}else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
			sr_info("Enabling internal test mode.");
			flag = FLAG_INTERNAL_TEST_MODE;
		} else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
			sr_info("Enabling external test mode.");
			flag = FLAG_EXTERNAL_TEST_MODE;
		} else {
			ret = SR_ERR;
		}
		if (flag != 0xffff) {
			devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE);
			devc->flag_reg |= flag;
		}
		break;
	case SR_CONF_SWAP:
		if (g_variant_get_boolean(data)) {
			sr_info("Enabling channel swapping.");
			devc->flag_reg |= FLAG_SWAP_PROBES;
		} else {
			sr_info("Disabling channel swapping.");
			devc->flag_reg &= ~FLAG_SWAP_PROBES;
		}
		ret = SR_OK;
		break;

	case SR_CONF_RLE:
		if (g_variant_get_boolean(data)) {
			sr_info("Enabling RLE.");
			devc->flag_reg |= FLAG_RLE;
		} else {
			sr_info("Disabling RLE.");
			devc->flag_reg &= ~FLAG_RLE;
		}
		ret = SR_OK;
		break;
	default:
		ret = SR_ERR_NA;
	}

	return ret;
}

static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
		const struct sr_channel_group *cg)
{
	struct dev_context *devc;
	GVariant *gvar, *grange[2];
	GVariantBuilder gvb;
	int num_channels, i;

	(void)cg;

	switch (key) {
	case SR_CONF_SCAN_OPTIONS:
		*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
				hwopts, ARRAY_SIZE(hwopts), sizeof(int32_t));
		break;
	case SR_CONF_DEVICE_OPTIONS:
		*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
				hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
		break;
	case SR_CONF_SAMPLERATE:
		g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
		gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
				ARRAY_SIZE(samplerates), sizeof(uint64_t));
		g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
		*data = g_variant_builder_end(&gvb);
		break;
	case SR_CONF_TRIGGER_TYPE:
		*data = g_variant_new_string(TRIGGER_TYPE);
		break;
	case SR_CONF_PATTERN_MODE:
		*data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
		break;
	case SR_CONF_LIMIT_SAMPLES:
		if (!sdi)
			return SR_ERR_ARG;
		devc = sdi->priv;
		if (devc->flag_reg & FLAG_RLE)
			return SR_ERR_NA;
		if (devc->max_samples == 0)
			/* Device didn't specify sample memory size in metadata. */
			return SR_ERR_NA;
		/*
		 * Channel groups are turned off if no channels in that group are
		 * enabled, making more room for samples for the enabled group.
		*/
		ols_configure_channels(sdi);
		num_channels = 0;
		for (i = 0; i < 4; i++) {
			if (devc->channel_mask & (0xff << (i * 8)))
				num_channels++;
		}
		grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
		grange[1] = g_variant_new_uint64(devc->max_samples / num_channels);
		*data = g_variant_new_tuple(grange, 2);
		break;
	default:
		return SR_ERR_NA;
	}

	return SR_OK;
}

static int set_trigger(const struct sr_dev_inst *sdi, int stage)
{
	struct dev_context *devc;
	struct sr_serial_dev_inst *serial;
	uint8_t cmd, arg[4];

	devc = sdi->priv;
	serial = sdi->conn;

	cmd = CMD_SET_TRIGGER_MASK + stage * 4;
	arg[0] = devc->trigger_mask[stage] & 0xff;
	arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
	arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
	arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
	if (send_longcommand(serial, cmd, arg) != SR_OK)
		return SR_ERR;

	cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
	arg[0] = devc->trigger_value[stage] & 0xff;
	arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
	arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
	arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
	if (send_longcommand(serial, cmd, arg) != SR_OK)
		return SR_ERR;

	cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
	arg[0] = arg[1] = arg[3] = 0x00;
	arg[2] = stage;
	if (stage == devc->num_stages)
		/* Last stage, fire when this one matches. */
		arg[3] |= TRIGGER_START;
	if (send_longcommand(serial, cmd, arg) != SR_OK)
		return SR_ERR;

	return SR_OK;
}

static int dev_acquisition_start(const struct sr_dev_inst *sdi,
		void *cb_data)
{
	struct dev_context *devc;
	struct sr_serial_dev_inst *serial;
	uint16_t samplecount, readcount, delaycount;
	uint8_t changrp_mask, arg[4];
	int num_channels;
	int ret, i;

	if (sdi->status != SR_ST_ACTIVE)
		return SR_ERR_DEV_CLOSED;

	devc = sdi->priv;
	serial = sdi->conn;

	if (ols_configure_channels(sdi) != SR_OK) {
		sr_err("Failed to configure channels.");
		return SR_ERR;
	}

	/*
	 * Enable/disable channel groups in the flag register according to the
	 * channel mask. Calculate this here, because num_channels is needed
	 * to limit readcount.
	 */
	changrp_mask = 0;
	num_channels = 0;
	for (i = 0; i < 4; i++) {
		if (devc->channel_mask & (0xff << (i * 8))) {
			changrp_mask |= (1 << i);
			num_channels++;
		}
	}

	/*
	 * Limit readcount to prevent reading past the end of the hardware
	 * buffer.
	 */
	samplecount = MIN(devc->max_samples / num_channels, devc->limit_samples);
	readcount = samplecount / 4;

	/* Rather read too many samples than too few. */
	if (samplecount % 4 != 0)
		readcount++;

	/* Basic triggers. */
	if (devc->trigger_mask[0] != 0x00000000) {
		/* At least one channel has a trigger on it. */
		delaycount = readcount * (1 - devc->capture_ratio / 100.0);
		devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
		for (i = 0; i <= devc->num_stages; i++) {
			sr_dbg("Setting stage %d trigger.", i);
			if ((ret = set_trigger(sdi, i)) != SR_OK)
				return ret;
		}
	} else {
		/* No triggers configured, force trigger on first stage. */
		sr_dbg("Forcing trigger at stage 0.");
		if ((ret = set_trigger(sdi, 0)) != SR_OK)
			return ret;
		delaycount = readcount;
	}

	/* Samplerate. */
	sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
			devc->cur_samplerate, devc->cur_samplerate_divider);
	arg[0] = devc->cur_samplerate_divider & 0xff;
	arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
	arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
	arg[3] = 0x00;
	if (send_longcommand(serial, CMD_SET_DIVIDER, arg) != SR_OK)
		return SR_ERR;

	/* Send sample limit and pre/post-trigger capture ratio. */
	sr_dbg("Setting sample limit %d, trigger point at %d",
			(readcount - 1) * 4, (delaycount - 1) * 4);
	arg[0] = ((readcount - 1) & 0xff);
	arg[1] = ((readcount - 1) & 0xff00) >> 8;
	arg[2] = ((delaycount - 1) & 0xff);
	arg[3] = ((delaycount - 1) & 0xff00) >> 8;
	if (send_longcommand(serial, CMD_CAPTURE_SIZE, arg) != SR_OK)
		return SR_ERR;

	/* Flag register. */
	sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
			devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
			devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
			devc->flag_reg & FLAG_RLE ? "on" : "off",
			devc->flag_reg & FLAG_FILTER ? "on": "off",
			devc->flag_reg & FLAG_DEMUX ? "on" : "off");
	/* 1 means "disable channel". */
	devc->flag_reg |= ~(changrp_mask << 2) & 0x3c;
	arg[0] = devc->flag_reg & 0xff;
	arg[1] = devc->flag_reg >> 8;
	arg[2] = arg[3] = 0x00;
	if (send_longcommand(serial, CMD_SET_FLAGS, arg) != SR_OK)
		return SR_ERR;

	/* Start acquisition on the device. */
	if (send_shortcommand(serial, CMD_RUN) != SR_OK)
		return SR_ERR;

	/* Reset all operational states. */
	devc->rle_count = devc->num_transfers = 0;
	devc->num_samples = devc->num_bytes = 0;
	devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
	memset(devc->sample, 0, 4);

	/* Send header packet to the session bus. */
	std_session_send_df_header(cb_data, LOG_PREFIX);

	serial_source_add(serial, G_IO_IN, -1, ols_receive_data, cb_data);

	return SR_OK;
}

static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
{
	(void)cb_data;

	abort_acquisition(sdi);

	return SR_OK;
}

SR_PRIV struct sr_dev_driver ols_driver_info = {
	.name = "ols",
	.longname = "Openbench Logic Sniffer",
	.api_version = 1,
	.init = init,
	.cleanup = cleanup,
	.scan = scan,
	.dev_list = dev_list,
	.dev_clear = NULL,
	.config_get = config_get,
	.config_set = config_set,
	.config_list = config_list,
	.dev_open = std_serial_dev_open,
	.dev_close = std_serial_dev_close,
	.dev_acquisition_start = dev_acquisition_start,
	.dev_acquisition_stop = dev_acquisition_stop,
	.priv = NULL,
};
Commit	Line	Data
0aba65da	1	/*
50985c20	2	* This file is part of the libsigrok project.
0aba65da	3	*
13d8e03c	4	* Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
0aba65da UH	5	*
	6	* This program is free software: you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation, either version 3 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
	20	#include "protocol.h"
bf72f649	21	#include <libserialport.h>
0aba65da UH	22
	23	#define SERIALCOMM "115200/8n1"
	24
e46aa4f6	25	static const int32_t hwopts[] = {
1953564a BV	26	SR_CONF_CONN,
1953564a BV	27	SR_CONF_SERIALCOMM,
aeabd308 UH	28	};
aeabd308 UH	29
e46aa4f6	30	static const int32_t hwcaps[] = {
1953564a BV	31	SR_CONF_LOGIC_ANALYZER,
1953564a BV	32	SR_CONF_SAMPLERATE,
0c05591a	33	SR_CONF_TRIGGER_TYPE,
1953564a BV	34	SR_CONF_CAPTURE_RATIO,
1953564a BV	35	SR_CONF_LIMIT_SAMPLES,
eb1b610b	36	SR_CONF_EXTERNAL_CLOCK,
967760a8	37	SR_CONF_PATTERN_MODE,
7b0a57fd	38	SR_CONF_SWAP,
1953564a	39	SR_CONF_RLE,
0aba65da UH	40	};
0aba65da UH	41
6d16fdfb BV	42	#define STR_PATTERN_NONE "None"
	43	#define STR_PATTERN_EXTERNAL "External"
	44	#define STR_PATTERN_INTERNAL "Internal"
967760a8 MR	45
	46	/* Supported methods of test pattern outputs */
	47	enum {
	48	/**
	49	* Capture pins 31:16 (unbuffered wing) output a test pattern
	50	* that can captured on pins 0:15.
	51	*/
	52	PATTERN_EXTERNAL,
	53
	54	/** Route test pattern internally to capture buffer. */
	55	PATTERN_INTERNAL,
	56	};
	57
7c07a178	58	static const char *patterns[] = {
6d16fdfb	59	STR_PATTERN_NONE,
7c07a178 UH	60	STR_PATTERN_EXTERNAL,
	61	STR_PATTERN_INTERNAL,
	62	};
	63
ba7dd8bb UH	64	/* Channels are numbered 0-31 (on the PCB silkscreen). */
ba7dd8bb UH	65	SR_PRIV const char *ols_channel_names[NUM_PROBES + 1] = {
78693401 UH	66	"0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
	67	"13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
	68	"24", "25", "26", "27", "28", "29", "30", "31",
0aba65da UH	69	NULL,
	70	};
	71
d3b38ad3	72	/* Default supported samplerates, can be overridden by device metadata. */
e46aa4f6 BV	73	static const uint64_t samplerates[] = {
	74	SR_HZ(10),
	75	SR_MHZ(200),
	76	SR_HZ(1),
0aba65da UH	77	};
	78
	79	SR_PRIV struct sr_dev_driver ols_driver_info;
	80	static struct sr_dev_driver *di = &ols_driver_info;
	81
03f4de8c	82	static int init(struct sr_context *sr_ctx)
0aba65da	83	{
f6beaac5	84	return std_init(sr_ctx, di, LOG_PREFIX);
0aba65da UH	85	}
0aba65da UH	86
03f4de8c	87	static GSList scan(GSList options)
0aba65da	88	{
1987b8d6	89	struct sr_config *src;
0aba65da UH	90	struct sr_dev_inst *sdi;
	91	struct drv_context *drvc;
	92	struct dev_context *devc;
ba7dd8bb	93	struct sr_channel *ch;
0aba65da UH	94	struct sr_serial_dev_inst *serial;
	95	GPollFD probefd;
	96	GSList l, devices;
	97	int ret, i;
	98	const char conn, serialcomm;
	99	char buf[8];
	100
0aba65da	101	drvc = di->priv;
4b97c74e	102
0aba65da UH	103	devices = NULL;
	104
	105	conn = serialcomm = NULL;
	106	for (l = options; l; l = l->next) {
1987b8d6 BV	107	src = l->data;
1987b8d6 BV	108	switch (src->key) {
1953564a	109	case SR_CONF_CONN:
e46aa4f6	110	conn = g_variant_get_string(src->data, NULL);
0aba65da	111	break;
1953564a	112	case SR_CONF_SERIALCOMM:
e46aa4f6	113	serialcomm = g_variant_get_string(src->data, NULL);
0aba65da UH	114	break;
	115	}
	116	}
	117	if (!conn)
	118	return NULL;
	119
	120	if (serialcomm == NULL)
	121	serialcomm = SERIALCOMM;
	122
	123	if (!(serial = sr_serial_dev_inst_new(conn, serialcomm)))
	124	return NULL;
	125
	126	/* The discovery procedure is like this: first send the Reset
	127	* command (0x00) 5 times, since the device could be anywhere
	128	* in a 5-byte command. Then send the ID command (0x02).
	129	* If the device responds with 4 bytes ("OLS1" or "SLA1"), we
	130	* have a match.
	131	*/
	132	sr_info("Probing %s.", conn);
	133	if (serial_open(serial, SERIAL_RDWR \| SERIAL_NONBLOCK) != SR_OK)
	134	return NULL;
	135
	136	ret = SR_OK;
	137	for (i = 0; i < 5; i++) {
	138	if ((ret = send_shortcommand(serial, CMD_RESET)) != SR_OK) {
	139	sr_err("Port %s is not writable.", conn);
	140	break;
	141	}
	142	}
	143	if (ret != SR_OK) {
	144	serial_close(serial);
	145	sr_err("Could not use port %s. Quitting.", conn);
	146	return NULL;
	147	}
	148	send_shortcommand(serial, CMD_ID);
	149
	150	/* Wait 10ms for a response. */
	151	g_usleep(10000);
	152
bf72f649	153	sp_get_port_handle(serial->data, &probefd.fd);
0aba65da UH	154	probefd.events = G_IO_IN;
	155	g_poll(&probefd, 1, 1);
	156
	157	if (probefd.revents != G_IO_IN)
	158	return NULL;
9f5d4c3c	159	if (serial_read_blocking(serial, buf, 4) != 4)
0aba65da UH	160	return NULL;
	161	if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
	162	return NULL;
	163
	164	/* Definitely using the OLS protocol, check if it supports
	165	* the metadata command.
	166	*/
	167	send_shortcommand(serial, CMD_METADATA);
	168	if (g_poll(&probefd, 1, 10) > 0) {
	169	/* Got metadata. */
	170	sdi = get_metadata(serial);
	171	sdi->index = 0;
	172	devc = sdi->priv;
	173	} else {
	174	/* Not an OLS -- some other board that uses the sump protocol. */
72cd99b8	175	sr_info("Device does not support metadata.");
0aba65da UH	176	sdi = sr_dev_inst_new(0, SR_ST_INACTIVE,
	177	"Sump", "Logic Analyzer", "v1.0");
	178	sdi->driver = di;
0aba65da	179	for (i = 0; i < 32; i++) {
ba7dd8bb UH	180	if (!(ch = sr_probe_new(i, SR_PROBE_LOGIC, TRUE,
ba7dd8bb UH	181	ols_channel_names[i])))
0aba65da	182	return 0;
ba7dd8bb	183	sdi->channels = g_slist_append(sdi->channels, ch);
0aba65da	184	}
bf256783	185	devc = ols_dev_new();
0aba65da UH	186	sdi->priv = devc;
0aba65da UH	187	}
bf256783 BV	188	/* Configure samplerate and divider. */
	189	if (ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
	190	sr_dbg("Failed to set default samplerate (%"PRIu64").",
	191	DEFAULT_SAMPLERATE);
	192	/* Clear trigger masks, values and stages. */
ba7dd8bb	193	ols_configure_channels(sdi);
459a0f26 BV	194	sdi->inst_type = SR_INST_SERIAL;
459a0f26 BV	195	sdi->conn = serial;
bf256783	196
0aba65da UH	197	drvc->instances = g_slist_append(drvc->instances, sdi);
	198	devices = g_slist_append(devices, sdi);
	199
	200	serial_close(serial);
	201
	202	return devices;
	203	}
	204
03f4de8c	205	static GSList *dev_list(void)
0aba65da	206	{
0e94d524	207	return ((struct drv_context *)(di->priv))->instances;
0aba65da UH	208	}
0aba65da UH	209
eea49cf1	210	static int cleanup(void)
0aba65da	211	{
a6630742	212	return std_dev_clear(di, NULL);
0aba65da UH	213	}
0aba65da UH	214
8f996b89	215	static int config_get(int id, GVariant *data, const struct sr_dev_inst sdi,
53b4680f	216	const struct sr_channel_group *cg)
0aba65da UH	217	{
	218	struct dev_context *devc;
	219
53b4680f	220	(void)cg;
8f996b89	221
0c05591a BV	222	if (!sdi)
	223	return SR_ERR_ARG;
	224
	225	devc = sdi->priv;
035a1078	226	switch (id) {
123e1313	227	case SR_CONF_SAMPLERATE:
0c05591a BV	228	*data = g_variant_new_uint64(devc->cur_samplerate);
	229	break;
	230	case SR_CONF_CAPTURE_RATIO:
	231	*data = g_variant_new_uint64(devc->capture_ratio);
	232	break;
	233	case SR_CONF_LIMIT_SAMPLES:
	234	*data = g_variant_new_uint64(devc->limit_samples);
	235	break;
967760a8 MR	236	case SR_CONF_PATTERN_MODE:
	237	if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
	238	*data = g_variant_new_string(STR_PATTERN_EXTERNAL);
	239	else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
	240	*data = g_variant_new_string(STR_PATTERN_INTERNAL);
6d16fdfb BV	241	else
6d16fdfb BV	242	*data = g_variant_new_string(STR_PATTERN_NONE);
967760a8	243	break;
0c05591a BV	244	case SR_CONF_RLE:
0c05591a BV	245	*data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
7730e4f0	246	break;
0aba65da	247	default:
bd6fbf62	248	return SR_ERR_NA;
0aba65da UH	249	}
	250
	251	return SR_OK;
	252	}
	253
8f996b89	254	static int config_set(int id, GVariant data, const struct sr_dev_inst sdi,
53b4680f	255	const struct sr_channel_group *cg)
0aba65da UH	256	{
0aba65da UH	257	struct dev_context *devc;
6d16fdfb	258	uint16_t flag;
e46aa4f6	259	uint64_t tmp_u64;
6d16fdfb	260	int ret;
967760a8	261	const char *stropt;
0aba65da	262
53b4680f	263	(void)cg;
8f996b89	264
e73ffd42 BV	265	if (sdi->status != SR_ST_ACTIVE)
	266	return SR_ERR_DEV_CLOSED;
	267
0aba65da UH	268	devc = sdi->priv;
0aba65da UH	269
035a1078	270	switch (id) {
1953564a	271	case SR_CONF_SAMPLERATE:
e46aa4f6 BV	272	tmp_u64 = g_variant_get_uint64(data);
	273	if (tmp_u64 < samplerates[0] \|\| tmp_u64 > samplerates[1])
	274	return SR_ERR_SAMPLERATE;
	275	ret = ols_set_samplerate(sdi, g_variant_get_uint64(data));
0aba65da	276	break;
1953564a	277	case SR_CONF_LIMIT_SAMPLES:
e46aa4f6 BV	278	tmp_u64 = g_variant_get_uint64(data);
e46aa4f6 BV	279	if (tmp_u64 < MIN_NUM_SAMPLES)
0aba65da	280	return SR_ERR;
e46aa4f6	281	devc->limit_samples = tmp_u64;
0aba65da UH	282	ret = SR_OK;
0aba65da UH	283	break;
1953564a	284	case SR_CONF_CAPTURE_RATIO:
e46aa4f6	285	devc->capture_ratio = g_variant_get_uint64(data);
0aba65da UH	286	if (devc->capture_ratio < 0 \|\| devc->capture_ratio > 100) {
	287	devc->capture_ratio = 0;
	288	ret = SR_ERR;
	289	} else
	290	ret = SR_OK;
	291	break;
eb1b610b MR	292	case SR_CONF_EXTERNAL_CLOCK:
	293	if (g_variant_get_boolean(data)) {
	294	sr_info("Enabling external clock.");
	295	devc->flag_reg \|= FLAG_CLOCK_EXTERNAL;
	296	} else {
	297	sr_info("Disabled external clock.");
	298	devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
	299	}
	300	ret = SR_OK;
	301	break;
967760a8 MR	302	case SR_CONF_PATTERN_MODE:
	303	stropt = g_variant_get_string(data, NULL);
	304	ret = SR_OK;
6d16fdfb BV	305	flag = 0xffff;
	306	if (!strcmp(stropt, STR_PATTERN_NONE)) {
	307	sr_info("Disabling test modes.");
	308	flag = 0x0000;
	309	}else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
967760a8	310	sr_info("Enabling internal test mode.");
6d16fdfb	311	flag = FLAG_INTERNAL_TEST_MODE;
967760a8 MR	312	} else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
967760a8 MR	313	sr_info("Enabling external test mode.");
6d16fdfb	314	flag = FLAG_EXTERNAL_TEST_MODE;
967760a8 MR	315	} else {
	316	ret = SR_ERR;
	317	}
6d16fdfb BV	318	if (flag != 0xffff) {
	319	devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE \| FLAG_EXTERNAL_TEST_MODE);
	320	devc->flag_reg \|= flag;
	321	}
967760a8	322	break;
7b0a57fd MR	323	case SR_CONF_SWAP:
	324	if (g_variant_get_boolean(data)) {
	325	sr_info("Enabling channel swapping.");
	326	devc->flag_reg \|= FLAG_SWAP_PROBES;
	327	} else {
	328	sr_info("Disabling channel swapping.");
	329	devc->flag_reg &= ~FLAG_SWAP_PROBES;
	330	}
	331	ret = SR_OK;
	332	break;
	333
1953564a	334	case SR_CONF_RLE:
e46aa4f6	335	if (g_variant_get_boolean(data)) {
0aba65da UH	336	sr_info("Enabling RLE.");
0aba65da UH	337	devc->flag_reg \|= FLAG_RLE;
aeea0572 BV	338	} else {
	339	sr_info("Disabling RLE.");
	340	devc->flag_reg &= ~FLAG_RLE;
0aba65da UH	341	}
	342	ret = SR_OK;
	343	break;
	344	default:
bd6fbf62	345	ret = SR_ERR_NA;
0aba65da UH	346	}
	347
	348	return ret;
	349	}
	350
8f996b89	351	static int config_list(int key, GVariant *data, const struct sr_dev_inst sdi,
53b4680f	352	const struct sr_channel_group *cg)
a1c743fc	353	{
f0de2dd0 BV	354	struct dev_context *devc;
f0de2dd0 BV	355	GVariant gvar, grange[2];
e46aa4f6	356	GVariantBuilder gvb;
f0de2dd0	357	int num_channels, i;
a1c743fc	358
53b4680f	359	(void)cg;
a1c743fc BV	360
a1c743fc BV	361	switch (key) {
0d485e30	362	case SR_CONF_SCAN_OPTIONS:
e46aa4f6 BV	363	*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
e46aa4f6 BV	364	hwopts, ARRAY_SIZE(hwopts), sizeof(int32_t));
0d485e30	365	break;
9a6517d1	366	case SR_CONF_DEVICE_OPTIONS:
e46aa4f6 BV	367	*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
e46aa4f6 BV	368	hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
9a6517d1	369	break;
a1c743fc	370	case SR_CONF_SAMPLERATE:
e46aa4f6 BV	371	g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
	372	gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
	373	ARRAY_SIZE(samplerates), sizeof(uint64_t));
	374	g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
	375	*data = g_variant_builder_end(&gvb);
a1c743fc	376	break;
c50277a6	377	case SR_CONF_TRIGGER_TYPE:
e46aa4f6	378	*data = g_variant_new_string(TRIGGER_TYPE);
c50277a6	379	break;
7c07a178 UH	380	case SR_CONF_PATTERN_MODE:
	381	*data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
	382	break;
f0de2dd0 BV	383	case SR_CONF_LIMIT_SAMPLES:
	384	if (!sdi)
	385	return SR_ERR_ARG;
	386	devc = sdi->priv;
	387	if (devc->flag_reg & FLAG_RLE)
	388	return SR_ERR_NA;
	389	if (devc->max_samples == 0)
	390	/* Device didn't specify sample memory size in metadata. */
	391	return SR_ERR_NA;
	392	/*
ba7dd8bb	393	* Channel groups are turned off if no channels in that group are
f0de2dd0 BV	394	* enabled, making more room for samples for the enabled group.
f0de2dd0 BV	395	*/
ba7dd8bb	396	ols_configure_channels(sdi);
f0de2dd0 BV	397	num_channels = 0;
f0de2dd0 BV	398	for (i = 0; i < 4; i++) {
ba7dd8bb	399	if (devc->channel_mask & (0xff << (i * 8)))
f0de2dd0 BV	400	num_channels++;
	401	}
	402	grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
	403	grange[1] = g_variant_new_uint64(devc->max_samples / num_channels);
	404	*data = g_variant_new_tuple(grange, 2);
	405	break;
a1c743fc	406	default:
bd6fbf62	407	return SR_ERR_NA;
a1c743fc BV	408	}
	409
	410	return SR_OK;
	411	}
	412
016e72f3 BV	413	static int set_trigger(const struct sr_dev_inst *sdi, int stage)
	414	{
	415	struct dev_context *devc;
	416	struct sr_serial_dev_inst *serial;
	417	uint8_t cmd, arg[4];
	418
	419	devc = sdi->priv;
	420	serial = sdi->conn;
	421
	422	cmd = CMD_SET_TRIGGER_MASK + stage * 4;
	423	arg[0] = devc->trigger_mask[stage] & 0xff;
	424	arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
	425	arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
	426	arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
	427	if (send_longcommand(serial, cmd, arg) != SR_OK)
	428	return SR_ERR;
	429
	430	cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
	431	arg[0] = devc->trigger_value[stage] & 0xff;
	432	arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
	433	arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
	434	arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
	435	if (send_longcommand(serial, cmd, arg) != SR_OK)
	436	return SR_ERR;
	437
	438	cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
	439	arg[0] = arg[1] = arg[3] = 0x00;
	440	arg[2] = stage;
	441	if (stage == devc->num_stages)
	442	/* Last stage, fire when this one matches. */
	443	arg[3] \|= TRIGGER_START;
	444	if (send_longcommand(serial, cmd, arg) != SR_OK)
	445	return SR_ERR;
	446
	447	return SR_OK;
	448	}
	449
03f4de8c	450	static int dev_acquisition_start(const struct sr_dev_inst *sdi,
0aba65da UH	451	void *cb_data)
0aba65da UH	452	{
0aba65da	453	struct dev_context *devc;
459a0f26	454	struct sr_serial_dev_inst *serial;
32f09bfd	455	uint16_t samplecount, readcount, delaycount;
016e72f3	456	uint8_t changrp_mask, arg[4];
0aba65da	457	int num_channels;
016e72f3	458	int ret, i;
0aba65da	459
e73ffd42 BV	460	if (sdi->status != SR_ST_ACTIVE)
	461	return SR_ERR_DEV_CLOSED;
	462
0aba65da	463	devc = sdi->priv;
459a0f26	464	serial = sdi->conn;
0aba65da	465
ba7dd8bb UH	466	if (ols_configure_channels(sdi) != SR_OK) {
ba7dd8bb UH	467	sr_err("Failed to configure channels.");
0aba65da UH	468	return SR_ERR;
	469	}
	470
	471	/*
	472	* Enable/disable channel groups in the flag register according to the
ba7dd8bb	473	* channel mask. Calculate this here, because num_channels is needed
0aba65da UH	474	* to limit readcount.
	475	*/
	476	changrp_mask = 0;
	477	num_channels = 0;
	478	for (i = 0; i < 4; i++) {
ba7dd8bb	479	if (devc->channel_mask & (0xff << (i * 8))) {
0aba65da UH	480	changrp_mask \|= (1 << i);
	481	num_channels++;
	482	}
	483	}
	484
	485	/*
	486	* Limit readcount to prevent reading past the end of the hardware
	487	* buffer.
	488	*/
32f09bfd BV	489	samplecount = MIN(devc->max_samples / num_channels, devc->limit_samples);
32f09bfd BV	490	readcount = samplecount / 4;
016e72f3 BV	491
	492	/* Rather read too many samples than too few. */
	493	if (samplecount % 4 != 0)
32f09bfd	494	readcount++;
0aba65da	495
016e72f3 BV	496	/* Basic triggers. */
016e72f3 BV	497	if (devc->trigger_mask[0] != 0x00000000) {
ba7dd8bb	498	/* At least one channel has a trigger on it. */
0aba65da UH	499	delaycount = readcount * (1 - devc->capture_ratio / 100.0);
0aba65da UH	500	devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
016e72f3 BV	501	for (i = 0; i <= devc->num_stages; i++) {
	502	sr_dbg("Setting stage %d trigger.", i);
	503	if ((ret = set_trigger(sdi, i)) != SR_OK)
	504	return ret;
	505	}
0aba65da	506	} else {
016e72f3 BV	507	/* No triggers configured, force trigger on first stage. */
	508	sr_dbg("Forcing trigger at stage 0.");
	509	if ((ret = set_trigger(sdi, 0)) != SR_OK)
	510	return ret;
0aba65da UH	511	delaycount = readcount;
	512	}
	513
6d16fdfb	514	/* Samplerate. */
016e72f3	515	sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
6d16fdfb	516	devc->cur_samplerate, devc->cur_samplerate_divider);
016e72f3 BV	517	arg[0] = devc->cur_samplerate_divider & 0xff;
	518	arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
	519	arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
	520	arg[3] = 0x00;
	521	if (send_longcommand(serial, CMD_SET_DIVIDER, arg) != SR_OK)
0aba65da UH	522	return SR_ERR;
	523
	524	/* Send sample limit and pre/post-trigger capture ratio. */
016e72f3	525	sr_dbg("Setting sample limit %d, trigger point at %d",
6d16fdfb	526	(readcount - 1) * 4, (delaycount - 1) * 4);
016e72f3 BV	527	arg[0] = ((readcount - 1) & 0xff);
	528	arg[1] = ((readcount - 1) & 0xff00) >> 8;
	529	arg[2] = ((delaycount - 1) & 0xff);
	530	arg[3] = ((delaycount - 1) & 0xff00) >> 8;
	531	if (send_longcommand(serial, CMD_CAPTURE_SIZE, arg) != SR_OK)
0aba65da UH	532	return SR_ERR;
0aba65da UH	533
6d16fdfb	534	/* Flag register. */
625763e2 BV	535	sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
625763e2 BV	536	devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
6d16fdfb	537	devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
625763e2 BV	538	devc->flag_reg & FLAG_RLE ? "on" : "off",
	539	devc->flag_reg & FLAG_FILTER ? "on": "off",
	540	devc->flag_reg & FLAG_DEMUX ? "on" : "off");
6d16fdfb	541	/* 1 means "disable channel". */
0aba65da	542	devc->flag_reg \|= ~(changrp_mask << 2) & 0x3c;
016e72f3 BV	543	arg[0] = devc->flag_reg & 0xff;
	544	arg[1] = devc->flag_reg >> 8;
	545	arg[2] = arg[3] = 0x00;
	546	if (send_longcommand(serial, CMD_SET_FLAGS, arg) != SR_OK)
0aba65da UH	547	return SR_ERR;
	548
	549	/* Start acquisition on the device. */
459a0f26	550	if (send_shortcommand(serial, CMD_RUN) != SR_OK)
0aba65da UH	551	return SR_ERR;
0aba65da UH	552
bf256783	553	/* Reset all operational states. */
6d16fdfb BV	554	devc->rle_count = devc->num_transfers = 0;
6d16fdfb BV	555	devc->num_samples = devc->num_bytes = 0;
625763e2	556	devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
abb39e6b	557	memset(devc->sample, 0, 4);
bf256783	558
4afdfd46	559	/* Send header packet to the session bus. */
29a27196	560	std_session_send_df_header(cb_data, LOG_PREFIX);
4afdfd46	561
abc4b335	562	serial_source_add(serial, G_IO_IN, -1, ols_receive_data, cb_data);
0aba65da	563
0aba65da UH	564	return SR_OK;
	565	}
	566
03f4de8c	567	static int dev_acquisition_stop(struct sr_dev_inst sdi, void cb_data)
0aba65da	568	{
0aba65da UH	569	(void)cb_data;
	570
	571	abort_acquisition(sdi);
	572
	573	return SR_OK;
	574	}
	575
	576	SR_PRIV struct sr_dev_driver ols_driver_info = {
	577	.name = "ols",
	578	.longname = "Openbench Logic Sniffer",
	579	.api_version = 1,
03f4de8c	580	.init = init,
eea49cf1	581	.cleanup = cleanup,
03f4de8c BV	582	.scan = scan,
03f4de8c BV	583	.dev_list = dev_list,
a6630742	584	.dev_clear = NULL,
035a1078 BV	585	.config_get = config_get,
035a1078 BV	586	.config_set = config_set,
a1c743fc	587	.config_list = config_list,
854434de	588	.dev_open = std_serial_dev_open,
bf2c987f	589	.dev_close = std_serial_dev_close,
03f4de8c BV	590	.dev_acquisition_start = dev_acquisition_start,
03f4de8c BV	591	.dev_acquisition_stop = dev_acquisition_stop,
0aba65da UH	592	.priv = NULL,
0aba65da UH	593	};