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Commit | Line | Data |
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01cf8814 DR |
1 | /* |
2 | * This file is part of the sigrok project. | |
3 | * | |
4 | * Copyright (C) 2011 Daniel Ribeiro <drwyrm@gmail.com> | |
a2936073 | 5 | * Copyright (C) 2012 Renato Caldas <rmsc@fe.up.pt> |
01cf8814 DR |
6 | * |
7 | * This program is free software: you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation, either version 3 of the License, or | |
10 | * (at your option) any later version. | |
8a839354 UH |
11 | * |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
01cf8814 DR |
19 | */ |
20 | ||
21 | #include <stdio.h> | |
22 | #include <stdlib.h> | |
23 | #include <string.h> | |
24 | #include <unistd.h> | |
25 | #include <fcntl.h> | |
26 | #include <sys/time.h> | |
27 | #include <inttypes.h> | |
28 | #include <glib.h> | |
29 | #include <libudev.h> | |
01cf8814 | 30 | #include <arpa/inet.h> |
b7f09cf8 UH |
31 | #include "sigrok.h" |
32 | #include "sigrok-internal.h" | |
01cf8814 DR |
33 | #include "link-mso19.h" |
34 | ||
35 | #define USB_VENDOR "3195" | |
36 | #define USB_PRODUCT "f190" | |
37 | ||
464d12c7 KS |
38 | #define NUM_PROBES 8 |
39 | ||
ffedd0bf | 40 | static int hwcaps[] = { |
5a2326a7 UH |
41 | SR_HWCAP_LOGIC_ANALYZER, |
42 | // SR_HWCAP_OSCILLOSCOPE, | |
43 | // SR_HWCAP_PAT_GENERATOR, | |
01cf8814 | 44 | |
5a2326a7 UH |
45 | SR_HWCAP_SAMPLERATE, |
46 | // SR_HWCAP_CAPTURE_RATIO, | |
47 | SR_HWCAP_LIMIT_SAMPLES, | |
01cf8814 DR |
48 | 0, |
49 | }; | |
50 | ||
464d12c7 KS |
51 | static const char *probe_names[NUM_PROBES + 1] = { |
52 | "0", | |
53 | "1", | |
54 | "2", | |
55 | "3", | |
56 | "4", | |
57 | "5", | |
58 | "6", | |
59 | "7", | |
60 | NULL, | |
61 | }; | |
62 | ||
01cf8814 | 63 | static uint64_t supported_samplerates[] = { |
c9140419 UH |
64 | SR_HZ(100), |
65 | SR_HZ(200), | |
66 | SR_HZ(500), | |
59df0c77 UH |
67 | SR_KHZ(1), |
68 | SR_KHZ(2), | |
69 | SR_KHZ(5), | |
70 | SR_KHZ(10), | |
71 | SR_KHZ(20), | |
72 | SR_KHZ(50), | |
73 | SR_KHZ(100), | |
74 | SR_KHZ(200), | |
75 | SR_KHZ(500), | |
76 | SR_MHZ(1), | |
77 | SR_MHZ(2), | |
78 | SR_MHZ(5), | |
79 | SR_MHZ(10), | |
80 | SR_MHZ(20), | |
81 | SR_MHZ(50), | |
82 | SR_MHZ(100), | |
83 | SR_MHZ(200), | |
84 | 0, | |
01cf8814 DR |
85 | }; |
86 | ||
60679b18 | 87 | static struct sr_samplerates samplerates = { |
c9140419 | 88 | SR_HZ(100), |
59df0c77 | 89 | SR_MHZ(200), |
c9140419 | 90 | SR_HZ(0), |
59df0c77 | 91 | supported_samplerates, |
01cf8814 DR |
92 | }; |
93 | ||
d68e2d1a | 94 | static GSList *dev_insts = NULL; |
01cf8814 | 95 | |
d68e2d1a UH |
96 | static int mso_send_control_message(struct sr_dev_inst *sdi, |
97 | uint16_t payload[], int n) | |
01cf8814 DR |
98 | { |
99 | int fd = sdi->serial->fd; | |
100 | int i, w, ret, s = n * 2 + sizeof(mso_head) + sizeof(mso_foot); | |
101 | char *p, *buf; | |
102 | ||
ecad043f UH |
103 | ret = SR_ERR; |
104 | ||
01cf8814 DR |
105 | if (fd < 0) |
106 | goto ret; | |
107 | ||
ecad043f UH |
108 | if (!(buf = g_try_malloc(s))) { |
109 | sr_err("mso19: %s: buf malloc failed", __func__); | |
110 | ret = SR_ERR_MALLOC; | |
01cf8814 | 111 | goto ret; |
ecad043f | 112 | } |
01cf8814 DR |
113 | |
114 | p = buf; | |
115 | memcpy(p, mso_head, sizeof(mso_head)); | |
116 | p += sizeof(mso_head); | |
117 | ||
118 | for (i = 0; i < n; i++) { | |
119 | *(uint16_t *) p = htons(payload[i]); | |
120 | p += 2; | |
121 | } | |
122 | memcpy(p, mso_foot, sizeof(mso_foot)); | |
123 | ||
124 | w = 0; | |
125 | while (w < s) { | |
2119ab03 | 126 | ret = serial_write(fd, buf + w, s - w); |
01cf8814 | 127 | if (ret < 0) { |
e46b8fb1 | 128 | ret = SR_ERR; |
01cf8814 DR |
129 | goto free; |
130 | } | |
131 | w += ret; | |
132 | } | |
e46b8fb1 | 133 | ret = SR_OK; |
01cf8814 | 134 | free: |
ecad043f | 135 | g_free(buf); |
01cf8814 DR |
136 | ret: |
137 | return ret; | |
138 | } | |
139 | ||
d68e2d1a | 140 | static int mso_reset_adc(struct sr_dev_inst *sdi) |
01cf8814 DR |
141 | { |
142 | struct mso *mso = sdi->priv; | |
143 | uint16_t ops[2]; | |
144 | ||
a8467191 RC |
145 | ops[0] = mso_trans(REG_CTL1, (mso->ctlbase1 | BIT_CTL1_RESETADC)); |
146 | ops[1] = mso_trans(REG_CTL1, mso->ctlbase1); | |
147 | mso->ctlbase1 |= BIT_CTL1_ADC_UNKNOWN4; | |
01cf8814 | 148 | |
7b48d6e1 | 149 | sr_dbg("mso19: Requesting ADC reset"); |
01cf8814 DR |
150 | return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops)); |
151 | } | |
152 | ||
d68e2d1a | 153 | static int mso_reset_fsm(struct sr_dev_inst *sdi) |
01cf8814 DR |
154 | { |
155 | struct mso *mso = sdi->priv; | |
156 | uint16_t ops[1]; | |
157 | ||
a8467191 RC |
158 | mso->ctlbase1 |= BIT_CTL1_RESETFSM; |
159 | ops[0] = mso_trans(REG_CTL1, mso->ctlbase1); | |
01cf8814 | 160 | |
7b48d6e1 | 161 | sr_dbg("mso19: Requesting ADC reset"); |
01cf8814 DR |
162 | return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops)); |
163 | } | |
164 | ||
d68e2d1a | 165 | static int mso_toggle_led(struct sr_dev_inst *sdi, int state) |
01cf8814 DR |
166 | { |
167 | struct mso *mso = sdi->priv; | |
168 | uint16_t ops[1]; | |
169 | ||
f020a997 | 170 | mso->ctlbase1 &= ~BIT_CTL1_LED; |
01cf8814 | 171 | if (state) |
a8467191 RC |
172 | mso->ctlbase1 |= BIT_CTL1_LED; |
173 | ops[0] = mso_trans(REG_CTL1, mso->ctlbase1); | |
01cf8814 | 174 | |
7b48d6e1 | 175 | sr_dbg("mso19: Requesting LED toggle"); |
01cf8814 DR |
176 | return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops)); |
177 | } | |
178 | ||
d68e2d1a | 179 | static int mso_check_trigger(struct sr_dev_inst *sdi, uint8_t *info) |
01cf8814 DR |
180 | { |
181 | uint16_t ops[] = { mso_trans(REG_TRIGGER, 0) }; | |
182 | char buf[1]; | |
183 | int ret; | |
184 | ||
7b48d6e1 | 185 | sr_dbg("mso19: Requesting trigger state"); |
01cf8814 | 186 | ret = mso_send_control_message(sdi, ARRAY_AND_SIZE(ops)); |
e46b8fb1 | 187 | if (info == NULL || ret != SR_OK) |
01cf8814 DR |
188 | return ret; |
189 | ||
190 | buf[0] = 0; | |
2119ab03 | 191 | if (serial_read(sdi->serial->fd, buf, 1) != 1) /* FIXME: Need timeout */ |
e46b8fb1 | 192 | ret = SR_ERR; |
01cf8814 DR |
193 | *info = buf[0]; |
194 | ||
7b48d6e1 | 195 | sr_dbg("mso19: Trigger state is: 0x%x", *info); |
01cf8814 DR |
196 | return ret; |
197 | } | |
198 | ||
d68e2d1a | 199 | static int mso_read_buffer(struct sr_dev_inst *sdi) |
01cf8814 DR |
200 | { |
201 | uint16_t ops[] = { mso_trans(REG_BUFFER, 0) }; | |
202 | ||
7b48d6e1 | 203 | sr_dbg("mso19: Requesting buffer dump"); |
01cf8814 DR |
204 | return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops)); |
205 | } | |
206 | ||
d68e2d1a | 207 | static int mso_arm(struct sr_dev_inst *sdi) |
01cf8814 DR |
208 | { |
209 | struct mso *mso = sdi->priv; | |
210 | uint16_t ops[] = { | |
a8467191 RC |
211 | mso_trans(REG_CTL1, mso->ctlbase1 | BIT_CTL1_RESETFSM), |
212 | mso_trans(REG_CTL1, mso->ctlbase1 | BIT_CTL1_ARM), | |
213 | mso_trans(REG_CTL1, mso->ctlbase1), | |
01cf8814 DR |
214 | }; |
215 | ||
7b48d6e1 | 216 | sr_dbg("mso19: Requesting trigger arm"); |
01cf8814 DR |
217 | return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops)); |
218 | } | |
219 | ||
d68e2d1a | 220 | static int mso_force_capture(struct sr_dev_inst *sdi) |
01cf8814 DR |
221 | { |
222 | struct mso *mso = sdi->priv; | |
223 | uint16_t ops[] = { | |
a8467191 RC |
224 | mso_trans(REG_CTL1, mso->ctlbase1 | 8), |
225 | mso_trans(REG_CTL1, mso->ctlbase1), | |
01cf8814 DR |
226 | }; |
227 | ||
7b48d6e1 | 228 | sr_dbg("mso19: Requesting forced capture"); |
01cf8814 DR |
229 | return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops)); |
230 | } | |
231 | ||
d68e2d1a | 232 | static int mso_dac_out(struct sr_dev_inst *sdi, uint16_t val) |
01cf8814 DR |
233 | { |
234 | struct mso *mso = sdi->priv; | |
235 | uint16_t ops[] = { | |
236 | mso_trans(REG_DAC1, (val >> 8) & 0xff), | |
237 | mso_trans(REG_DAC2, val & 0xff), | |
a8467191 | 238 | mso_trans(REG_CTL1, mso->ctlbase1 | BIT_CTL1_RESETADC), |
01cf8814 DR |
239 | }; |
240 | ||
7b48d6e1 | 241 | sr_dbg("mso19: Setting dac word to 0x%x", val); |
01cf8814 DR |
242 | return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops)); |
243 | } | |
244 | ||
d68e2d1a | 245 | static int mso_clkrate_out(struct sr_dev_inst *sdi, uint16_t val) |
01cf8814 DR |
246 | { |
247 | uint16_t ops[] = { | |
248 | mso_trans(REG_CLKRATE1, (val >> 8) & 0xff), | |
249 | mso_trans(REG_CLKRATE2, val & 0xff), | |
250 | }; | |
251 | ||
7b48d6e1 | 252 | sr_dbg("mso19: Setting clkrate word to 0x%x", val); |
01cf8814 DR |
253 | return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops)); |
254 | } | |
255 | ||
d68e2d1a | 256 | static int mso_configure_rate(struct sr_dev_inst *sdi, uint32_t rate) |
01cf8814 DR |
257 | { |
258 | struct mso *mso = sdi->priv; | |
259 | unsigned int i; | |
e46b8fb1 | 260 | int ret = SR_ERR; |
01cf8814 DR |
261 | |
262 | for (i = 0; i < ARRAY_SIZE(rate_map); i++) { | |
263 | if (rate_map[i].rate == rate) { | |
a8467191 | 264 | mso->ctlbase2 = rate_map[i].slowmode; |
01cf8814 | 265 | ret = mso_clkrate_out(sdi, rate_map[i].val); |
e46b8fb1 | 266 | if (ret == SR_OK) |
01cf8814 DR |
267 | mso->cur_rate = rate; |
268 | return ret; | |
269 | } | |
270 | } | |
271 | return ret; | |
272 | } | |
273 | ||
01cf8814 DR |
274 | static inline uint16_t mso_calc_raw_from_mv(struct mso *mso) |
275 | { | |
276 | return (uint16_t) (0x200 - | |
277 | ((mso->dso_trigger_voltage / mso->dso_probe_attn) / | |
278 | mso->vbit)); | |
279 | } | |
280 | ||
d68e2d1a | 281 | static int mso_configure_trigger(struct sr_dev_inst *sdi) |
01cf8814 DR |
282 | { |
283 | struct mso *mso = sdi->priv; | |
284 | uint16_t ops[16]; | |
285 | uint16_t dso_trigger = mso_calc_raw_from_mv(mso); | |
286 | ||
287 | dso_trigger &= 0x3ff; | |
288 | if ((!mso->trigger_slope && mso->trigger_chan == 1) || | |
289 | (mso->trigger_slope && | |
290 | (mso->trigger_chan == 0 || | |
291 | mso->trigger_chan == 2 || | |
292 | mso->trigger_chan == 3))) | |
293 | dso_trigger |= 0x400; | |
294 | ||
295 | switch (mso->trigger_chan) { | |
296 | case 1: | |
297 | dso_trigger |= 0xe000; | |
298 | case 2: | |
299 | dso_trigger |= 0x4000; | |
300 | break; | |
301 | case 3: | |
302 | dso_trigger |= 0x2000; | |
303 | break; | |
304 | case 4: | |
305 | dso_trigger |= 0xa000; | |
306 | break; | |
307 | case 5: | |
308 | dso_trigger |= 0x8000; | |
309 | break; | |
310 | default: | |
311 | case 0: | |
312 | break; | |
313 | } | |
314 | ||
315 | switch (mso->trigger_outsrc) { | |
316 | case 1: | |
317 | dso_trigger |= 0x800; | |
318 | break; | |
319 | case 2: | |
320 | dso_trigger |= 0x1000; | |
321 | break; | |
322 | case 3: | |
323 | dso_trigger |= 0x1800; | |
324 | break; | |
325 | ||
326 | } | |
327 | ||
328 | ops[0] = mso_trans(5, mso->la_trigger); | |
329 | ops[1] = mso_trans(6, mso->la_trigger_mask); | |
330 | ops[2] = mso_trans(3, dso_trigger & 0xff); | |
331 | ops[3] = mso_trans(4, (dso_trigger >> 8) & 0xff); | |
332 | ops[4] = mso_trans(11, | |
59df0c77 | 333 | mso->dso_trigger_width / SR_HZ_TO_NS(mso->cur_rate)); |
01cf8814 | 334 | |
a2936073 RC |
335 | /* Select the SPI/I2C trigger config bank */ |
336 | ops[5] = mso_trans(REG_CTL2, (mso->ctlbase2 | BITS_CTL2_BANK(2))); | |
337 | /* Configure the SPI/I2C protocol trigger */ | |
338 | ops[6] = mso_trans(REG_PT_WORD(0), mso->protocol_trigger.word[0]); | |
339 | ops[7] = mso_trans(REG_PT_WORD(1), mso->protocol_trigger.word[1]); | |
340 | ops[8] = mso_trans(REG_PT_WORD(2), mso->protocol_trigger.word[2]); | |
341 | ops[9] = mso_trans(REG_PT_WORD(3), mso->protocol_trigger.word[3]); | |
342 | ops[10] = mso_trans(REG_PT_MASK(0), mso->protocol_trigger.mask[0]); | |
343 | ops[11] = mso_trans(REG_PT_MASK(1), mso->protocol_trigger.mask[1]); | |
344 | ops[12] = mso_trans(REG_PT_MASK(2), mso->protocol_trigger.mask[2]); | |
345 | ops[13] = mso_trans(REG_PT_MASK(3), mso->protocol_trigger.mask[3]); | |
346 | ops[14] = mso_trans(REG_PT_SPIMODE, mso->protocol_trigger.spimode); | |
347 | /* Select the default config bank */ | |
a8467191 | 348 | ops[15] = mso_trans(REG_CTL2, mso->ctlbase2); |
01cf8814 DR |
349 | |
350 | return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops)); | |
351 | } | |
352 | ||
d68e2d1a | 353 | static int mso_configure_threshold_level(struct sr_dev_inst *sdi) |
01cf8814 DR |
354 | { |
355 | struct mso *mso = sdi->priv; | |
356 | ||
357 | return mso_dac_out(sdi, la_threshold_map[mso->la_threshold]); | |
358 | } | |
359 | ||
360 | static int mso_parse_serial(const char *iSerial, const char *iProduct, | |
d68e2d1a | 361 | struct mso *mso) |
01cf8814 DR |
362 | { |
363 | unsigned int u1, u2, u3, u4, u5, u6; | |
364 | ||
365 | iProduct = iProduct; | |
366 | /* FIXME: This code is in the original app, but I think its | |
367 | * used only for the GUI */ | |
368 | /* if (strstr(iProduct, "REV_02") || strstr(iProduct, "REV_03")) | |
369 | mso->num_sample_rates = 0x16; | |
370 | else | |
371 | mso->num_sample_rates = 0x10; */ | |
372 | ||
373 | /* parse iSerial */ | |
374 | if (iSerial[0] != '4' || sscanf(iSerial, "%5u%3u%3u%1u%1u%6u", | |
375 | &u1, &u2, &u3, &u4, &u5, &u6) != 6) | |
e46b8fb1 | 376 | return SR_ERR; |
01cf8814 DR |
377 | mso->hwmodel = u4; |
378 | mso->hwrev = u5; | |
379 | mso->serial = u6; | |
380 | mso->vbit = u1 / 10000; | |
381 | if (mso->vbit == 0) | |
382 | mso->vbit = 4.19195; | |
383 | mso->dac_offset = u2; | |
384 | if (mso->dac_offset == 0) | |
385 | mso->dac_offset = 0x1ff; | |
386 | mso->offset_range = u3; | |
387 | if (mso->offset_range == 0) | |
388 | mso->offset_range = 0x17d; | |
389 | ||
390 | /* | |
391 | * FIXME: There is more code on the original software to handle | |
392 | * bigger iSerial strings, but as I can't test on my device | |
393 | * I will not implement it yet | |
394 | */ | |
395 | ||
e46b8fb1 | 396 | return SR_OK; |
01cf8814 DR |
397 | } |
398 | ||
bb7ef793 | 399 | static int hw_init(const char *devinfo) |
01cf8814 | 400 | { |
d68e2d1a | 401 | struct sr_dev_inst *sdi; |
01cf8814 DR |
402 | int devcnt = 0; |
403 | struct udev *udev; | |
404 | struct udev_enumerate *enumerate; | |
bb7ef793 | 405 | struct udev_list_entry *devs, *dev_list_entry; |
01cf8814 DR |
406 | struct mso *mso; |
407 | ||
bb7ef793 | 408 | devinfo = devinfo; |
01cf8814 DR |
409 | |
410 | /* It's easier to map usb<->serial using udev */ | |
411 | /* | |
412 | * FIXME: On windows we can get the same information from the | |
413 | * registry, add an #ifdef here later | |
414 | */ | |
415 | udev = udev_new(); | |
416 | if (!udev) { | |
7b48d6e1 | 417 | sr_err("mso19: Failed to initialize udev."); |
01cf8814 DR |
418 | goto ret; |
419 | } | |
420 | enumerate = udev_enumerate_new(udev); | |
421 | udev_enumerate_add_match_subsystem(enumerate, "usb-serial"); | |
422 | udev_enumerate_scan_devices(enumerate); | |
bb7ef793 UH |
423 | devs = udev_enumerate_get_list_entry(enumerate); |
424 | udev_list_entry_foreach(dev_list_entry, devs) { | |
01cf8814 DR |
425 | const char *syspath, *sysname, *idVendor, *idProduct, |
426 | *iSerial, *iProduct; | |
427 | char path[32], manufacturer[32], product[32], hwrev[32]; | |
428 | struct udev_device *dev, *parent; | |
429 | size_t s; | |
430 | ||
431 | syspath = udev_list_entry_get_name(dev_list_entry); | |
432 | dev = udev_device_new_from_syspath(udev, syspath); | |
433 | sysname = udev_device_get_sysname(dev); | |
434 | parent = udev_device_get_parent_with_subsystem_devtype( | |
435 | dev, "usb", "usb_device"); | |
436 | if (!parent) { | |
7b48d6e1 | 437 | sr_err("mso19: Unable to find parent usb device for %s", |
133a37bf | 438 | sysname); |
01cf8814 DR |
439 | continue; |
440 | } | |
441 | ||
442 | idVendor = udev_device_get_sysattr_value(parent, "idVendor"); | |
443 | idProduct = udev_device_get_sysattr_value(parent, "idProduct"); | |
444 | if (strcmp(USB_VENDOR, idVendor) | |
445 | || strcmp(USB_PRODUCT, idProduct)) | |
446 | continue; | |
447 | ||
448 | iSerial = udev_device_get_sysattr_value(parent, "serial"); | |
449 | iProduct = udev_device_get_sysattr_value(parent, "product"); | |
450 | ||
451 | snprintf(path, sizeof(path), "/dev/%s", sysname); | |
452 | ||
453 | s = strcspn(iProduct, " "); | |
454 | if (s > sizeof(product) || | |
455 | strlen(iProduct) - s > sizeof(manufacturer)) { | |
7b48d6e1 | 456 | sr_err("mso19: Could not parse iProduct: %s", iProduct); |
01cf8814 DR |
457 | continue; |
458 | } | |
459 | strncpy(product, iProduct, s); | |
460 | product[s] = 0; | |
461 | strcpy(manufacturer, iProduct + s); | |
01cf8814 | 462 | |
ecad043f UH |
463 | if (!(mso = g_try_malloc0(sizeof(struct mso)))) { |
464 | sr_err("mso19: %s: mso malloc failed", __func__); | |
465 | continue; /* TODO: Errors handled correctly? */ | |
466 | } | |
01cf8814 | 467 | |
e46b8fb1 | 468 | if (mso_parse_serial(iSerial, iProduct, mso) != SR_OK) { |
7b48d6e1 | 469 | sr_err("mso19: Invalid iSerial: %s", iSerial); |
01cf8814 DR |
470 | goto err_free_mso; |
471 | } | |
d88b9393 | 472 | sprintf(hwrev, "r%d", mso->hwrev); |
a2936073 | 473 | |
01cf8814 | 474 | /* hardware initial state */ |
a8467191 | 475 | mso->ctlbase1 = 0; |
a2936073 RC |
476 | { |
477 | /* Initialize the protocol trigger configuration */ | |
478 | int i; | |
7b48d6e1 | 479 | for (i = 0; i < 4; i++) { |
a2936073 RC |
480 | mso->protocol_trigger.word[i] = 0; |
481 | mso->protocol_trigger.mask[i] = 0xff; | |
482 | } | |
483 | mso->protocol_trigger.spimode = 0; | |
484 | } | |
01cf8814 | 485 | |
d3683c42 | 486 | sdi = sr_dev_inst_new(devcnt, SR_ST_INITIALIZING, |
7b48d6e1 | 487 | manufacturer, product, hwrev); |
01cf8814 | 488 | if (!sdi) { |
7b48d6e1 | 489 | sr_err("mso19: Unable to create device instance for %s", |
133a37bf | 490 | sysname); |
01cf8814 DR |
491 | goto err_free_mso; |
492 | } | |
493 | ||
494 | /* save a pointer to our private instance data */ | |
495 | sdi->priv = mso; | |
496 | ||
d3683c42 | 497 | sdi->serial = sr_serial_dev_inst_new(path, -1); |
01cf8814 | 498 | if (!sdi->serial) |
d68e2d1a | 499 | goto err_dev_inst_free; |
01cf8814 | 500 | |
d68e2d1a | 501 | dev_insts = g_slist_append(dev_insts, sdi); |
01cf8814 DR |
502 | devcnt++; |
503 | continue; | |
504 | ||
d68e2d1a | 505 | err_dev_inst_free: |
d3683c42 | 506 | sr_dev_inst_free(sdi); |
01cf8814 | 507 | err_free_mso: |
133a37bf | 508 | g_free(mso); |
01cf8814 DR |
509 | } |
510 | ||
511 | udev_enumerate_unref(enumerate); | |
512 | udev_unref(udev); | |
513 | ||
514 | ret: | |
515 | return devcnt; | |
516 | } | |
517 | ||
57ab7d9f | 518 | static int hw_cleanup(void) |
01cf8814 DR |
519 | { |
520 | GSList *l; | |
d68e2d1a | 521 | struct sr_dev_inst *sdi; |
341ce415 | 522 | int ret; |
01cf8814 | 523 | |
341ce415 | 524 | ret = SR_OK; |
01cf8814 | 525 | /* Properly close all devices. */ |
d68e2d1a | 526 | for (l = dev_insts; l; l = l->next) { |
57ab7d9f UH |
527 | if (!(sdi = l->data)) { |
528 | /* Log error, but continue cleaning up the rest. */ | |
529 | sr_err("mso19: %s: sdi was NULL, continuing", __func__); | |
530 | ret = SR_ERR_BUG; | |
531 | continue; | |
532 | } | |
01cf8814 DR |
533 | if (sdi->serial->fd != -1) |
534 | serial_close(sdi->serial->fd); | |
d3683c42 | 535 | sr_dev_inst_free(sdi); |
01cf8814 | 536 | } |
d68e2d1a UH |
537 | g_slist_free(dev_insts); |
538 | dev_insts = NULL; | |
57ab7d9f | 539 | |
341ce415 | 540 | return ret; |
01cf8814 DR |
541 | } |
542 | ||
bb7ef793 | 543 | static int hw_opendev(int dev_index) |
01cf8814 | 544 | { |
d68e2d1a | 545 | struct sr_dev_inst *sdi; |
01cf8814 | 546 | struct mso *mso; |
e46b8fb1 | 547 | int ret = SR_ERR; |
01cf8814 | 548 | |
bb7ef793 | 549 | if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) |
01cf8814 DR |
550 | return ret; |
551 | ||
552 | mso = sdi->priv; | |
553 | sdi->serial->fd = serial_open(sdi->serial->port, O_RDWR); | |
554 | if (sdi->serial->fd == -1) | |
555 | return ret; | |
556 | ||
557 | ret = serial_set_params(sdi->serial->fd, 460800, 8, 0, 1, 2); | |
e46b8fb1 | 558 | if (ret != SR_OK) |
01cf8814 DR |
559 | return ret; |
560 | ||
5a2326a7 | 561 | sdi->status = SR_ST_ACTIVE; |
01cf8814 DR |
562 | |
563 | /* FIXME: discard serial buffer */ | |
564 | ||
565 | mso_check_trigger(sdi, &mso->trigger_state); | |
7b48d6e1 | 566 | sr_dbg("mso19: trigger state: 0x%x", mso->trigger_state); |
01cf8814 DR |
567 | |
568 | ret = mso_reset_adc(sdi); | |
e46b8fb1 | 569 | if (ret != SR_OK) |
01cf8814 DR |
570 | return ret; |
571 | ||
572 | mso_check_trigger(sdi, &mso->trigger_state); | |
7b48d6e1 | 573 | sr_dbg("mso19: trigger state: 0x%x", mso->trigger_state); |
01cf8814 DR |
574 | |
575 | // ret = mso_reset_fsm(sdi); | |
e46b8fb1 | 576 | // if (ret != SR_OK) |
01cf8814 DR |
577 | // return ret; |
578 | ||
7b48d6e1 | 579 | sr_dbg("mso19: Finished %s", __func__); |
357285a9 | 580 | |
e46b8fb1 UH |
581 | // return SR_ERR; |
582 | return SR_OK; | |
01cf8814 DR |
583 | } |
584 | ||
bb7ef793 | 585 | static int hw_closedev(int dev_index) |
01cf8814 | 586 | { |
d68e2d1a | 587 | struct sr_dev_inst *sdi; |
01cf8814 | 588 | |
bb7ef793 | 589 | if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) { |
697785d1 UH |
590 | sr_err("mso19: %s: sdi was NULL", __func__); |
591 | return SR_ERR; /* TODO: SR_ERR_ARG? */ | |
592 | } | |
01cf8814 | 593 | |
697785d1 | 594 | /* TODO */ |
01cf8814 DR |
595 | if (sdi->serial->fd != -1) { |
596 | serial_close(sdi->serial->fd); | |
597 | sdi->serial->fd = -1; | |
5a2326a7 | 598 | sdi->status = SR_ST_INACTIVE; |
01cf8814 | 599 | } |
697785d1 | 600 | |
7b48d6e1 | 601 | sr_dbg("mso19: finished %s", __func__); |
697785d1 | 602 | return SR_OK; |
01cf8814 DR |
603 | } |
604 | ||
5097b0d0 | 605 | static void *hw_dev_info_get(int dev_index, int dev_info_id) |
01cf8814 | 606 | { |
d68e2d1a | 607 | struct sr_dev_inst *sdi; |
01cf8814 DR |
608 | struct mso *mso; |
609 | void *info = NULL; | |
610 | ||
bb7ef793 | 611 | if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) |
01cf8814 DR |
612 | return NULL; |
613 | mso = sdi->priv; | |
614 | ||
bb7ef793 | 615 | switch (dev_info_id) { |
1d9a8a5f | 616 | case SR_DI_INST: |
01cf8814 DR |
617 | info = sdi; |
618 | break; | |
5a2326a7 | 619 | case SR_DI_NUM_PROBES: /* FIXME: How to report analog probe? */ |
464d12c7 KS |
620 | info = GINT_TO_POINTER(NUM_PROBES); |
621 | break; | |
622 | case SR_DI_PROBE_NAMES: | |
623 | info = probe_names; | |
01cf8814 | 624 | break; |
5a2326a7 | 625 | case SR_DI_SAMPLERATES: |
01cf8814 DR |
626 | info = &samplerates; |
627 | break; | |
5a2326a7 | 628 | case SR_DI_TRIGGER_TYPES: |
01cf8814 DR |
629 | info = "01"; /* FIXME */ |
630 | break; | |
5a2326a7 | 631 | case SR_DI_CUR_SAMPLERATE: |
01cf8814 DR |
632 | info = &mso->cur_rate; |
633 | break; | |
634 | } | |
635 | return info; | |
636 | } | |
637 | ||
bb7ef793 | 638 | static int hw_get_status(int dev_index) |
01cf8814 | 639 | { |
d68e2d1a | 640 | struct sr_dev_inst *sdi; |
01cf8814 | 641 | |
bb7ef793 | 642 | if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) |
5a2326a7 | 643 | return SR_ST_NOT_FOUND; |
01cf8814 DR |
644 | |
645 | return sdi->status; | |
646 | } | |
647 | ||
ffedd0bf | 648 | static int *hw_hwcap_get_all(void) |
01cf8814 | 649 | { |
ffedd0bf | 650 | return hwcaps; |
01cf8814 DR |
651 | } |
652 | ||
a7d05fcb | 653 | static int hw_config_set(int dev_index, int hwcap, void *value) |
01cf8814 | 654 | { |
d68e2d1a | 655 | struct sr_dev_inst *sdi; |
01cf8814 | 656 | |
bb7ef793 | 657 | if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) |
e46b8fb1 | 658 | return SR_ERR; |
01cf8814 | 659 | |
ffedd0bf | 660 | switch (hwcap) { |
5a2326a7 | 661 | case SR_HWCAP_SAMPLERATE: |
01cf8814 | 662 | return mso_configure_rate(sdi, *(uint64_t *) value); |
5a2326a7 UH |
663 | case SR_HWCAP_PROBECONFIG: |
664 | case SR_HWCAP_LIMIT_SAMPLES: | |
01cf8814 | 665 | default: |
e46b8fb1 | 666 | return SR_OK; /* FIXME */ |
01cf8814 | 667 | } |
01cf8814 DR |
668 | } |
669 | ||
670 | #define MSO_TRIGGER_UNKNOWN '!' | |
671 | #define MSO_TRIGGER_UNKNOWN1 '1' | |
672 | #define MSO_TRIGGER_UNKNOWN2 '2' | |
673 | #define MSO_TRIGGER_UNKNOWN3 '3' | |
674 | #define MSO_TRIGGER_WAIT '4' | |
675 | #define MSO_TRIGGER_FIRED '5' | |
676 | #define MSO_TRIGGER_DATAREADY '6' | |
677 | ||
678 | /* FIXME: Pass errors? */ | |
679 | static int receive_data(int fd, int revents, void *user_data) | |
680 | { | |
d68e2d1a | 681 | struct sr_dev_inst *sdi = user_data; |
01cf8814 | 682 | struct mso *mso = sdi->priv; |
b9c735a2 | 683 | struct sr_datafeed_packet packet; |
e42ef08d | 684 | struct sr_datafeed_logic logic; |
01cf8814 DR |
685 | uint8_t in[1024], logic_out[1024]; |
686 | double analog_out[1024]; | |
687 | size_t i, s; | |
688 | ||
689 | revents = revents; | |
690 | ||
2119ab03 | 691 | s = serial_read(fd, in, sizeof(in)); |
01cf8814 DR |
692 | if (s <= 0) |
693 | return FALSE; | |
694 | ||
695 | /* No samples */ | |
696 | if (mso->trigger_state != MSO_TRIGGER_DATAREADY) { | |
697 | mso->trigger_state = in[0]; | |
698 | if (mso->trigger_state == MSO_TRIGGER_DATAREADY) { | |
699 | mso_read_buffer(sdi); | |
700 | mso->buffer_n = 0; | |
701 | } else { | |
702 | mso_check_trigger(sdi, NULL); | |
703 | } | |
704 | return FALSE; | |
705 | } | |
706 | ||
707 | /* the hardware always dumps 1024 samples, 24bits each */ | |
708 | if (mso->buffer_n < 3072) { | |
709 | memcpy(mso->buffer + mso->buffer_n, in, s); | |
710 | mso->buffer_n += s; | |
711 | } | |
712 | if (mso->buffer_n < 3072) | |
713 | return FALSE; | |
714 | ||
715 | /* do the conversion */ | |
716 | for (i = 0; i < 1024; i++) { | |
717 | /* FIXME: Need to do conversion to mV */ | |
718 | analog_out[i] = (mso->buffer[i * 3] & 0x3f) | | |
719 | ((mso->buffer[i * 3 + 1] & 0xf) << 6); | |
720 | logic_out[i] = ((mso->buffer[i * 3 + 1] & 0x30) >> 4) | | |
721 | ((mso->buffer[i * 3 + 2] & 0x3f) << 2); | |
722 | } | |
723 | ||
5a2326a7 | 724 | packet.type = SR_DF_LOGIC; |
42eb54fb | 725 | packet.payload = &logic; |
e42ef08d RC |
726 | logic.length = 1024; |
727 | logic.unitsize = 1; | |
728 | logic.data = logic_out; | |
8a2efef2 | 729 | sr_session_bus(mso->session_id, &packet); |
01cf8814 | 730 | |
42eb54fb UH |
731 | // Dont bother fixing this yet, keep it "old style" |
732 | /* | |
5a2326a7 | 733 | packet.type = SR_DF_ANALOG; |
01cf8814 DR |
734 | packet.length = 1024; |
735 | packet.unitsize = sizeof(double); | |
736 | packet.payload = analog_out; | |
42eb54fb UH |
737 | sr_session_bus(mso->session_id, &packet); |
738 | */ | |
01cf8814 | 739 | |
5a2326a7 | 740 | packet.type = SR_DF_END; |
8a2efef2 | 741 | sr_session_bus(mso->session_id, &packet); |
01cf8814 DR |
742 | |
743 | return TRUE; | |
744 | } | |
745 | ||
bb7ef793 | 746 | static int hw_start_acquisition(int dev_index, gpointer session_dev_id) |
01cf8814 | 747 | { |
d68e2d1a | 748 | struct sr_dev_inst *sdi; |
01cf8814 | 749 | struct mso *mso; |
b9c735a2 UH |
750 | struct sr_datafeed_packet packet; |
751 | struct sr_datafeed_header header; | |
e46b8fb1 | 752 | int ret = SR_ERR; |
01cf8814 | 753 | |
bb7ef793 | 754 | if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) |
01cf8814 DR |
755 | return ret; |
756 | mso = sdi->priv; | |
757 | ||
758 | /* FIXME: No need to do full reconfigure every time */ | |
759 | // ret = mso_reset_fsm(sdi); | |
e46b8fb1 | 760 | // if (ret != SR_OK) |
01cf8814 DR |
761 | // return ret; |
762 | ||
763 | /* FIXME: ACDC Mode */ | |
a8467191 RC |
764 | mso->ctlbase1 &= 0x7f; |
765 | // mso->ctlbase1 |= mso->acdcmode; | |
01cf8814 DR |
766 | |
767 | ret = mso_configure_rate(sdi, mso->cur_rate); | |
e46b8fb1 | 768 | if (ret != SR_OK) |
01cf8814 DR |
769 | return ret; |
770 | ||
771 | /* set dac offset */ | |
772 | ret = mso_dac_out(sdi, mso->dac_offset); | |
e46b8fb1 | 773 | if (ret != SR_OK) |
01cf8814 DR |
774 | return ret; |
775 | ||
776 | ret = mso_configure_threshold_level(sdi); | |
e46b8fb1 | 777 | if (ret != SR_OK) |
01cf8814 DR |
778 | return ret; |
779 | ||
780 | ret = mso_configure_trigger(sdi); | |
e46b8fb1 | 781 | if (ret != SR_OK) |
01cf8814 DR |
782 | return ret; |
783 | ||
784 | /* FIXME: trigger_position */ | |
785 | ||
786 | ||
787 | /* END of config hardware part */ | |
788 | ||
789 | /* with trigger */ | |
790 | ret = mso_arm(sdi); | |
e46b8fb1 | 791 | if (ret != SR_OK) |
01cf8814 DR |
792 | return ret; |
793 | ||
794 | /* without trigger */ | |
795 | // ret = mso_force_capture(sdi); | |
e46b8fb1 | 796 | // if (ret != SR_OK) |
01cf8814 DR |
797 | // return ret; |
798 | ||
799 | mso_check_trigger(sdi, &mso->trigger_state); | |
800 | ret = mso_check_trigger(sdi, NULL); | |
e46b8fb1 | 801 | if (ret != SR_OK) |
01cf8814 DR |
802 | return ret; |
803 | ||
bb7ef793 | 804 | mso->session_id = session_dev_id; |
6f1be0a2 | 805 | sr_source_add(sdi->serial->fd, G_IO_IN, -1, receive_data, sdi); |
01cf8814 | 806 | |
5a2326a7 | 807 | packet.type = SR_DF_HEADER; |
01cf8814 DR |
808 | packet.payload = (unsigned char *) &header; |
809 | header.feed_version = 1; | |
810 | gettimeofday(&header.starttime, NULL); | |
811 | header.samplerate = mso->cur_rate; | |
5c64390e | 812 | // header.num_analog_probes = 1; |
01cf8814 | 813 | header.num_logic_probes = 8; |
bb7ef793 | 814 | sr_session_bus(session_dev_id, &packet); |
01cf8814 DR |
815 | |
816 | return ret; | |
817 | } | |
818 | ||
819 | /* FIXME */ | |
bb7ef793 | 820 | static int hw_stop_acquisition(int dev_index, gpointer session_dev_id) |
01cf8814 | 821 | { |
b9c735a2 | 822 | struct sr_datafeed_packet packet; |
01cf8814 | 823 | |
bb7ef793 | 824 | dev_index = dev_index; |
01cf8814 | 825 | |
5a2326a7 | 826 | packet.type = SR_DF_END; |
bb7ef793 | 827 | sr_session_bus(session_dev_id, &packet); |
3010f21c UH |
828 | |
829 | return SR_OK; | |
01cf8814 DR |
830 | } |
831 | ||
bb7ef793 | 832 | SR_PRIV struct sr_dev_plugin link_mso19_plugin_info = { |
01cf8814 | 833 | .name = "link-mso19", |
9f8274a5 | 834 | .longname = "Link Instruments MSO-19", |
01cf8814 DR |
835 | .api_version = 1, |
836 | .init = hw_init, | |
837 | .cleanup = hw_cleanup, | |
86f5e3d8 UH |
838 | .opendev = hw_opendev, |
839 | .closedev = hw_closedev, | |
5097b0d0 | 840 | .dev_info_get = hw_dev_info_get, |
01cf8814 | 841 | .get_status = hw_get_status, |
ffedd0bf | 842 | .hwcap_get_all = hw_hwcap_get_all, |
a7d05fcb | 843 | .config_set = hw_config_set, |
01cf8814 DR |
844 | .start_acquisition = hw_start_acquisition, |
845 | .stop_acquisition = hw_stop_acquisition, | |
846 | }; |