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3b533202 BV |
1 | /* |
2 | * This file is part of the sigrok project. | |
3 | * | |
4 | * Copyright (C) 2012 Bert Vermeulen <bert@biot.com> | |
5 | * | |
6 | * This program is free software: you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation, either version 3 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #include <stdio.h> | |
21 | #include <stdint.h> | |
22 | #include <stdlib.h> | |
23 | #include <sys/types.h> | |
24 | #include <sys/stat.h> | |
25 | #include <fcntl.h> | |
26 | #include <unistd.h> | |
27 | #include <string.h> | |
28 | #include <sys/time.h> | |
29 | #include <inttypes.h> | |
3b533202 BV |
30 | #include <glib.h> |
31 | #include <libusb.h> | |
45c59c8b BV |
32 | #include "libsigrok.h" |
33 | #include "libsigrok-internal.h" | |
3b533202 BV |
34 | #include "config.h" |
35 | #include "dso.h" | |
36 | ||
37 | ||
fc8fe3e3 BV |
38 | /* Max time in ms before we want to check on USB events */ |
39 | /* TODO tune this properly */ | |
3b533202 BV |
40 | #define TICK 1 |
41 | ||
62bb8840 | 42 | static const int hwcaps[] = { |
3b533202 | 43 | SR_HWCAP_OSCILLOSCOPE, |
ae88b97b | 44 | SR_HWCAP_LIMIT_SAMPLES, |
3b533202 | 45 | SR_HWCAP_CONTINUOUS, |
a370ef19 BV |
46 | SR_HWCAP_TIMEBASE, |
47 | SR_HWCAP_BUFFERSIZE, | |
48 | SR_HWCAP_TRIGGER_SOURCE, | |
49 | SR_HWCAP_TRIGGER_SLOPE, | |
50 | SR_HWCAP_HORIZ_TRIGGERPOS, | |
ebb781a6 | 51 | SR_HWCAP_FILTER, |
313deed2 | 52 | SR_HWCAP_VDIV, |
4a090d72 | 53 | SR_HWCAP_COUPLING, |
3b533202 BV |
54 | 0, |
55 | }; | |
56 | ||
57 | static const char *probe_names[] = { | |
58 | "CH1", | |
59 | "CH2", | |
60 | NULL, | |
61 | }; | |
62 | ||
62bb8840 | 63 | static const struct dso_profile dev_profiles[] = { |
88a13f30 | 64 | { 0x04b4, 0x2090, 0x04b5, 0x2090, |
3b533202 | 65 | "Hantek", "DSO-2090", |
88a13f30 BV |
66 | FIRMWARE_DIR "/hantek-dso-2xxx.fw" }, |
67 | { 0x04b4, 0x2150, 0x04b5, 0x2150, | |
68 | "Hantek", "DSO-2150", | |
69 | FIRMWARE_DIR "/hantek-dso-2xxx.fw" }, | |
70 | { 0x04b4, 0x2250, 0x04b5, 0x2250, | |
71 | "Hantek", "DSO-2250", | |
72 | FIRMWARE_DIR "/hantek-dso-2xxx.fw" }, | |
73 | { 0x04b4, 0x5200, 0x04b5, 0x5200, | |
74 | "Hantek", "DSO-5200", | |
75 | FIRMWARE_DIR "/hantek-dso-5xxx.fw" }, | |
76 | { 0x04b4, 0x520a, 0x04b5, 0x520a, | |
77 | "Hantek", "DSO-5200A", | |
78 | FIRMWARE_DIR "/hantek-dso-5xxx.fw" }, | |
79 | { 0, 0, 0, 0, 0, 0, 0 }, | |
3b533202 BV |
80 | }; |
81 | ||
62bb8840 | 82 | static const uint64_t buffersizes[] = { |
a370ef19 BV |
83 | 10240, |
84 | 32768, | |
85 | /* TODO: 65535 */ | |
62bb8840 | 86 | 0, |
a370ef19 BV |
87 | }; |
88 | ||
62bb8840 | 89 | static const struct sr_rational timebases[] = { |
a370ef19 BV |
90 | /* microseconds */ |
91 | { 10, 1000000 }, | |
92 | { 20, 1000000 }, | |
93 | { 40, 1000000 }, | |
94 | { 100, 1000000 }, | |
95 | { 200, 1000000 }, | |
96 | { 400, 1000000 }, | |
97 | /* milliseconds */ | |
98 | { 1, 1000 }, | |
99 | { 2, 1000 }, | |
100 | { 4, 1000 }, | |
101 | { 10, 1000 }, | |
102 | { 20, 1000 }, | |
103 | { 40, 1000 }, | |
104 | { 100, 1000 }, | |
105 | { 200, 1000 }, | |
106 | { 400, 1000 }, | |
62bb8840 | 107 | { 0, 0}, |
a370ef19 BV |
108 | }; |
109 | ||
62bb8840 | 110 | static const struct sr_rational vdivs[] = { |
313deed2 BV |
111 | /* millivolts */ |
112 | { 10, 1000 }, | |
113 | { 20, 1000 }, | |
114 | { 50, 1000 }, | |
115 | { 100, 1000 }, | |
116 | { 200, 1000 }, | |
117 | { 500, 1000 }, | |
118 | /* volts */ | |
119 | { 1, 1 }, | |
120 | { 2, 1 }, | |
121 | { 5, 1 }, | |
62bb8840 | 122 | { 0, 0 }, |
313deed2 BV |
123 | }; |
124 | ||
62bb8840 | 125 | static const char *trigger_sources[] = { |
a370ef19 BV |
126 | "CH1", |
127 | "CH2", | |
128 | "EXT", | |
88a13f30 | 129 | /* TODO: forced */ |
62bb8840 | 130 | NULL, |
a370ef19 | 131 | }; |
3b533202 | 132 | |
62bb8840 | 133 | static const char *filter_targets[] = { |
ebb781a6 BV |
134 | "CH1", |
135 | "CH2", | |
136 | /* TODO: "TRIGGER", */ | |
62bb8840 | 137 | NULL, |
ebb781a6 BV |
138 | }; |
139 | ||
62bb8840 | 140 | static const char *coupling[] = { |
b58fbd99 BV |
141 | "AC", |
142 | "DC", | |
143 | "GND", | |
62bb8840 | 144 | NULL, |
b58fbd99 BV |
145 | }; |
146 | ||
3b533202 BV |
147 | SR_PRIV libusb_context *usb_context = NULL; |
148 | SR_PRIV GSList *dev_insts = NULL; | |
149 | ||
62bb8840 | 150 | static struct sr_dev_inst *dso_dev_new(int index, const struct dso_profile *prof) |
3b533202 BV |
151 | { |
152 | struct sr_dev_inst *sdi; | |
153 | struct context *ctx; | |
154 | ||
155 | sdi = sr_dev_inst_new(index, SR_ST_INITIALIZING, | |
88a13f30 | 156 | prof->vendor, prof->model, NULL); |
3b533202 BV |
157 | if (!sdi) |
158 | return NULL; | |
159 | ||
160 | if (!(ctx = g_try_malloc0(sizeof(struct context)))) { | |
161 | sr_err("hantek-dso: ctx malloc failed"); | |
162 | return NULL; | |
163 | } | |
164 | ctx->profile = prof; | |
165 | ctx->dev_state = IDLE; | |
166 | ctx->timebase = DEFAULT_TIMEBASE; | |
167 | ctx->ch1_enabled = TRUE; | |
168 | ctx->ch2_enabled = TRUE; | |
169 | ctx->voltage_ch1 = DEFAULT_VOLTAGE; | |
170 | ctx->voltage_ch2 = DEFAULT_VOLTAGE; | |
171 | ctx->coupling_ch1 = DEFAULT_COUPLING; | |
172 | ctx->coupling_ch2 = DEFAULT_COUPLING; | |
173 | ctx->voffset_ch1 = DEFAULT_VERT_OFFSET; | |
174 | ctx->voffset_ch2 = DEFAULT_VERT_OFFSET; | |
175 | ctx->voffset_trigger = DEFAULT_VERT_TRIGGERPOS; | |
3b533202 BV |
176 | ctx->framesize = DEFAULT_FRAMESIZE; |
177 | ctx->triggerslope = SLOPE_POSITIVE; | |
a370ef19 | 178 | ctx->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE); |
3b533202 BV |
179 | ctx->triggerposition = DEFAULT_HORIZ_TRIGGERPOS; |
180 | sdi->priv = ctx; | |
181 | dev_insts = g_slist_append(dev_insts, sdi); | |
182 | ||
183 | return sdi; | |
184 | } | |
185 | ||
62bb8840 | 186 | static int configure_probes(struct context *ctx, const GSList *probes) |
3b533202 | 187 | { |
62bb8840 UH |
188 | const struct sr_probe *probe; |
189 | const GSList *l; | |
3b533202 | 190 | |
6e71ef3b | 191 | ctx->ch1_enabled = ctx->ch2_enabled = FALSE; |
3b533202 BV |
192 | for (l = probes; l; l = l->next) { |
193 | probe = (struct sr_probe *)l->data; | |
6e71ef3b | 194 | if (probe->index == 1) |
3b533202 | 195 | ctx->ch1_enabled = probe->enabled; |
6e71ef3b | 196 | else if (probe->index == 2) |
3b533202 BV |
197 | ctx->ch2_enabled = probe->enabled; |
198 | } | |
199 | ||
200 | return SR_OK; | |
201 | } | |
202 | ||
40dda2c3 | 203 | static int hw_init(void) |
61136ea6 BV |
204 | { |
205 | ||
206 | if (libusb_init(&usb_context) != 0) { | |
207 | sr_err("hantek-dso: Failed to initialize USB."); | |
208 | return SR_ERR; | |
209 | } | |
210 | ||
211 | return SR_OK; | |
212 | } | |
213 | ||
214 | static int hw_scan(void) | |
3b533202 BV |
215 | { |
216 | struct sr_dev_inst *sdi; | |
217 | struct libusb_device_descriptor des; | |
62bb8840 | 218 | const struct dso_profile *prof; |
3b533202 BV |
219 | struct context *ctx; |
220 | libusb_device **devlist; | |
61136ea6 | 221 | int devcnt, ret, i, j; |
3b533202 BV |
222 | |
223 | /* Find all Hantek DSO devices and upload firmware to all of them. */ | |
224 | devcnt = 0; | |
225 | libusb_get_device_list(usb_context, &devlist); | |
226 | for (i = 0; devlist[i]; i++) { | |
61136ea6 BV |
227 | if ((ret = libusb_get_device_descriptor(devlist[i], &des))) { |
228 | sr_err("hantek-dso: failed to get device descriptor: %d", ret); | |
3b533202 BV |
229 | continue; |
230 | } | |
231 | ||
232 | prof = NULL; | |
233 | for (j = 0; dev_profiles[j].orig_vid; j++) { | |
234 | if (des.idVendor == dev_profiles[j].orig_vid | |
235 | && des.idProduct == dev_profiles[j].orig_pid) { | |
236 | /* Device matches the pre-firmware profile. */ | |
237 | prof = &dev_profiles[j]; | |
238 | sr_dbg("hantek-dso: Found a %s %s.", prof->vendor, prof->model); | |
239 | sdi = dso_dev_new(devcnt, prof); | |
240 | ctx = sdi->priv; | |
241 | if (ezusb_upload_firmware(devlist[i], USB_CONFIGURATION, | |
242 | prof->firmware) == SR_OK) | |
243 | /* Remember when the firmware on this device was updated */ | |
fc8fe3e3 | 244 | ctx->fw_updated = g_get_monotonic_time(); |
3b533202 BV |
245 | else |
246 | sr_err("hantek-dso: firmware upload failed for " | |
247 | "device %d", devcnt); | |
248 | /* Dummy USB address of 0xff will get overwritten later. */ | |
249 | ctx->usb = sr_usb_dev_inst_new( | |
250 | libusb_get_bus_number(devlist[i]), 0xff, NULL); | |
251 | devcnt++; | |
252 | break; | |
253 | } else if (des.idVendor == dev_profiles[j].fw_vid | |
254 | && des.idProduct == dev_profiles[j].fw_pid) { | |
255 | /* Device matches the post-firmware profile. */ | |
256 | prof = &dev_profiles[j]; | |
257 | sr_dbg("hantek-dso: Found a %s %s.", prof->vendor, prof->model); | |
258 | sdi = dso_dev_new(devcnt, prof); | |
259 | sdi->status = SR_ST_INACTIVE; | |
260 | ctx = sdi->priv; | |
261 | ctx->usb = sr_usb_dev_inst_new( | |
262 | libusb_get_bus_number(devlist[i]), | |
263 | libusb_get_device_address(devlist[i]), NULL); | |
264 | devcnt++; | |
265 | break; | |
266 | } | |
267 | } | |
268 | if (!prof) | |
269 | /* not a supported VID/PID */ | |
270 | continue; | |
271 | } | |
272 | libusb_free_device_list(devlist, 1); | |
273 | ||
274 | return devcnt; | |
275 | } | |
276 | ||
277 | static int hw_dev_open(int dev_index) | |
278 | { | |
3b533202 BV |
279 | struct sr_dev_inst *sdi; |
280 | struct context *ctx; | |
fc8fe3e3 BV |
281 | int64_t timediff_us, timediff_ms; |
282 | int err; | |
3b533202 BV |
283 | |
284 | if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) | |
285 | return SR_ERR_ARG; | |
286 | ctx = sdi->priv; | |
287 | ||
288 | /* | |
fc8fe3e3 | 289 | * if the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS |
3b533202 BV |
290 | * for the FX2 to renumerate |
291 | */ | |
fc8fe3e3 BV |
292 | err = SR_ERR; |
293 | if (ctx->fw_updated > 0) { | |
3b533202 BV |
294 | sr_info("hantek-dso: waiting for device to reset"); |
295 | /* takes at least 300ms for the FX2 to be gone from the USB bus */ | |
296 | g_usleep(300 * 1000); | |
fc8fe3e3 BV |
297 | timediff_ms = 0; |
298 | while (timediff_ms < MAX_RENUM_DELAY_MS) { | |
3b533202 BV |
299 | if ((err = dso_open(dev_index)) == SR_OK) |
300 | break; | |
301 | g_usleep(100 * 1000); | |
fc8fe3e3 BV |
302 | timediff_us = g_get_monotonic_time() - ctx->fw_updated; |
303 | timediff_ms = timediff_us / 1000; | |
99f5d45e | 304 | sr_spew("hantek-dso: waited %" PRIi64 " ms", timediff_ms); |
3b533202 | 305 | } |
fc8fe3e3 | 306 | sr_info("hantek-dso: device came back after %d ms", timediff_ms); |
3b533202 BV |
307 | } else { |
308 | err = dso_open(dev_index); | |
309 | } | |
310 | ||
311 | if (err != SR_OK) { | |
312 | sr_err("hantek-dso: unable to open device"); | |
313 | return SR_ERR; | |
314 | } | |
315 | ||
316 | err = libusb_claim_interface(ctx->usb->devhdl, USB_INTERFACE); | |
317 | if (err != 0) { | |
318 | sr_err("hantek-dso: Unable to claim interface: %d", err); | |
319 | return SR_ERR; | |
320 | } | |
321 | ||
322 | return SR_OK; | |
323 | } | |
324 | ||
325 | static int hw_dev_close(int dev_index) | |
326 | { | |
327 | struct sr_dev_inst *sdi; | |
328 | ||
329 | if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) | |
330 | return SR_ERR_ARG; | |
331 | ||
332 | dso_close(sdi); | |
333 | ||
334 | return SR_OK; | |
335 | } | |
336 | ||
337 | static int hw_cleanup(void) | |
338 | { | |
339 | GSList *l; | |
340 | struct sr_dev_inst *sdi; | |
341 | struct context *ctx; | |
342 | ||
343 | /* Properly close and free all devices. */ | |
344 | for (l = dev_insts; l; l = l->next) { | |
345 | if (!(sdi = l->data)) { | |
346 | /* Log error, but continue cleaning up the rest. */ | |
347 | sr_err("hantek-dso: %s: sdi was NULL, continuing", __func__); | |
348 | continue; | |
349 | } | |
350 | if (!(ctx = sdi->priv)) { | |
351 | /* Log error, but continue cleaning up the rest. */ | |
352 | sr_err("hantek-dso: %s: sdi->priv was NULL, continuing", __func__); | |
353 | continue; | |
354 | } | |
355 | dso_close(sdi); | |
356 | sr_usb_dev_inst_free(ctx->usb); | |
a370ef19 BV |
357 | g_free(ctx->triggersource); |
358 | ||
3b533202 BV |
359 | sr_dev_inst_free(sdi); |
360 | } | |
361 | ||
362 | g_slist_free(dev_insts); | |
363 | dev_insts = NULL; | |
364 | ||
365 | if (usb_context) | |
366 | libusb_exit(usb_context); | |
367 | usb_context = NULL; | |
368 | ||
369 | return SR_OK; | |
370 | } | |
371 | ||
62bb8840 | 372 | static const void *hw_dev_info_get(int dev_index, int dev_info_id) |
3b533202 BV |
373 | { |
374 | struct sr_dev_inst *sdi; | |
62bb8840 | 375 | const void *info; |
3b533202 BV |
376 | uint64_t tmp; |
377 | ||
378 | if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) | |
379 | return NULL; | |
3b533202 BV |
380 | |
381 | info = NULL; | |
382 | switch (dev_info_id) { | |
383 | case SR_DI_INST: | |
384 | info = sdi; | |
385 | break; | |
386 | case SR_DI_NUM_PROBES: | |
88a13f30 | 387 | info = GINT_TO_POINTER(NUM_PROBES); |
3b533202 BV |
388 | break; |
389 | case SR_DI_PROBE_NAMES: | |
390 | info = probe_names; | |
391 | break; | |
a370ef19 BV |
392 | case SR_DI_BUFFERSIZES: |
393 | info = buffersizes; | |
394 | break; | |
395 | case SR_DI_TIMEBASES: | |
396 | info = timebases; | |
397 | break; | |
398 | case SR_DI_TRIGGER_SOURCES: | |
399 | info = trigger_sources; | |
400 | break; | |
ebb781a6 BV |
401 | case SR_DI_FILTERS: |
402 | info = filter_targets; | |
403 | break; | |
313deed2 BV |
404 | case SR_DI_VDIVS: |
405 | info = vdivs; | |
406 | break; | |
4a090d72 BV |
407 | case SR_DI_COUPLING: |
408 | info = coupling; | |
409 | break; | |
3b533202 BV |
410 | /* TODO remove this */ |
411 | case SR_DI_CUR_SAMPLERATE: | |
412 | info = &tmp; | |
413 | break; | |
414 | } | |
415 | ||
416 | return info; | |
417 | } | |
418 | ||
62bb8840 | 419 | static int hw_dev_status_get(int dev_index) |
3b533202 BV |
420 | { |
421 | struct sr_dev_inst *sdi; | |
422 | ||
62bb8840 | 423 | if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) |
3b533202 BV |
424 | return SR_ST_NOT_FOUND; |
425 | ||
426 | return sdi->status; | |
427 | } | |
428 | ||
62bb8840 | 429 | static const int *hw_hwcap_get_all(void) |
3b533202 | 430 | { |
62bb8840 | 431 | return hwcaps; |
3b533202 BV |
432 | } |
433 | ||
af36b809 | 434 | static int hw_dev_config_set(int dev_index, int hwcap, const void *value) |
3b533202 BV |
435 | { |
436 | struct sr_dev_inst *sdi; | |
437 | struct context *ctx; | |
a370ef19 BV |
438 | struct sr_rational tmp_rat; |
439 | float tmp_float; | |
440 | uint64_t tmp_u64; | |
441 | int ret, i; | |
4a090d72 | 442 | char **targets; |
3b533202 BV |
443 | |
444 | if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) | |
445 | return SR_ERR; | |
446 | ||
447 | if (sdi->status != SR_ST_ACTIVE) | |
448 | return SR_ERR; | |
449 | ||
a370ef19 | 450 | ret = SR_OK; |
3b533202 BV |
451 | ctx = sdi->priv; |
452 | switch (hwcap) { | |
ae88b97b | 453 | case SR_HWCAP_LIMIT_FRAMES: |
62bb8840 | 454 | ctx->limit_frames = *(const uint64_t *)value; |
ae88b97b | 455 | break; |
3b533202 | 456 | case SR_HWCAP_PROBECONFIG: |
62bb8840 | 457 | ret = configure_probes(ctx, (const GSList *)value); |
3b533202 | 458 | break; |
a370ef19 | 459 | case SR_HWCAP_TRIGGER_SLOPE: |
62bb8840 | 460 | tmp_u64 = *(const int *)value; |
a370ef19 BV |
461 | if (tmp_u64 != SLOPE_NEGATIVE && tmp_u64 != SLOPE_POSITIVE) |
462 | ret = SR_ERR_ARG; | |
463 | ctx->triggerslope = tmp_u64; | |
464 | break; | |
465 | case SR_HWCAP_HORIZ_TRIGGERPOS: | |
62bb8840 | 466 | tmp_float = *(const float *)value; |
a370ef19 BV |
467 | if (tmp_float < 0.0 || tmp_float > 1.0) { |
468 | sr_err("hantek-dso: trigger position should be between 0.0 and 1.0"); | |
3b533202 | 469 | ret = SR_ERR_ARG; |
a370ef19 BV |
470 | } else |
471 | ctx->triggerposition = tmp_float; | |
472 | break; | |
473 | case SR_HWCAP_BUFFERSIZE: | |
62bb8840 | 474 | tmp_u64 = *(const int *)value; |
a370ef19 BV |
475 | for (i = 0; buffersizes[i]; i++) { |
476 | if (buffersizes[i] == tmp_u64) { | |
477 | ctx->framesize = tmp_u64; | |
478 | break; | |
479 | } | |
480 | } | |
481 | if (buffersizes[i] == 0) | |
482 | ret = SR_ERR_ARG; | |
483 | break; | |
484 | case SR_HWCAP_TIMEBASE: | |
62bb8840 | 485 | tmp_rat = *(const struct sr_rational *)value; |
a370ef19 BV |
486 | for (i = 0; timebases[i].p && timebases[i].q; i++) { |
487 | if (timebases[i].p == tmp_rat.p | |
488 | && timebases[i].q == tmp_rat.q) { | |
489 | ctx->timebase = i; | |
490 | break; | |
491 | } | |
492 | } | |
493 | if (timebases[i].p == 0 && timebases[i].q == 0) | |
494 | ret = SR_ERR_ARG; | |
495 | break; | |
496 | case SR_HWCAP_TRIGGER_SOURCE: | |
a370ef19 | 497 | for (i = 0; trigger_sources[i]; i++) { |
4a090d72 BV |
498 | if (!strcmp(value, trigger_sources[i])) { |
499 | ctx->triggersource = g_strdup(value); | |
a370ef19 BV |
500 | break; |
501 | } | |
502 | } | |
503 | if (trigger_sources[i] == 0) | |
504 | ret = SR_ERR_ARG; | |
505 | break; | |
ebb781a6 BV |
506 | case SR_HWCAP_FILTER: |
507 | ctx->filter_ch1 = ctx->filter_ch2 = ctx->filter_trigger = 0; | |
508 | targets = g_strsplit(value, ",", 0); | |
509 | for (i = 0; targets[i]; i++) { | |
510 | if (targets[i] == '\0') | |
511 | /* Empty filter string can be used to clear them all. */ | |
512 | ; | |
513 | else if (!strcmp(targets[i], "CH1")) | |
514 | ctx->filter_ch1 = TRUE; | |
515 | else if (!strcmp(targets[i], "CH2")) | |
516 | ctx->filter_ch2 = TRUE; | |
517 | else if (!strcmp(targets[i], "TRIGGER")) | |
518 | ctx->filter_trigger = TRUE; | |
519 | else { | |
520 | sr_err("invalid filter target %s", targets[i]); | |
521 | ret = SR_ERR_ARG; | |
522 | } | |
523 | } | |
524 | g_strfreev(targets); | |
525 | break; | |
313deed2 BV |
526 | case SR_HWCAP_VDIV: |
527 | /* TODO not supporting vdiv per channel yet */ | |
62bb8840 | 528 | tmp_rat = *(const struct sr_rational *)value; |
313deed2 BV |
529 | for (i = 0; vdivs[i].p && vdivs[i].q; i++) { |
530 | if (vdivs[i].p == tmp_rat.p | |
531 | && vdivs[i].q == tmp_rat.q) { | |
532 | ctx->voltage_ch1 = i; | |
533 | ctx->voltage_ch2 = i; | |
534 | break; | |
535 | } | |
536 | } | |
537 | if (vdivs[i].p == 0 && vdivs[i].q == 0) | |
538 | ret = SR_ERR_ARG; | |
539 | break; | |
b58fbd99 BV |
540 | case SR_HWCAP_COUPLING: |
541 | /* TODO not supporting coupling per channel yet */ | |
b58fbd99 | 542 | for (i = 0; coupling[i]; i++) { |
4a090d72 | 543 | if (!strcmp(value, coupling[i])) { |
b58fbd99 BV |
544 | ctx->coupling_ch1 = i; |
545 | ctx->coupling_ch2 = i; | |
546 | break; | |
547 | } | |
548 | } | |
549 | if (coupling[i] == 0) | |
550 | ret = SR_ERR_ARG; | |
551 | break; | |
3b533202 BV |
552 | default: |
553 | ret = SR_ERR_ARG; | |
554 | } | |
555 | ||
556 | return ret; | |
557 | } | |
558 | ||
e749a8cb BV |
559 | static void send_chunk(struct context *ctx, unsigned char *buf, |
560 | int num_samples) | |
3b533202 BV |
561 | { |
562 | struct sr_datafeed_packet packet; | |
563 | struct sr_datafeed_analog analog; | |
c5841b28 | 564 | float ch1, ch2, range; |
6e71ef3b | 565 | int num_probes, data_offset, i; |
3b533202 | 566 | |
6e71ef3b | 567 | num_probes = (ctx->ch1_enabled && ctx->ch2_enabled) ? 2 : 1; |
3b533202 BV |
568 | packet.type = SR_DF_ANALOG; |
569 | packet.payload = &analog; | |
6e71ef3b | 570 | /* TODO: support for 5xxx series 9-bit samples */ |
e749a8cb | 571 | analog.num_samples = num_samples; |
9956f285 UH |
572 | analog.mq = SR_MQ_VOLTAGE; |
573 | analog.unit = SR_UNIT_VOLT; | |
6e71ef3b BV |
574 | analog.data = g_try_malloc(analog.num_samples * sizeof(float) * num_probes); |
575 | data_offset = 0; | |
3b533202 | 576 | for (i = 0; i < analog.num_samples; i++) { |
6e71ef3b BV |
577 | /* The device always sends data for both channels. If a channel |
578 | * is disabled, it contains a copy of the enabled channel's | |
579 | * data. However, we only send the requested channels to the bus. | |
c5841b28 BV |
580 | * |
581 | * Voltage values are encoded as a value 0-255 (0-512 on the 5200*), | |
582 | * where the value is a point in the range represented by the vdiv | |
583 | * setting. There are 8 vertical divs, so e.g. 500mV/div represents | |
584 | * 4V peak-to-peak where 0 = -2V and 255 = +2V. | |
6e71ef3b | 585 | */ |
3b533202 | 586 | /* TODO: support for 5xxx series 9-bit samples */ |
6e71ef3b | 587 | if (ctx->ch1_enabled) { |
c5841b28 | 588 | range = ((float)vdivs[ctx->voltage_ch1].p / vdivs[ctx->voltage_ch1].q) * 8; |
e749a8cb | 589 | ch1 = range / 255 * *(buf + i * 2 + 1); |
c5841b28 BV |
590 | /* Value is centered around 0V. */ |
591 | ch1 -= range / 2; | |
6e71ef3b BV |
592 | analog.data[data_offset++] = ch1; |
593 | } | |
594 | if (ctx->ch2_enabled) { | |
c5841b28 | 595 | range = ((float)vdivs[ctx->voltage_ch2].p / vdivs[ctx->voltage_ch2].q) * 8; |
e749a8cb | 596 | ch2 = range / 255 * *(buf + i * 2); |
c5841b28 | 597 | ch2 -= range / 2; |
6e71ef3b BV |
598 | analog.data[data_offset++] = ch2; |
599 | } | |
3b533202 | 600 | } |
e749a8cb BV |
601 | sr_session_send(ctx->cb_data, &packet); |
602 | ||
603 | } | |
604 | ||
605 | /* Called by libusb (as triggered by handle_event()) when a transfer comes in. | |
606 | * Only channel data comes in asynchronously, and all transfers for this are | |
607 | * queued up beforehand, so this just needs so chuck the incoming data onto | |
608 | * the libsigrok session bus. | |
609 | */ | |
610 | static void receive_transfer(struct libusb_transfer *transfer) | |
611 | { | |
612 | struct sr_datafeed_packet packet; | |
613 | struct context *ctx; | |
614 | int num_samples, pre; | |
615 | ||
616 | ctx = transfer->user_data; | |
617 | sr_dbg("hantek-dso: receive_transfer(): status %d received %d bytes", | |
618 | transfer->status, transfer->actual_length); | |
619 | ||
620 | if (transfer->actual_length == 0) | |
621 | /* Nothing to send to the bus. */ | |
622 | return; | |
623 | ||
624 | num_samples = transfer->actual_length / 2; | |
625 | ||
626 | sr_dbg("hantek-dso: got %d-%d/%d samples in frame", ctx->samp_received + 1, | |
627 | ctx->samp_received + num_samples, ctx->framesize); | |
628 | ||
629 | /* The device always sends a full frame, but the beginning of the frame | |
630 | * doesn't represent the trigger point. The offset at which the trigger | |
631 | * happened came in with the capture state, so we need to start sending | |
632 | * from there up the session bus. The samples in the frame buffer before | |
633 | * that trigger point came after the end of the device's frame buffer was | |
634 | * reached, and it wrapped around to overwrite up until the trigger point. | |
635 | */ | |
636 | if (ctx->samp_received < ctx->trigger_offset) { | |
637 | /* Trigger point not yet reached. */ | |
638 | if (ctx->samp_received + num_samples < ctx->trigger_offset) { | |
639 | /* The entire chunk is before the trigger point. */ | |
640 | memcpy(ctx->framebuf + ctx->samp_buffered * 2, | |
641 | transfer->buffer, num_samples * 2); | |
642 | ctx->samp_buffered += num_samples; | |
643 | } else { | |
644 | /* This chunk hits or overruns the trigger point. | |
645 | * Store the part before the trigger fired, and | |
646 | * send the rest up to the session bus. */ | |
647 | pre = ctx->trigger_offset - ctx->samp_received; | |
648 | memcpy(ctx->framebuf + ctx->samp_buffered * 2, | |
649 | transfer->buffer, pre * 2); | |
650 | ctx->samp_buffered += pre; | |
651 | ||
652 | /* The rest of this chunk starts with the trigger point. */ | |
653 | sr_dbg("hantek-dso: reached trigger point, %d samples buffered", | |
654 | ctx->samp_buffered); | |
655 | ||
656 | /* Avoid the corner case where the chunk ended at | |
657 | * exactly the trigger point. */ | |
658 | if (num_samples > pre) | |
659 | send_chunk(ctx, transfer->buffer + pre * 2, | |
660 | num_samples - pre); | |
661 | } | |
662 | } else { | |
663 | /* Already past the trigger point, just send it all out. */ | |
664 | send_chunk(ctx, transfer->buffer, | |
665 | num_samples); | |
666 | } | |
667 | ||
668 | ctx->samp_received += num_samples; | |
669 | ||
670 | /* Everything in this transfer was either copied to the buffer or | |
671 | * sent to the session bus. */ | |
3b533202 BV |
672 | g_free(transfer->buffer); |
673 | libusb_free_transfer(transfer); | |
3b533202 | 674 | |
e749a8cb BV |
675 | if (ctx->samp_received >= ctx->framesize) { |
676 | /* That was the last chunk in this frame. Send the buffered | |
677 | * pre-trigger samples out now, in one big chunk. */ | |
678 | sr_dbg("hantek-dso: end of frame, sending %d pre-trigger buffered samples", | |
679 | ctx->samp_buffered); | |
680 | send_chunk(ctx, ctx->framebuf, ctx->samp_buffered); | |
681 | ||
682 | /* Mark the end of this frame. */ | |
ae88b97b BV |
683 | packet.type = SR_DF_FRAME_END; |
684 | sr_session_send(ctx->cb_data, &packet); | |
685 | ||
686 | if (ctx->limit_frames && ++ctx->num_frames == ctx->limit_frames) { | |
687 | /* Terminate session */ | |
6e71ef3b | 688 | /* TODO: don't leave pending USB transfers hanging */ |
ae88b97b BV |
689 | packet.type = SR_DF_END; |
690 | sr_session_send(ctx->cb_data, &packet); | |
691 | } else { | |
ae88b97b BV |
692 | ctx->dev_state = NEW_CAPTURE; |
693 | } | |
694 | } | |
695 | ||
3b533202 BV |
696 | } |
697 | ||
698 | static int handle_event(int fd, int revents, void *cb_data) | |
699 | { | |
ae88b97b | 700 | struct sr_datafeed_packet packet; |
3b533202 BV |
701 | struct timeval tv; |
702 | struct context *ctx; | |
e749a8cb | 703 | int num_probes; |
6e6eeff4 BV |
704 | uint32_t trigger_offset; |
705 | uint8_t capturestate; | |
3b533202 BV |
706 | |
707 | /* Avoid compiler warnings. */ | |
708 | (void)fd; | |
709 | (void)revents; | |
710 | ||
711 | /* Always handle pending libusb events. */ | |
712 | tv.tv_sec = tv.tv_usec = 0; | |
713 | libusb_handle_events_timeout(usb_context, &tv); | |
714 | ||
715 | ctx = cb_data; | |
716 | /* TODO: ugh */ | |
717 | if (ctx->dev_state == NEW_CAPTURE) { | |
718 | if (dso_capture_start(ctx) != SR_OK) | |
719 | return TRUE; | |
720 | if (dso_enable_trigger(ctx) != SR_OK) | |
721 | return TRUE; | |
a370ef19 BV |
722 | // if (dso_force_trigger(ctx) != SR_OK) |
723 | // return TRUE; | |
3b533202 BV |
724 | sr_dbg("hantek-dso: successfully requested next chunk"); |
725 | ctx->dev_state = CAPTURE; | |
726 | return TRUE; | |
727 | } | |
728 | if (ctx->dev_state != CAPTURE) | |
729 | return TRUE; | |
730 | ||
6e6eeff4 | 731 | if ((dso_get_capturestate(ctx, &capturestate, &trigger_offset)) != SR_OK) |
3b533202 | 732 | return TRUE; |
3b533202 BV |
733 | |
734 | sr_dbg("hantek-dso: capturestate %d", capturestate); | |
6e6eeff4 | 735 | sr_dbg("hantek-dso: trigger offset 0x%.6x", trigger_offset); |
3b533202 BV |
736 | switch (capturestate) { |
737 | case CAPTURE_EMPTY: | |
738 | if (++ctx->capture_empty_count >= MAX_CAPTURE_EMPTY) { | |
739 | ctx->capture_empty_count = 0; | |
740 | if (dso_capture_start(ctx) != SR_OK) | |
741 | break; | |
742 | if (dso_enable_trigger(ctx) != SR_OK) | |
743 | break; | |
a370ef19 BV |
744 | // if (dso_force_trigger(ctx) != SR_OK) |
745 | // break; | |
3b533202 BV |
746 | sr_dbg("hantek-dso: successfully requested next chunk"); |
747 | } | |
748 | break; | |
749 | case CAPTURE_FILLING: | |
750 | /* no data yet */ | |
751 | break; | |
752 | case CAPTURE_READY_8BIT: | |
e749a8cb BV |
753 | /* Remember where in the captured frame the trigger is. */ |
754 | ctx->trigger_offset = trigger_offset; | |
755 | ||
756 | num_probes = (ctx->ch1_enabled && ctx->ch2_enabled) ? 2 : 1; | |
757 | ctx->framebuf = g_try_malloc(ctx->framesize * num_probes * 2); | |
758 | ctx->samp_buffered = ctx->samp_received = 0; | |
759 | ||
3b533202 BV |
760 | /* Tell the scope to send us the first frame. */ |
761 | if (dso_get_channeldata(ctx, receive_transfer) != SR_OK) | |
762 | break; | |
ae88b97b BV |
763 | |
764 | /* Don't hit the state machine again until we're done fetching | |
765 | * the data we just told the scope to send. | |
766 | */ | |
3b533202 | 767 | ctx->dev_state = FETCH_DATA; |
ae88b97b BV |
768 | |
769 | /* Tell the frontend a new frame is on the way. */ | |
770 | packet.type = SR_DF_FRAME_BEGIN; | |
771 | sr_session_send(cb_data, &packet); | |
3b533202 BV |
772 | break; |
773 | case CAPTURE_READY_9BIT: | |
774 | /* TODO */ | |
775 | sr_err("not yet supported"); | |
776 | break; | |
777 | case CAPTURE_TIMEOUT: | |
778 | /* Doesn't matter, we'll try again next time. */ | |
779 | break; | |
780 | default: | |
781 | sr_dbg("unknown capture state"); | |
782 | } | |
783 | ||
784 | return TRUE; | |
785 | } | |
786 | ||
62bb8840 | 787 | static int hw_dev_acquisition_start(int dev_index, void *cb_data) |
3b533202 BV |
788 | { |
789 | const struct libusb_pollfd **lupfd; | |
790 | struct sr_datafeed_packet packet; | |
791 | struct sr_datafeed_header header; | |
792 | struct sr_datafeed_meta_analog meta; | |
793 | struct sr_dev_inst *sdi; | |
794 | struct context *ctx; | |
795 | int i; | |
796 | ||
62bb8840 | 797 | if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) |
3b533202 BV |
798 | return SR_ERR; |
799 | ||
800 | if (sdi->status != SR_ST_ACTIVE) | |
801 | return SR_ERR; | |
802 | ||
803 | ctx = sdi->priv; | |
804 | ctx->cb_data = cb_data; | |
805 | ||
806 | if (dso_init(ctx) != SR_OK) | |
807 | return SR_ERR; | |
808 | ||
809 | if (dso_capture_start(ctx) != SR_OK) | |
810 | return SR_ERR; | |
811 | ||
812 | ctx->dev_state = CAPTURE; | |
813 | lupfd = libusb_get_pollfds(usb_context); | |
814 | for (i = 0; lupfd[i]; i++) | |
815 | sr_source_add(lupfd[i]->fd, lupfd[i]->events, TICK, handle_event, | |
816 | ctx); | |
817 | free(lupfd); | |
818 | ||
819 | /* Send header packet to the session bus. */ | |
820 | packet.type = SR_DF_HEADER; | |
821 | packet.payload = (unsigned char *)&header; | |
822 | header.feed_version = 1; | |
823 | gettimeofday(&header.starttime, NULL); | |
824 | sr_session_send(cb_data, &packet); | |
825 | ||
826 | /* Send metadata about the SR_DF_ANALOG packets to come. */ | |
827 | packet.type = SR_DF_META_ANALOG; | |
828 | packet.payload = &meta; | |
88a13f30 | 829 | meta.num_probes = NUM_PROBES; |
3b533202 BV |
830 | sr_session_send(cb_data, &packet); |
831 | ||
832 | return SR_OK; | |
833 | } | |
834 | ||
835 | /* TODO: doesn't really cancel pending transfers so they might come in after | |
836 | * SR_DF_END is sent. | |
837 | */ | |
62bb8840 | 838 | static int hw_dev_acquisition_stop(int dev_index, void *cb_data) |
3b533202 BV |
839 | { |
840 | struct sr_datafeed_packet packet; | |
841 | struct sr_dev_inst *sdi; | |
842 | struct context *ctx; | |
843 | ||
62bb8840 | 844 | if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) |
3b533202 BV |
845 | return SR_ERR; |
846 | ||
847 | if (sdi->status != SR_ST_ACTIVE) | |
848 | return SR_ERR; | |
849 | ||
850 | ctx = sdi->priv; | |
851 | ctx->dev_state = IDLE; | |
852 | ||
853 | packet.type = SR_DF_END; | |
62bb8840 | 854 | sr_session_send(cb_data, &packet); |
3b533202 BV |
855 | |
856 | return SR_OK; | |
857 | } | |
858 | ||
62bb8840 | 859 | SR_PRIV struct sr_dev_driver hantek_dso_driver_info = { |
3b533202 BV |
860 | .name = "hantek-dso", |
861 | .longname = "Hantek DSO", | |
862 | .api_version = 1, | |
863 | .init = hw_init, | |
864 | .cleanup = hw_cleanup, | |
61136ea6 | 865 | .scan = hw_scan, |
3b533202 BV |
866 | .dev_open = hw_dev_open, |
867 | .dev_close = hw_dev_close, | |
62bb8840 UH |
868 | .dev_info_get = hw_dev_info_get, |
869 | .dev_status_get = hw_dev_status_get, | |
870 | .hwcap_get_all = hw_hwcap_get_all, | |
3b533202 | 871 | .dev_config_set = hw_dev_config_set, |
62bb8840 UH |
872 | .dev_acquisition_start = hw_dev_acquisition_start, |
873 | .dev_acquisition_stop = hw_dev_acquisition_stop, | |
3b533202 | 874 | }; |