struct dev_context *devc;
gchar *trig_mode;
unsigned int num_channels, i, j;
+ int buffer_samples;
if (!(devc = sdi->priv))
return SR_ERR;
break;
case PROTOCOL_V3:
case PROTOCOL_V4:
+ case PROTOCOL_V5:
if (rigol_ds_config_set(sdi, ":WAV:FORM BYTE") != SR_OK)
return SR_ERR;
if (devc->data_source == DATA_SOURCE_LIVE) {
if (devc->model->series->protocol == PROTOCOL_V3) {
if (rigol_ds_config_set(sdi, ":WAV:MODE RAW") != SR_OK)
return SR_ERR;
- } else if (devc->model->series->protocol == PROTOCOL_V4) {
+ } else if (devc->model->series->protocol >= PROTOCOL_V4) {
num_channels = 0;
/* Channels 3 and 4 are multiplexed with D0-7 and D8-15 */
}
}
- devc->analog_frame_size = devc->digital_frame_size =
- num_channels == 1 ?
- devc->model->series->buffer_samples :
- num_channels == 2 ?
- devc->model->series->buffer_samples / 2 :
- devc->model->series->buffer_samples / 4;
+ buffer_samples = devc->model->series->buffer_samples;
+ if (buffer_samples == 0)
+ {
+ /* The DS4000 series does not have a fixed memory depth, it
+ * can be chosen from the menu and also varies with number
+ * of active channels. Retrieve the actual number with the
+ * ACQ:MDEP command. */
+ sr_scpi_get_int(sdi->conn, "ACQ:MDEP?", &buffer_samples);
+ devc->analog_frame_size = devc->digital_frame_size =
+ buffer_samples;
+ }
+ else
+ {
+ /* The DS1000Z series has a fixed memory depth which we
+ * need to divide correctly according to the number of
+ * active channels. */
+ devc->analog_frame_size = devc->digital_frame_size =
+ num_channels == 1 ?
+ buffer_samples :
+ num_channels == 2 ?
+ buffer_samples / 2 :
+ buffer_samples / 4;
+ }
}
if (rigol_ds_config_set(sdi, ":SING") != SR_OK)
}
break;
case PROTOCOL_V4:
+ case PROTOCOL_V5:
if (ch->type == SR_CHANNEL_ANALOG) {
if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
ch->index + 1) != SR_OK)
// TODO: For the MSO1000Z series, we need a way to express that
// this data is in fact just for a single channel, with the valid
// data for that channel in the LSB of each byte.
- logic.unitsize = devc->model->series->protocol == PROTOCOL_V4 ? 1 : 2;
+ logic.unitsize = devc->model->series->protocol >= PROTOCOL_V4 ? 1 : 2;
logic.data = devc->buffer;
packet.type = SR_DF_LOGIC;
packet.payload = &logic;
sr_dbg("Logic analyzer %s, current digital channel state:",
devc->la_enabled ? "enabled" : "disabled");
for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
- cmd = g_strdup_printf(
- devc->model->series->protocol >= PROTOCOL_V3 ?
- ":LA:DIG%d:DISP?" : ":DIG%d:TURN?", i);
+ if (devc->model->series->protocol >= PROTOCOL_V5)
+ cmd = g_strdup_printf(":LA:DISP? D%d", i);
+ else if (devc->model->series->protocol >= PROTOCOL_V3)
+ cmd = g_strdup_printf(":LA:DIG%d:DISP?", i);
+ else
+ cmd = g_strdup_printf(":DIG%d:TURN?", i);
res = sr_scpi_get_bool(sdi->conn, cmd, &devc->digital_channels[i]);
g_free(cmd);
if (res != SR_OK)
sr_dbg("Current trigger source %s", devc->trigger_source);
/* Horizontal trigger position. */
- if (sr_scpi_get_float(sdi->conn, ":TIM:OFFS?", &devc->horiz_triggerpos) != SR_OK)
+ if (sr_scpi_get_float(sdi->conn, devc->model->cmds[CMD_GET_HORIZ_TRIGGERPOS].str,
+ &devc->horiz_triggerpos) != SR_OK)
return SR_ERR;
sr_dbg("Current horizontal trigger position %g", devc->horiz_triggerpos);