#define LA2016_VID 0x77a1
#define LA2016_PID 0x01a2
+#define LA2016_IPRODUCT_INDEX 2
#define USB_INTERFACE 0
#define USB_CONFIGURATION 1
+#define USB_EP_FPGA_BITSTREAM 2
+#define USB_EP_CAPTURE_DATA 6
/*
* On Windows sigrok uses WinUSB RAW_IO policy which requires the
#define RENUM_GONE_DELAY_MS 1800
#define RENUM_POLL_INTERVAL_MS 200
+/*
+ * The device expects some zero padding to follow the content of the
+ * file which contains the FPGA bitstream. Specify the chunk size here.
+ */
+#define LA2016_EP2_PADDING 2048
+
#define LA2016_THR_VOLTAGE_MIN 0.40
#define LA2016_THR_VOLTAGE_MAX 4.00
-#define LA2016_NUM_SAMPLES_MIN 256
-#define LA2016_NUM_SAMPLES_MAX (10UL * 1000 * 1000 * 1000)
+#define LA2016_NUM_SAMPLES_MIN (UINT64_C(256))
+#define LA2016_NUM_SAMPLES_MAX (UINT64_C(10 * 1000 * 1000 * 1000))
+
+/* Maximum device capabilities. May differ between models. */
+#define MAX_SAMPLE_RATE_LA2016 SR_MHZ(200)
+#define MAX_SAMPLE_RATE_LA1016 SR_MHZ(100)
+#define MIN_SAMPLE_RATE_LA2016 SR_KHZ(10)
+#define MAX_PWM_FREQ SR_MHZ(20)
+#define PWM_CLOCK SR_MHZ(200) /* 200MHz for both LA2016 and LA1016 */
+
+/* TODO
+ * What is the origin and motivation of that 128Mi literal? What is its
+ * unit? How does it relate to a device's hardware capabilities? How to
+ * map the 1GiB of RAM of an LA2016 (at 16 channels) to the 128Mi value?
+ * It cannot be sample count. Is it memory size in bytes perhaps?
+ */
+#define LA2016_PRE_MEM_LIMIT_BASE (128 * 1024 * 1024)
+
+#define LA2016_NUM_PWMCH_MAX 2
+
+#define LA2016_CONVBUFFER_SIZE (4 * 1024 * 1024)
-typedef struct pwm_setting_dev {
+struct pwm_setting_dev {
uint32_t period;
uint32_t duty;
-} pwm_setting_dev_t;
+};
-typedef struct trigger_cfg {
+struct trigger_cfg {
uint32_t channels;
uint32_t enabled;
uint32_t level;
uint32_t high_or_falling;
-} trigger_cfg_t;
+};
-typedef struct capture_info {
+struct capture_info {
uint32_t n_rep_packets;
uint32_t n_rep_packets_before_trigger;
uint32_t write_pos;
-} capture_info_t;
+};
#define NUM_PACKETS_IN_CHUNK 5
#define TRANSFER_PACKET_LENGTH 16
-typedef struct pwm_setting {
- uint8_t enabled;
+struct pwm_setting {
+ gboolean enabled;
float freq;
float duty;
-} pwm_setting_t;
+};
struct dev_context {
- struct sr_context *ctx;
- uint64_t fw_uploaded;
+ uint64_t fw_uploaded; /* Timestamp of most recent FW upload. */
/* User specified parameters. */
- pwm_setting_t pwm_setting[2];
- unsigned int threshold_voltage_idx;
+ struct pwm_setting pwm_setting[LA2016_NUM_PWMCH_MAX];
+ size_t threshold_voltage_idx;
float threshold_voltage;
uint64_t max_samplerate;
uint64_t cur_samplerate;
- uint64_t limit_samples;
+ struct sr_sw_limits sw_limits;
uint64_t capture_ratio;
- uint16_t cur_channels;
- int num_channels;
-
- uint32_t bitstream_size;
-
- /* Values derived from user specs. */
- uint64_t pre_trigger_size;
/* Internal acquisition and download state. */
- int had_triggers_configured;
- int have_trigger;
- int transfer_finished;
- capture_info_t info;
- unsigned int n_transfer_packets_to_read; /* each with 5 acq packets */
- unsigned int n_bytes_to_read;
- unsigned int n_reps_until_trigger;
- unsigned int reading_behind_trigger;
+ gboolean trigger_involved;
+ gboolean completion_seen;
+ gboolean download_finished;
+ struct capture_info info;
+ uint32_t n_transfer_packets_to_read; /* each with 5 acq packets */
+ uint32_t n_bytes_to_read;
+ uint32_t n_reps_until_trigger;
+ gboolean trigger_marked;
uint64_t total_samples;
uint32_t read_pos;
- unsigned int convbuffer_size;
- uint8_t *convbuffer;
+ struct feed_queue_logic *feed_queue;
struct libusb_transfer *transfer;
};