SR_MHZ(320),
};
-SR_PRIV struct sr_dev_driver hantek_4032l_driver_info;
+static struct sr_dev_driver hantek_4032l_driver_info;
static GSList *scan(struct sr_dev_driver *di, GSList *options)
{
/* Initialize command packet. */
devc->cmd_pkt.magic = H4032L_CMD_PKT_MAGIC;
- devc->cmd_pkt.sample_size = 16384;
+ devc->cmd_pkt.sample_size = 16 * 1024;
devc->sample_rate = 0;
devc->status = H4032L_STATUS_IDLE;
devc->external_clock = FALSE;
devc->clock_edge = H4032L_CLOCK_EDGE_TYPE_RISE;
- devc->cur_threshold[0] = 2.5;
- devc->cur_threshold[1] = 2.5;
+ /* Create array of thresholds from min to max. */
+ GVariant *thresholds = std_gvar_min_max_step_thresholds(
+ H4032L_THR_VOLTAGE_MIN, H4032L_THR_VOLTAGE_MAX,
+ H4032L_THR_VOLTAGE_STEP);
+ /* Take default threshold value from array (FP workaround). */
+ g_variant_get_child(thresholds, H4032L_THR_VOLTAGE_DEFAULT,
+ "(dd)", &devc->cur_threshold[0], &devc->cur_threshold[1]);
sdi->priv = devc;
devices = g_slist_append(devices, sdi);
*data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches));
break;
case SR_CONF_VOLTAGE_THRESHOLD:
- *data = std_gvar_min_max_step_thresholds(-6.0, 6.0, 0.1);
+ *data = std_gvar_min_max_step_thresholds(H4032L_THR_VOLTAGE_MIN,
+ H4032L_THR_VOLTAGE_MAX, H4032L_THR_VOLTAGE_STEP);
break;
case SR_CONF_LIMIT_SAMPLES:
*data = std_gvar_tuple_u64(H4043L_NUM_SAMPLES_MIN, H4032L_NUM_SAMPLES_MAX);
else
cmd_pkt->sample_rate = devc->sample_rate;
- /* Set pwm channel values. */
+ /* Set PWM channel values. */
devc->cmd_pkt.pwm_a = h4032l_voltage2pwm(devc->cur_threshold[0]);
devc->cmd_pkt.pwm_b = h4032l_voltage2pwm(devc->cur_threshold[1]);
channel = channel->next;
}
- /* Compress range mask value and apply range settings. */
- if (range_mask) {
- cmd_pkt->trigger[0].flags.data_range_enabled = 1;
- cmd_pkt->trigger[0].data_range_mask |= (range_mask);
-
- uint32_t new_range_value = 0;
- uint32_t bit_mask = 1;
- while (range_mask) {
- if ((range_mask & 1) != 0) {
- new_range_value <<= 1;
- if ((range_value & 1) != 0)
- new_range_value |= bit_mask;
- bit_mask <<= 1;
- }
- range_mask >>= 1;
- range_value >>= 1;
- }
- cmd_pkt->trigger[0].data_range_max |= range_value;
- }
+ cmd_pkt->trigger[0].flags.data_range_enabled = 1;
+ cmd_pkt->trigger[0].data_range_mask |= range_mask;
+ cmd_pkt->trigger[0].data_range_max = range_value;
}
usb_source_add(sdi->session, drvc->sr_ctx, 1000,
return h4032l_stop(sdi);
}
-SR_PRIV struct sr_dev_driver hantek_4032l_driver_info = {
+static struct sr_dev_driver hantek_4032l_driver_info = {
.name = "hantek-4032l",
.longname = "Hantek 4032L",
.api_version = 1,