fx2lafw/dslogic: Imported FPGA config mode flags

[libsigrok.git] / src / hardware / fx2lafw / dslogic.h

diff --git a/src/hardware/fx2lafw/dslogic.h b/src/hardware/fx2lafw/dslogic.h
index 2d13b28f6a0b3a24ea4a041bcb008ee01b4cfd08..50e0a63df3d74bb75ee565a3a59a3d611c712e24 100644 (file)
--- a/src/hardware/fx2lafw/dslogic.h
+++ b/src/hardware/fx2lafw/dslogic.h
@@ -49,6 +49,22 @@
 #define DS_MAX_LOGIC_DEPTH             SR_MHZ(16)
 #define DS_MAX_LOGIC_SAMPLERATE                SR_MHZ(100)
 
+#define DS_MODE_TRIG_EN                        (1 << 0)
+#define DS_MODE_CLK_TYPE               (1 << 1)
+#define DS_MODE_CLK_EDGE               (1 << 2)
+#define DS_MODE_RLE_MODE               (1 << 3)
+#define DS_MODE_DSO_MODE               (1 << 4)
+#define DS_MODE_HALF_MODE              (1 << 5)
+#define DS_MODE_QUAR_MODE              (1 << 6)
+#define DS_MODE_ANALOG_MODE            (1 << 7)
+#define DS_MODE_FILTER                 (1 << 8)
+#define DS_MODE_INSTANT                        (1 << 9)
+#define DS_MODE_STRIG_MODE             (1 << 11)
+#define DS_MODE_STREAM_MODE            (1 << 12)
+#define DS_MODE_LPB_TEST               (1 << 13)
+#define DS_MODE_EXT_TEST               (1 << 14)
+#define DS_MODE_INT_TEST               (1 << 15)
+
 enum dslogic_operation_modes {
        DS_OP_NORMAL,
        DS_OP_INTERNAL_TEST,