]> sigrok.org Git - libsigrok.git/blobdiff - src/hardware/dreamsourcelab-dslogic/api.c
dreamsourcelab-dslogic: Fix incorrect default threshold setting.
[libsigrok.git] / src / hardware / dreamsourcelab-dslogic / api.c
index f7dd72565e608967a81465c59f7cd404ad7347af..66c810372efd583880697b1724820cff39ea1b15 100644 (file)
@@ -67,6 +67,14 @@ static const uint32_t devopts[] = {
        SR_CONF_CLOCK_EDGE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
 };
 
+static const int32_t trigger_matches[] = {
+       SR_TRIGGER_ZERO,
+       SR_TRIGGER_ONE,
+       SR_TRIGGER_RISING,
+       SR_TRIGGER_FALLING,
+       SR_TRIGGER_EDGE,
+};
+
 static const char *signal_edges[] = {
        [DS_EDGE_RISING] = "rising",
        [DS_EDGE_FALLING] = "falling",
@@ -352,7 +360,7 @@ static int dev_open(struct sr_dev_inst *sdi)
        }
 
        if (devc->cur_threshold == 0.0)
-               devc->cur_threshold = 1.5;
+               devc->cur_threshold = thresholds[1][0];
 
        return SR_OK;
 }
@@ -514,6 +522,9 @@ static int config_list(uint32_t key, GVariant **data,
        case SR_CONF_SAMPLERATE:
                *data = std_gvar_samplerates(devc->samplerates, devc->num_samplerates);
                break;
+       case SR_CONF_TRIGGER_MATCH:
+               *data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches));
+               break;
        case SR_CONF_CLOCK_EDGE:
                *data = g_variant_new_strv(ARRAY_AND_SIZE(signal_edges));
                break;