SR_PRIV const size_t samplerates_count = ARRAY_SIZE(samplerates);
-static const char sigma_firmware_files[][24] = {
- /* 50 MHz, supports 8 bit fractions */
- "asix-sigma-50.fw",
- /* 100 MHz */
- "asix-sigma-100.fw",
- /* 200 MHz */
- "asix-sigma-200.fw",
- /* Synchronous clock from pin */
- "asix-sigma-50sync.fw",
- /* Frequency counter */
- "asix-sigma-phasor.fw",
+static const char *firmware_files[] = {
+ "asix-sigma-50.fw", /* Up to 50MHz sample rate, 8bit divider. */
+ "asix-sigma-100.fw", /* 100MHz sample rate, fixed. */
+ "asix-sigma-200.fw", /* 200MHz sample rate, fixed. */
+ "asix-sigma-50sync.fw", /* Synchronous clock from external pin. */
+ "asix-sigma-phasor.fw", /* Frequency counter. */
};
+#define SIGMA_FIRMWARE_SIZE_LIMIT (256 * 1024)
+
static int sigma_read(void *buf, size_t size, struct dev_context *devc)
{
int ret;
int ret;
ret = ftdi_write_data(&devc->ftdic, (unsigned char *)buf, size);
- if (ret < 0) {
+ if (ret < 0)
sr_err("ftdi_write_data failed: %s",
ftdi_get_error_string(&devc->ftdic));
- } else if ((size_t) ret != size) {
+ else if ((size_t) ret != size)
sr_err("ftdi_write_data did not complete write.");
- }
return ret;
}
return sigma_read(data, len, devc);
}
-static uint8_t sigma_get_register(uint8_t reg, struct dev_context *devc)
-{
- uint8_t value;
-
- if (1 != sigma_read_register(reg, &value, 1, devc)) {
- sr_err("sigma_get_register: 1 byte expected");
- return 0;
- }
-
- return value;
-}
-
static int sigma_read_pos(uint32_t *stoppos, uint32_t *triggerpos,
struct dev_context *devc)
{
*triggerpos = result[0] | (result[1] << 8) | (result[2] << 16);
*stoppos = result[3] | (result[4] << 8) | (result[5] << 16);
- /* Not really sure why this must be done, but according to spec. */
+ /*
+ * These "position" values point to after the event (end of
+ * capture data, trigger condition matched). This is why they
+ * get decremented here. Sample memory consists of 512-byte
+ * chunks with meta data in the upper 64 bytes. Thus when the
+ * decrements takes us into this upper part of the chunk, then
+ * further move backwards to the end of the chunk's data part.
+ */
if ((--*stoppos & 0x1ff) == 0x1ff)
*stoppos -= 64;
-
- if ((*--triggerpos & 0x1ff) == 0x1ff)
+ if ((--*triggerpos & 0x1ff) == 0x1ff)
*triggerpos -= 64;
return 1;
int ret = SR_OK;
/* Retrieve the on-disk firmware file content. */
- firmware = sr_resource_load(ctx, SR_RESOURCE_FIRMWARE,
- name, &file_size, 256 * 1024);
+ firmware = sr_resource_load(ctx, SR_RESOURCE_FIRMWARE, name,
+ &file_size, SIGMA_FIRMWARE_SIZE_LIMIT);
if (!firmware)
return SR_ERR;
const char *firmware;
/* Avoid downloading the same firmware multiple times. */
- firmware = sigma_firmware_files[firmware_idx];
+ firmware = firmware_files[firmware_idx];
if (devc->cur_firmware == firmware_idx) {
sr_info("Not uploading firmware file '%s' again.", firmware);
return SR_OK;
if (match->match == SR_TRIGGER_ONE) {
devc->trigger.simplevalue |= channelbit;
devc->trigger.simplemask |= channelbit;
- }
- else if (match->match == SR_TRIGGER_ZERO) {
+ } else if (match->match == SR_TRIGGER_ZERO) {
devc->trigger.simplevalue &= ~channelbit;
devc->trigger.simplemask |= channelbit;
- }
- else if (match->match == SR_TRIGGER_FALLING) {
+ } else if (match->match == SR_TRIGGER_FALLING) {
devc->trigger.fallingmask |= channelbit;
trigger_set++;
- }
- else if (match->match == SR_TRIGGER_RISING) {
+ } else if (match->match == SR_TRIGGER_RISING) {
devc->trigger.risingmask |= channelbit;
trigger_set++;
}
return SR_OK;
}
-
/* Software trigger to determine exact trigger position. */
static int get_trigger_offset(uint8_t *samples, uint16_t last_sample,
struct sigma_trigger *t)
}
/* Only send trigger if explicitly enabled. */
- if (devc->use_triggers) {
- packet.type = SR_DF_TRIGGER;
- sr_session_send(sdi, &packet);
- }
+ if (devc->use_triggers)
+ std_session_send_df_trigger(sdi);
}
/*
devc = sdi->priv;
dl_events_in_line = 64 * 7;
- trg_line = ~0;
- trg_event = ~0;
-
- dram_line = g_try_malloc0(chunks_per_read * sizeof(*dram_line));
- if (!dram_line)
- return FALSE;
sr_info("Downloading sample data.");
+ devc->state.state = SIGMA_DOWNLOAD;
/*
* Ask the hardware to stop data acquisition. Reception of the
*/
sigma_set_register(WRITE_MODE, WMR_FORCESTOP | WMR_SDRAMWRITEEN, devc);
do {
- modestatus = sigma_get_register(READ_MODE, devc);
+ if (sigma_read_register(READ_MODE, &modestatus, 1, devc) != 1) {
+ sr_err("failed while waiting for RMR_POSTTRIGGERED bit");
+ return FALSE;
+ }
} while (!(modestatus & RMR_POSTTRIGGERED));
/* Set SDRAM Read Enable. */
sigma_read_pos(&stoppos, &triggerpos, devc);
/* Check if trigger has fired. */
- modestatus = sigma_get_register(READ_MODE, devc);
+ if (sigma_read_register(READ_MODE, &modestatus, 1, devc) != 1) {
+ sr_err("failed to read READ_MODE register");
+ return FALSE;
+ }
+ trg_line = ~0;
+ trg_event = ~0;
if (modestatus & RMR_TRIGGERED) {
trg_line = triggerpos >> 9;
trg_event = triggerpos & 0x1ff;
} else {
dl_first_line = 0;
}
+ dram_line = g_try_malloc0(chunks_per_read * sizeof(*dram_line));
+ if (!dram_line)
+ return FALSE;
dl_lines_done = 0;
while (dl_lines_total > dl_lines_done) {
/* We can download only up-to 32 DRAM lines in one go! */
dl_lines_done += dl_lines_curr;
}
+ g_free(dram_line);
std_session_send_df_end(sdi);
+ devc->state.state = SIGMA_IDLE;
sr_dev_acquisition_stop(sdi);
- g_free(dram_line);
-
return TRUE;
}
if (devc->state.state == SIGMA_IDLE)
return TRUE;
+ /*
+ * When the application has requested to stop the acquisition,
+ * then immediately start downloading sample data. Otherwise
+ * keep checking configured limits which will terminate the
+ * acquisition and initiate download.
+ */
+ if (devc->state.state == SIGMA_STOPPING)
+ return download_capture(sdi);
if (devc->state.state == SIGMA_CAPTURE)
return sigma_capture_mode(sdi);