#include "libsigrok.h"
#include "libsigrok-internal.h"
-/* Message logging helpers with driver-specific prefix string. */
-#define DRIVER_LOG_DOMAIN "output/vcd: "
-#define sr_log(l, s, args...) sr_log(l, DRIVER_LOG_DOMAIN s, ## args)
-#define sr_spew(s, args...) sr_spew(DRIVER_LOG_DOMAIN s, ## args)
-#define sr_dbg(s, args...) sr_dbg(DRIVER_LOG_DOMAIN s, ## args)
-#define sr_info(s, args...) sr_info(DRIVER_LOG_DOMAIN s, ## args)
-#define sr_warn(s, args...) sr_warn(DRIVER_LOG_DOMAIN s, ## args)
-#define sr_err(s, args...) sr_err(DRIVER_LOG_DOMAIN s, ## args)
+#define LOG_PREFIX "output/vcd"
struct context {
int num_enabled_probes;
uint8_t *prevsample;
int period;
uint64_t samplerate;
+ uint64_t samplecount;
unsigned int unitsize;
};
-static const char *vcd_header_comment = "\
-$comment\n Acquisition with %d/%d probes at %s\n$end\n";
+static const char *const vcd_header_comment =
+ "$comment\n Acquisition with %d/%d probes at %s\n$end\n";
static int init(struct sr_output *o)
{
for (l = o->sdi->probes; l; l = l->next) {
probe = l->data;
+ if (probe->type != SR_PROBE_LOGIC)
+ continue;
if (!probe->enabled)
continue;
ctx->probeindices = g_array_append_val(
g_string_append_printf(ctx->header, "$version %s %s $end\n",
PACKAGE, PACKAGE_VERSION);
- if (sr_config_get(o->sdi->driver, SR_CONF_SAMPLERATE, &gvar,
- o->sdi) == SR_OK) {
+ if (sr_config_get(o->sdi->driver, o->sdi, NULL, SR_CONF_SAMPLERATE,
+ &gvar) == SR_OK) {
ctx->samplerate = g_variant_get_uint64(gvar);
g_variant_unref(gvar);
if (!((samplerate_s = sr_samplerate_string(ctx->samplerate)))) {
/* Wires / channels */
for (i = 0, l = o->sdi->probes; l; l = l->next, i++) {
probe = l->data;
+ if (probe->type != SR_PROBE_LOGIC)
+ continue;
if (!probe->enabled)
continue;
g_string_append_printf(ctx->header, "$var wire 1 %c %s $end\n",
}
g_string_append(ctx->header, "$upscope $end\n"
- "$enddefinitions $end\n$dumpvars\n");
+ "$enddefinitions $end\n");
if (!(ctx->prevsample = g_try_malloc0(ctx->unitsize))) {
g_string_free(ctx->header, TRUE);
unsigned int i;
int p, curbit, prevbit, index;
uint8_t *sample;
- static uint64_t samplecount = 0;
+ gboolean timestamp_written;
(void)sdi;
*out = NULL;
if (!o || !o->internal)
- return SR_ERR_ARG;
+ return SR_ERR_BUG;
ctx = o->internal;
- if (packet->type == SR_DF_END) {
- *out = g_string_new("$dumpoff\n$end\n");
- return SR_OK;
- } else if (packet->type != SR_DF_LOGIC)
+ if (packet->type != SR_DF_LOGIC)
return SR_OK;
if (ctx->header) {
/* The header is still here, this must be the first packet. */
*out = ctx->header;
ctx->header = NULL;
+ ctx->samplecount = 0;
} else {
*out = g_string_sized_new(512);
}
logic = packet->payload;
for (i = 0; i <= logic->length - logic->unitsize; i += logic->unitsize) {
- samplecount++;
-
sample = logic->data + i;
+ timestamp_written = FALSE;
for (p = 0; p < ctx->num_enabled_probes; p++) {
index = g_array_index(ctx->probeindices, int, p);
- curbit = (sample[p / 8] & (((uint8_t) 1) << index)) >> index;
- prevbit = (ctx->prevsample[p / 8] & (((uint64_t) 1) << index)) >> index;
+
+ curbit = ((unsigned)sample[index / 8]
+ >> (index % 8)) & 1;
+ prevbit = ((unsigned)ctx->prevsample[index / 8]
+ >> (index % 8)) & 1;
/* VCD only contains deltas/changes of signals. */
- if (prevbit == curbit)
+ if (prevbit == curbit && ctx->samplecount > 0)
continue;
+ /* Output timestamp of subsequent signal changes. */
+ if (!timestamp_written)
+ g_string_append_printf(*out, "#%.0f",
+ (double)ctx->samplecount /
+ ctx->samplerate * ctx->period);
+
/* Output which signal changed to which value. */
- g_string_append_printf(*out, "#%" PRIu64 "\n%i%c\n",
- (uint64_t)(((float)samplecount / ctx->samplerate)
- * ctx->period), curbit, (char)('!' + p));
+ g_string_append_c(*out, ' ');
+ g_string_append_c(*out, '0' + curbit);
+ g_string_append_c(*out, '!' + p);
+
+ timestamp_written = TRUE;
}
+ if (timestamp_written)
+ g_string_append_c(*out, '\n');
+
+ ctx->samplecount++;
memcpy(ctx->prevsample, sample, ctx->unitsize);
}