Skip analog probes in logic-only output formats.

[libsigrok.git] / output / vcd.c

diff --git a/output/vcd.c b/output/vcd.c
index d89284927602a55d7a3e87beb5753b0d02e0cf07..44a12dec37a8c2e2265ea499d4410d61443d5ac3 100644 (file)
--- a/output/vcd.c
+++ b/output/vcd.c
@@ -26,14 +26,7 @@
 #include "libsigrok.h"
 #include "libsigrok-internal.h"
 
-/* Message logging helpers with driver-specific prefix string. */
-#define DRIVER_LOG_DOMAIN "output/vcd: "
-#define sr_log(l, s, args...) sr_log(l, DRIVER_LOG_DOMAIN s, ## args)
-#define sr_spew(s, args...) sr_spew(DRIVER_LOG_DOMAIN s, ## args)
-#define sr_dbg(s, args...) sr_dbg(DRIVER_LOG_DOMAIN s, ## args)
-#define sr_info(s, args...) sr_info(DRIVER_LOG_DOMAIN s, ## args)
-#define sr_warn(s, args...) sr_warn(DRIVER_LOG_DOMAIN s, ## args)
-#define sr_err(s, args...) sr_err(DRIVER_LOG_DOMAIN s, ## args)
+#define LOG_PREFIX "output/vcd"
 
 struct context {
        int num_enabled_probes;
@@ -69,6 +62,8 @@ static int init(struct sr_output *o)
 
        for (l = o->sdi->probes; l; l = l->next) {
                probe = l->data;
+               if (probe->type != SR_PROBE_LOGIC)
+                       continue;
                if (!probe->enabled)
                        continue;
                ctx->probeindices = g_array_append_val(
@@ -95,8 +90,8 @@ static int init(struct sr_output *o)
        g_string_append_printf(ctx->header, "$version %s %s $end\n",
                        PACKAGE, PACKAGE_VERSION);
 
-       if (sr_config_get(o->sdi->driver, SR_CONF_SAMPLERATE, &gvar,
-                       o->sdi) == SR_OK) {
+       if (sr_config_get(o->sdi->driver, o->sdi, NULL, SR_CONF_SAMPLERATE,
+                       &gvar) == SR_OK) {
                ctx->samplerate = g_variant_get_uint64(gvar);
                g_variant_unref(gvar);
                if (!((samplerate_s = sr_samplerate_string(ctx->samplerate)))) {
@@ -131,6 +126,8 @@ static int init(struct sr_output *o)
        /* Wires / channels */
        for (i = 0, l = o->sdi->probes; l; l = l->next, i++) {
                probe = l->data;
+               if (probe->type != SR_PROBE_LOGIC)
+                       continue;
                if (!probe->enabled)
                        continue;
                g_string_append_printf(ctx->header, "$var wire 1 %c %s $end\n",
@@ -190,7 +187,7 @@ static int receive(struct sr_output *o, const struct sr_dev_inst *sdi,
                for (p = 0; p < ctx->num_enabled_probes; p++) {
                        index = g_array_index(ctx->probeindices, int, p);
                        curbit = (sample[p / 8] & (((uint8_t) 1) << index)) >> index;
-                       prevbit = (ctx->prevsample[p / 8] & (((uint64_t) 1) << index)) >> index;
+                       prevbit = (ctx->prevsample[p / 8] & (((uint8_t) 1) << index)) >> index;
 
                        /* VCD only contains deltas/changes of signals. */
                        if (prevbit == curbit)