sysclk-lwla: Implement SR_CONF_CLOCK_EDGE setting.

[libsigrok.git] / hardware / sysclk-lwla / protocol.h

diff --git a/hardware/sysclk-lwla/protocol.h b/hardware/sysclk-lwla/protocol.h
index f8b64ac6515719d1ac9994b1b5c9cf1bb80e0062..61940be6668a5c9d14215cb388686512981327f7 100644 (file)
--- a/hardware/sysclk-lwla/protocol.h
+++ b/hardware/sysclk-lwla/protocol.h
@@ -41,6 +41,10 @@
 #define NUM_PROBES     34
 #define TRIGGER_TYPES  "01fr"
 
+/* Bit mask covering all 34 channels.
+ */
+#define ALL_CHANNELS_MASK (((uint64_t)1 << NUM_PROBES) - 1)
+
 /** Unit and packet size for the sigrok logic datafeed.
  */
 #define UNIT_SIZE      ((NUM_PROBES + 7) / 8)
@@ -65,21 +69,21 @@
  */
 #define READ_CHUNK_LEN (28 * 8)
 
-/** Calculate the required buffer size in 16-bit units for reading a given
+/** Calculate the required buffer size in 32-bit units for reading a given
  * number of device memory words.  Rounded to a multiple of 8 device words.
  */
-#define LWLA1034_MEMBUF_LEN(count) (((count) + 7) / 8 * 18)
+#define LWLA1034_MEMBUF_LEN(count) (((count) + 7) / 8 * 9)
 
 /** Maximum number of 16-bit words sent at a time during acquisition.
  * Used for allocating the libusb transfer buffer.
  */
 #define MAX_ACQ_SEND_WORDS     8 /* 5 for memory read request plus stuffing */
 
-/** Maximum number of 16-bit words received at a time during acquisition.
+/** Maximum number of 32-bit words received at a time during acquisition.
  * Round to the next multiple of the endpoint buffer size to avoid nasty
  * transfer overflow conditions on hiccups.
  */
-#define MAX_ACQ_RECV_WORDS     ((READ_CHUNK_LEN / 4 * 9 + 255) / 256 * 256)
+#define MAX_ACQ_RECV_LEN       ((READ_CHUNK_LEN / 8 * 9 + 127) / 128 * 128)
 
 /** Maximum length of a register write sequence.
  */
@@ -97,13 +101,34 @@
  */
 #define MAX_LIMIT_MSEC         (UINT64_C(1) << 32)
 
-/** LWLA clock sources.
+/** LWLA1034 FPGA clock configurations.
+ */
+enum clock_config {
+       CONF_CLOCK_NONE,
+       CONF_CLOCK_INT,
+       CONF_CLOCK_EXT_RISE,
+       CONF_CLOCK_EXT_FALL,
+};
+
+/** Available clock sources.
  */
 enum clock_source {
-       CLOCK_SOURCE_NONE,
-       CLOCK_SOURCE_INT,
-       CLOCK_SOURCE_EXT_RISE,
-       CLOCK_SOURCE_EXT_FALL,
+       CLOCK_INTERNAL,
+       CLOCK_EXT_CLK,
+};
+
+/** Available trigger sources.
+ */
+enum trigger_source {
+       TRIGGER_CHANNELS = 0,
+       TRIGGER_EXT_TRG,
+};
+
+/** Available edge choices for the external clock and trigger inputs.
+ */
+enum signal_edge {
+       EDGE_POSITIVE = 0,
+       EDGE_NEGATIVE,
 };
 
 /** LWLA device states.
@@ -170,9 +195,9 @@ struct acquisition_state {
        /** Whether to bypass the clock divider. */
        gboolean bypass_clockdiv;
 
-       /* Payload data buffers for outgoing and incoming transfers. */
+       /* Payload data buffers for incoming and outgoing transfers. */
+       uint32_t xfer_buf_in[MAX_ACQ_RECV_LEN];
        uint16_t xfer_buf_out[MAX_ACQ_SEND_WORDS];
-       uint16_t xfer_buf_in[MAX_ACQ_RECV_WORDS];
 
        /* Payload buffer for sigrok logic packets. */
        uint8_t out_packet[PACKET_LENGTH * UNIT_SIZE];
@@ -205,10 +230,18 @@ struct dev_context {
 
        enum device_state state;
 
-       /** The currently configured clock source of the device. */
-       enum clock_source cur_clock_source;
-       /** The clock source selected by the user. */
-       enum clock_source selected_clock_source;
+       /** The currently active clock configuration of the device. */
+       enum clock_config cur_clock_config;
+
+       /** Clock source configuration setting. */
+       enum clock_source cfg_clock_source;
+       /** Clock edge configuration setting. */
+       enum signal_edge cfg_clock_edge;
+
+       /** Trigger source configuration setting. */
+       enum trigger_source cfg_trigger_source;
+       /** Trigger slope configuration setting. */
+       enum signal_edge cfg_trigger_slope;
 
        /* Indicates that stopping the acquisition is currently in progress. */
        gboolean stopping_in_progress;
@@ -221,7 +254,7 @@ SR_PRIV struct acquisition_state *lwla_alloc_acquisition_state(void);
 SR_PRIV void lwla_free_acquisition_state(struct acquisition_state *acq);
 
 SR_PRIV int lwla_init_device(const struct sr_dev_inst *sdi);
-SR_PRIV int lwla_set_clock_source(const struct sr_dev_inst *sdi);
+SR_PRIV int lwla_set_clock_config(const struct sr_dev_inst *sdi);
 SR_PRIV int lwla_setup_acquisition(const struct sr_dev_inst *sdi);
 SR_PRIV int lwla_start_acquisition(const struct sr_dev_inst *sdi);
 SR_PRIV int lwla_abort_acquisition(const struct sr_dev_inst *sdi);