]> sigrok.org Git - libsigrok.git/blobdiff - hardware/sysclk-lwla/protocol.c
Add struct sr_session parameter to all session source backends.
[libsigrok.git] / hardware / sysclk-lwla / protocol.c
index 7bb1948d030c9b7a0bf60bbac1742a5eec65eeda..f1ae8b3d5d1fe1c1b146fa5d41ddb3eeb0f7ad50 100644 (file)
@@ -587,7 +587,7 @@ static void end_acquisition(struct sr_dev_inst *sdi)
        devc->state = STATE_IDLE;
 
        /* Remove USB file descriptors from polling. */
-       usb_source_remove(drvc->sr_ctx);
+       usb_source_remove(sdi->session, drvc->sr_ctx);
 
        packet.type = SR_DF_END;
        sr_session_send(sdi, &packet);
@@ -738,6 +738,55 @@ SR_PRIV int lwla_init_device(const struct sr_dev_inst *sdi)
        return ret;
 }
 
+SR_PRIV int lwla_convert_trigger(const struct sr_dev_inst *sdi)
+{
+       struct dev_context *devc;
+       struct sr_trigger *trigger;
+       struct sr_trigger_stage *stage;
+       struct sr_trigger_match *match;
+       const GSList *l, *m;
+       uint64_t channel_index;
+
+       devc = sdi->priv;
+
+       devc->trigger_mask = 0;
+       devc->trigger_values = 0;
+       devc->trigger_edge_mask = 0;
+
+       if (!(trigger = sr_session_trigger_get(sdi->session)))
+               return SR_OK;
+
+       if (g_slist_length(trigger->stages) > 1) {
+               sr_err("This device only supports 1 trigger stage.");
+               return SR_ERR;
+       }
+
+       for (l = trigger->stages; l; l = l->next) {
+               stage = l->data;
+               for (m = stage->matches; m; m = m->next) {
+                       match = m->data;
+                       if (!match->channel->enabled)
+                               /* Ignore disabled channels with a trigger. */
+                               continue;
+                       channel_index = 1 << match->channel->index;
+                       devc->trigger_mask |= channel_index;
+                       switch (match->match) {
+                       case SR_TRIGGER_ONE:
+                               devc->trigger_values |= channel_index;
+                               break;
+                       case SR_TRIGGER_RISING:
+                               devc->trigger_values |= channel_index;
+                               /* Fall through for edge mask. */
+                       case SR_TRIGGER_FALLING:
+                               devc->trigger_edge_mask |= channel_index;
+                               break;
+                       }
+               }
+       }
+
+       return SR_OK;
+}
+
 /* Select the LWLA clock configuration.  If the clock source changed from
  * the previous setting, this will download a new bitstream to the FPGA.
  */