]> sigrok.org Git - libsigrok.git/blobdiff - hardware/rigol-ds/api.c
rigol-ds: Add support for Agilent DSO1014A.
[libsigrok.git] / hardware / rigol-ds / api.c
index f18271e0804506ba07300daf892a6f5287e7e0ca..cdd9e0ff0d548a74f07ae2a4ed13140d7df2ae8d 100644 (file)
@@ -154,26 +154,31 @@ static const char *data_sources[] = {
  * name, series, protocol flavor, min timebase, max timebase, min vdiv,
  * digital channels, number of horizontal divs
  */
+
+#define RIGOL "Rigol Technologies"
+#define AGILENT "Agilent Technologies"
+
 static const struct rigol_ds_model supported_models[] = {
-       {"DS1052E", RIGOL_DS1000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, false, 12},
-       {"DS1102E", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, false, 12},
-       {"DS1152E", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, false, 12},
-       {"DS1052D", RIGOL_DS1000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, true, 12},
-       {"DS1102D", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, true, 12},
-       {"DS1152D", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, true, 12},
-       {"DS2072", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, false, 14},
-       {"DS2102", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, false, 14},
-       {"DS2202", RIGOL_DS2000, PROTOCOL_IEEE488_2, {2, 1000000000}, {500, 1}, {500, 1000000}, false, 14},
-       {"VS5022", RIGOL_VS5000, PROTOCOL_LEGACY, {20, 1000000000}, {50, 1}, {2, 1000}, false, 14},
-       {"VS5022D", RIGOL_VS5000, PROTOCOL_LEGACY, {20, 1000000000}, {50, 1}, {2, 1000}, true, 14},
-       {"VS5042", RIGOL_VS5000, PROTOCOL_LEGACY, {10, 1000000000}, {50, 1}, {2, 1000}, false, 14},
-       {"VS5042D", RIGOL_VS5000, PROTOCOL_LEGACY, {10, 1000000000}, {50, 1}, {2, 1000}, true, 14},
-       {"VS5062", RIGOL_VS5000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, false, 14},
-       {"VS5062D", RIGOL_VS5000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, true, 14},
-       {"VS5102", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, false, 14},
-       {"VS5102D", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, true, 14},
-       {"VS5202", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, false, 14},
-       {"VS5202D", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, true, 14},
+       {RIGOL, "DS1052E", RIGOL_DS1000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, false, 12},
+       {RIGOL, "DS1102E", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, false, 12},
+       {RIGOL, "DS1152E", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, false, 12},
+       {RIGOL, "DS1052D", RIGOL_DS1000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, true, 12},
+       {RIGOL, "DS1102D", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, true, 12},
+       {RIGOL, "DS1152D", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, true, 12},
+       {RIGOL, "DS2072", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, false, 14},
+       {RIGOL, "DS2102", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, false, 14},
+       {RIGOL, "DS2202", RIGOL_DS2000, PROTOCOL_IEEE488_2, {2, 1000000000}, {500, 1}, {500, 1000000}, false, 14},
+       {RIGOL, "VS5022", RIGOL_VS5000, PROTOCOL_LEGACY, {20, 1000000000}, {50, 1}, {2, 1000}, false, 14},
+       {RIGOL, "VS5022D", RIGOL_VS5000, PROTOCOL_LEGACY, {20, 1000000000}, {50, 1}, {2, 1000}, true, 14},
+       {RIGOL, "VS5042", RIGOL_VS5000, PROTOCOL_LEGACY, {10, 1000000000}, {50, 1}, {2, 1000}, false, 14},
+       {RIGOL, "VS5042D", RIGOL_VS5000, PROTOCOL_LEGACY, {10, 1000000000}, {50, 1}, {2, 1000}, true, 14},
+       {RIGOL, "VS5062", RIGOL_VS5000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, false, 14},
+       {RIGOL, "VS5062D", RIGOL_VS5000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, true, 14},
+       {RIGOL, "VS5102", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, false, 14},
+       {RIGOL, "VS5102D", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, true, 14},
+       {RIGOL, "VS5202", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, false, 14},
+       {RIGOL, "VS5202D", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, true, 14},
+       {AGILENT, "DSO1014A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, false, 12},
 };
 
 SR_PRIV struct sr_dev_driver rigol_ds_driver_info;
@@ -266,6 +271,7 @@ static int probe_port(const char *resource, const char *serialcomm, GSList **dev
        }
 
        if (sr_scpi_open(scpi) != SR_OK) {
+               sr_info("Couldn't open SCPI device.");
                sr_scpi_free(scpi);
                return SR_ERR;
        };
@@ -277,15 +283,9 @@ static int probe_port(const char *resource, const char *serialcomm, GSList **dev
                return SR_ERR;
        }
 
-       if (strcasecmp(hw_info->manufacturer, "Rigol Technologies")) {
-               sr_scpi_hw_info_free(hw_info);
-               sr_scpi_close(scpi);
-               sr_scpi_free(scpi);
-               return SR_ERR_NA;
-       }
-
        for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
-               if (!strcmp(hw_info->model, supported_models[i].name)) {
+               if (!strcasecmp(hw_info->manufacturer, supported_models[i].vendor) &&
+                               !strcmp(hw_info->model, supported_models[i].name)) {
                        model = &supported_models[i];
                        break;
                }
@@ -782,7 +782,6 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
        struct dev_context *devc;
        struct sr_probe *probe;
        GSList *l;
-       char cmd[256];
 
        if (sdi->status != SR_ST_ACTIVE)
                return SR_ERR_DEV_CLOSED;
@@ -799,9 +798,8 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
                                                devc->enabled_analog_probes, probe);
                        if (probe->enabled != devc->analog_channels[probe->index]) {
                                /* Enabled channel is currently disabled, or vice versa. */
-                               sprintf(cmd, ":CHAN%d:DISP %s", probe->index + 1,
-                                               probe->enabled ? "ON" : "OFF");
-                               if (sr_scpi_send(sdi->conn, cmd) != SR_OK)
+                               if (set_cfg(sdi, ":CHAN%d:DISP %s", probe->index + 1,
+                                               probe->enabled ? "ON" : "OFF") != SR_OK)
                                        return SR_ERR;
                        }
                } else if (probe->type == SR_PROBE_LOGIC) {
@@ -810,9 +808,8 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
                                                devc->enabled_digital_probes, probe);
                        if (probe->enabled != devc->digital_channels[probe->index]) {
                                /* Enabled channel is currently disabled, or vice versa. */
-                               sprintf(cmd, ":DIG%d:TURN %s", probe->index,
-                                               probe->enabled ? "ON" : "OFF");
-                               if (sr_scpi_send(sdi->conn, cmd) != SR_OK)
+                               if (set_cfg(sdi, ":DIG%d:TURN %s", probe->index,
+                                               probe->enabled ? "ON" : "OFF") != SR_OK)
                                        return SR_ERR;
                        }
                }
@@ -822,7 +819,7 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
                return SR_ERR;
 
        if (devc->data_source == DATA_SOURCE_LIVE) {
-               if (sr_scpi_send(sdi->conn, ":RUN") != SR_OK)
+               if (set_cfg(sdi, ":RUN") != SR_OK)
                        return SR_ERR;
        } else if (devc->data_source == DATA_SOURCE_MEMORY) {
                if (devc->model->series != RIGOL_DS2000) {
@@ -840,7 +837,9 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
        std_session_send_df_header(cb_data, LOG_PREFIX);
 
        if (devc->model->protocol == PROTOCOL_LEGACY) {
-               devc->analog_frame_size = DS1000_ANALOG_LIVE_WAVEFORM_SIZE;
+               devc->analog_frame_size = (devc->model->series == RIGOL_VS5000 ?
+                               VS5000_ANALOG_LIVE_WAVEFORM_SIZE :
+                               DS1000_ANALOG_LIVE_WAVEFORM_SIZE);
                /* Fetch the first frame. */
                if (devc->enabled_analog_probes)
                        devc->channel = devc->enabled_analog_probes->data;
@@ -859,11 +858,11 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
                                /* Apparently for the DS2000 the memory
                                 * depth can only be set in Running state -
                                 * this matches the behaviour of the UI. */
-                               if (sr_scpi_send(sdi->conn, ":RUN") != SR_OK)
+                               if (set_cfg(sdi, ":RUN") != SR_OK)
                                        return SR_ERR;
-                               if (sr_scpi_send(sdi->conn, "ACQ:MDEP %d", devc->analog_frame_size) != SR_OK)
+                               if (set_cfg(sdi, "ACQ:MDEP %d", devc->analog_frame_size) != SR_OK)
                                        return SR_ERR;
-                               if (sr_scpi_send(sdi->conn, ":STOP") != SR_OK)
+                               if (set_cfg(sdi, ":STOP") != SR_OK)
                                        return SR_ERR;
                        } else
                                devc->analog_frame_size = DS2000_ANALOG_LIVE_WAVEFORM_SIZE;