static const int32_t hwopts[] = {
SR_CONF_CONN,
+ SR_CONF_SERIALCOMM
};
static const int32_t hwcaps[] = {
SR_CONF_TRIGGER_SLOPE,
SR_CONF_HORIZ_TRIGGERPOS,
SR_CONF_NUM_TIMEBASE,
+ SR_CONF_LIMIT_FRAMES,
+ SR_CONF_SAMPLERATE,
};
static const int32_t analog_hwcaps[] = {
SR_CONF_NUM_VDIV,
SR_CONF_VDIV,
SR_CONF_COUPLING,
+ SR_CONF_DATA_SOURCE,
};
static const uint64_t timebases[][2] = {
static const char *trigger_sources[] = {
"CH1",
"CH2",
+ "CH3",
+ "CH4",
"EXT",
"AC Line",
"D0",
"GND",
};
-/* name, series, min timebase, max timebase, min vdiv, digital channels */
+/* Do not change the order of entries */
+static const char *data_sources[] = {
+ "Live",
+ "Memory",
+ "Segmented",
+};
+
+/*
+ * name, series, protocol flavor, min timebase, max timebase, min vdiv,
+ * digital channels, number of horizontal divs
+ */
+
+#define RIGOL "Rigol Technologies"
+#define AGILENT "Agilent Technologies"
+
static const struct rigol_ds_model supported_models[] = {
- {"DS1052E", 1, {5, 1000000000}, {50, 1}, {2, 1000}, false},
- {"DS1102E", 1, {2, 1000000000}, {50, 1}, {2, 1000}, false},
- {"DS1152E", 1, {2, 1000000000}, {50, 1}, {2, 1000}, false},
- {"DS1052D", 1, {5, 1000000000}, {50, 1}, {2, 1000}, true},
- {"DS1102D", 1, {2, 1000000000}, {50, 1}, {2, 1000}, true},
- {"DS1152D", 1, {2, 1000000000}, {50, 1}, {2, 1000}, true},
- {"DS2072", 2, {5, 1000000000}, {500, 1}, {500, 1000000}, false},
- {"DS2102", 2, {5, 1000000000}, {500, 1}, {500, 1000000}, false},
- {"DS2202", 2, {2, 1000000000}, {500, 1}, {500, 1000000}, false},
+ {RIGOL, "DS1052E", RIGOL_DS1000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
+ {RIGOL, "DS1102E", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
+ {RIGOL, "DS1152E", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
+ {RIGOL, "DS1052D", RIGOL_DS1000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12},
+ {RIGOL, "DS1102D", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12},
+ {RIGOL, "DS1152D", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12},
+ {RIGOL, "DS2072", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14},
+ {RIGOL, "DS2102", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14},
+ {RIGOL, "DS2202", RIGOL_DS2000, PROTOCOL_IEEE488_2, {2, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14},
+ {RIGOL, "DS2302", RIGOL_DS2000, PROTOCOL_IEEE488_2, {1, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
+ {RIGOL, "DS2072A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
+ {RIGOL, "DS2102A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
+ {RIGOL, "DS2202A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {2, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
+ {RIGOL, "DS2302A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {1, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
+ {RIGOL, "VS5022", RIGOL_VS5000, PROTOCOL_LEGACY, {20, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
+ {RIGOL, "VS5022D", RIGOL_VS5000, PROTOCOL_LEGACY, {20, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
+ {RIGOL, "VS5042", RIGOL_VS5000, PROTOCOL_LEGACY, {10, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
+ {RIGOL, "VS5042D", RIGOL_VS5000, PROTOCOL_LEGACY, {10, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
+ {RIGOL, "VS5062", RIGOL_VS5000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
+ {RIGOL, "VS5062D", RIGOL_VS5000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
+ {RIGOL, "VS5102", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
+ {RIGOL, "VS5102D", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
+ {RIGOL, "VS5202", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
+ {RIGOL, "VS5202D", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
+ {AGILENT, "DSO1002A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
+ {AGILENT, "DSO1004A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 4, false, 12},
+ {AGILENT, "DSO1012A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
+ {AGILENT, "DSO1014A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 4, false, 12},
+ {AGILENT, "DSO1022A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
+ {AGILENT, "DSO1024A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 4, false, 12},
};
SR_PRIV struct sr_dev_driver rigol_ds_driver_info;
struct dev_context *devc;
devc = priv;
+ g_free(devc->data);
+ g_free(devc->buffer);
g_free(devc->coupling[0]);
g_free(devc->coupling[1]);
g_free(devc->trigger_source);
static int set_cfg(const struct sr_dev_inst *sdi, const char *format, ...)
{
va_list args;
- char buf[256];
+ int ret;
va_start(args, format);
- vsnprintf(buf, 255, format, args);
+ ret = sr_scpi_send_variadic(sdi->conn, format, args);
va_end(args);
- if (rigol_ds_send(sdi, buf) != SR_OK)
+
+ if (ret != SR_OK)
return SR_ERR;
/* When setting a bunch of parameters in a row, the DS1052E scrambles
return std_init(sr_ctx, di, LOG_PREFIX);
}
-static int probe_port(const char *port, GSList **devices)
+static int probe_port(const char *resource, const char *serialcomm, GSList **devices)
{
struct dev_context *devc;
struct sr_dev_inst *sdi;
- struct sr_serial_dev_inst *serial;
+ struct sr_scpi_dev_inst *scpi;
+ struct sr_scpi_hw_info *hw_info;
struct sr_probe *probe;
unsigned int i;
- int len, num_tokens;
- const char *manufacturer, *model_name, *version;
const struct rigol_ds_model *model = NULL;
- char buf[256];
- gchar **tokens, *channel_name;
+ gchar *channel_name;
*devices = NULL;
- if (!(serial = sr_serial_dev_inst_new(port, NULL)))
- return SR_ERR_MALLOC;
- if (serial_open(serial, SERIAL_RDWR) != SR_OK)
+ if (!(scpi = scpi_dev_inst_new(resource, serialcomm)))
return SR_ERR;
- len = serial_write(serial, "*IDN?", 5);
- len = serial_read(serial, buf, sizeof(buf));
- if (serial_close(serial) != SR_OK)
- return SR_ERR;
-
- sr_serial_dev_inst_free(serial);
-
- if (len == 0)
- return SR_ERR_NA;
- buf[len] = 0;
- tokens = g_strsplit(buf, ",", 0);
- sr_dbg("response: %s [%s]", port, buf);
-
- for (num_tokens = 0; tokens[num_tokens] != NULL; num_tokens++);
-
- if (num_tokens < 4) {
- g_strfreev(tokens);
- return SR_ERR_NA;
- }
-
- manufacturer = tokens[0];
- model_name = tokens[1];
- version = tokens[3];
+ if (sr_scpi_open(scpi) != SR_OK) {
+ sr_info("Couldn't open SCPI device.");
+ sr_scpi_free(scpi);
+ return SR_ERR;
+ };
- if (strcasecmp(manufacturer, "Rigol Technologies")) {
- g_strfreev(tokens);
- return SR_ERR_NA;
+ if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
+ sr_info("Couldn't get IDN response.");
+ sr_scpi_close(scpi);
+ sr_scpi_free(scpi);
+ return SR_ERR;
}
for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
- if (!strcmp(model_name, supported_models[i].name)) {
+ if (!strcasecmp(hw_info->manufacturer, supported_models[i].vendor) &&
+ !strcmp(hw_info->model, supported_models[i].name)) {
model = &supported_models[i];
break;
}
}
if (!model || !(sdi = sr_dev_inst_new(0, SR_ST_ACTIVE,
- manufacturer, model_name, version))) {
- g_strfreev(tokens);
+ hw_info->manufacturer, hw_info->model,
+ hw_info->firmware_version))) {
+ sr_scpi_hw_info_free(hw_info);
+ sr_scpi_close(scpi);
+ sr_scpi_free(scpi);
return SR_ERR_NA;
}
- g_strfreev(tokens);
+ sr_scpi_hw_info_free(hw_info);
+ sr_scpi_close(scpi);
+
+ sdi->conn = scpi;
- if (!(sdi->conn = sr_serial_dev_inst_new(port, NULL)))
- return SR_ERR_MALLOC;
sdi->driver = di;
- sdi->inst_type = SR_INST_SERIAL;
+ sdi->inst_type = SR_INST_SCPI;
if (!(devc = g_try_malloc0(sizeof(struct dev_context))))
return SR_ERR_MALLOC;
+
devc->limit_frames = 0;
devc->model = model;
- for (i = 0; i < 2; i++) {
- channel_name = (i == 0 ? "CH1" : "CH2");
- if (!(probe = sr_probe_new(i, SR_PROBE_ANALOG, TRUE, channel_name)))
+ for (i = 0; i < model->analog_channels; i++) {
+ if (!(channel_name = g_strdup_printf("CH%d", i + 1)))
return SR_ERR_MALLOC;
+ probe = sr_probe_new(i, SR_PROBE_ANALOG, TRUE, channel_name);
sdi->probes = g_slist_append(sdi->probes, probe);
devc->analog_groups[i].name = channel_name;
devc->analog_groups[i].probes = g_slist_append(NULL, probe);
sdi->probes = g_slist_append(sdi->probes, probe);
devc->digital_group.probes = g_slist_append(
devc->digital_group.probes, probe);
- devc->digital_group.name = "LA";
- sdi->probe_groups = g_slist_append(sdi->probe_groups,
- &devc->digital_group);
}
+ devc->digital_group.name = "LA";
+ sdi->probe_groups = g_slist_append(sdi->probe_groups,
+ &devc->digital_group);
}
for (i = 0; i < NUM_TIMEBASE; i++) {
devc->num_timebases = &timebases[i] - devc->timebases + 1;
}
- for (i = 0; i < NUM_VDIV; i++) {
- if (!memcmp(&devc->model->min_vdiv, &vdivs[i], sizeof(uint64_t[2]))) {
- devc->vdivs = &timebases[i];
- devc->num_vdivs = NUM_VDIV - (&timebases[i] - &timebases[0]);
- }
- }
+ for (i = 0; i < NUM_VDIV; i++)
+ if (!memcmp(&devc->model->min_vdiv, &vdivs[i], sizeof(uint64_t[2])))
+ devc->vdivs = &vdivs[i];
+
+ if (!(devc->buffer = g_try_malloc(ACQ_BUFFER_SIZE)))
+ return SR_ERR_MALLOC;
+ if (!(devc->data = g_try_malloc(ACQ_BUFFER_SIZE * sizeof(float))))
+ return SR_ERR_MALLOC;
+
+ devc->data_source = DATA_SOURCE_LIVE;
sdi->priv = devc;
int ret;
const gchar *dev_name;
gchar *port = NULL;
+ gchar *serialcomm = NULL;
drvc = di->priv;
for (l = options; l; l = l->next) {
src = l->data;
- if (src->key == SR_CONF_CONN) {
+ switch (src->key) {
+ case SR_CONF_CONN:
port = (char *)g_variant_get_string(src->data, NULL);
break;
+ case SR_CONF_SERIALCOMM:
+ serialcomm = (char *)g_variant_get_string(src->data, NULL);
+ break;
}
}
devices = NULL;
if (port) {
- if (probe_port(port, &devices) == SR_ERR_MALLOC)
+ if (probe_port(port, serialcomm, &devices) == SR_ERR_MALLOC) {
+ g_free(port);
+ if (serialcomm)
+ g_free(serialcomm);
return NULL;
+ }
} else {
if (!(dir = g_dir_open("/sys/class/usbmisc/", 0, NULL)))
if (!(dir = g_dir_open("/sys/class/usb/", 0, NULL)))
if (strncmp(dev_name, "usbtmc", 6))
continue;
port = g_strconcat("/dev/", dev_name, NULL);
- ret = probe_port(port, &devices);
+ ret = probe_port(port, serialcomm, &devices);
g_free(port);
+ if (serialcomm)
+ g_free(serialcomm);
if (ret == SR_ERR_MALLOC) {
g_dir_close(dir);
return NULL;
static int dev_open(struct sr_dev_inst *sdi)
{
+ struct sr_scpi_dev_inst *scpi = sdi->conn;
- if (serial_open(sdi->conn, SERIAL_RDWR) != SR_OK)
+ if (sr_scpi_open(scpi) < 0)
return SR_ERR;
if (rigol_ds_get_dev_cfg(sdi) != SR_OK)
static int dev_close(struct sr_dev_inst *sdi)
{
- struct sr_serial_dev_inst *serial;
+ struct sr_scpi_dev_inst *scpi;
- serial = sdi->conn;
- if (serial && serial->fd != -1) {
- serial_close(serial);
+ scpi = sdi->conn;
+
+ if (scpi) {
+ if (sr_scpi_close(scpi) < 0)
+ return SR_ERR;
sdi->status = SR_ST_INACTIVE;
}
return dev_clear();
}
+static int analog_frame_size(const struct sr_dev_inst *sdi)
+{
+ struct dev_context *devc = sdi->priv;
+ struct sr_probe *probe;
+ int analog_probes = 0;
+ GSList *l;
+
+ if (devc->model->protocol == PROTOCOL_LEGACY) {
+ if (devc->model->series == RIGOL_VS5000)
+ return VS5000_ANALOG_LIVE_WAVEFORM_SIZE;
+ else
+ return DS1000_ANALOG_LIVE_WAVEFORM_SIZE;
+ } else {
+ for (l = sdi->probes; l; l = l->next) {
+ probe = l->data;
+ if (probe->type == SR_PROBE_ANALOG && probe->enabled)
+ analog_probes++;
+ }
+ if (devc->data_source == DATA_SOURCE_MEMORY) {
+ if (analog_probes == 1)
+ return DS2000_ANALOG_MEM_WAVEFORM_SIZE_1C;
+ else
+ return DS2000_ANALOG_MEM_WAVEFORM_SIZE_2C;
+ } else {
+ if (devc->model->series == AGILENT_DSO1000)
+ return DSO1000_ANALOG_LIVE_WAVEFORM_SIZE;
+ else
+ return DS2000_ANALOG_LIVE_WAVEFORM_SIZE;
+ }
+ }
+}
+
+static int digital_frame_size(const struct sr_dev_inst *sdi)
+{
+ struct dev_context *devc = sdi->priv;
+
+ switch (devc->model->series) {
+ case RIGOL_VS5000:
+ return VS5000_DIGITAL_WAVEFORM_SIZE;
+ case RIGOL_DS1000:
+ return DS1000_DIGITAL_WAVEFORM_SIZE;
+ default:
+ return 0;
+ }
+}
+
static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
const struct sr_probe_group *probe_group)
{
struct dev_context *devc;
- unsigned int i;
+ uint64_t samplerate;
if (!sdi || !(devc = sdi->priv))
return SR_ERR_ARG;
/* If a probe group is specified, it must be a valid one. */
- if (probe_group) {
- if (probe_group != &devc->analog_groups[0]
- && probe_group != &devc->analog_groups[1]) {
- sr_err("Invalid probe group specified.");
- return SR_ERR;
- }
+ if (probe_group && !g_slist_find(sdi->probe_groups, probe_group)) {
+ sr_err("Invalid probe group specified.");
+ return SR_ERR;
}
switch (id) {
case SR_CONF_NUM_TIMEBASE:
- *data = g_variant_new_int32(devc->num_timebases);
+ *data = g_variant_new_int32(devc->model->num_horizontal_divs);
break;
case SR_CONF_NUM_VDIV:
- if (!probe_group) {
- sr_err("No probe group specified.");
- return SR_ERR_PROBE_GROUP;
- }
- for (i = 0; i < 2; i++) {
- if (probe_group == &devc->analog_groups[i]) {
- *data = g_variant_new_int32(devc->num_vdivs);
- return SR_OK;
- }
+ *data = g_variant_new_int32(8);
+ case SR_CONF_DATA_SOURCE:
+ if (devc->data_source == DATA_SOURCE_LIVE)
+ *data = g_variant_new_string("Live");
+ else if (devc->data_source == DATA_SOURCE_MEMORY)
+ *data = g_variant_new_string("Memory");
+ else
+ *data = g_variant_new_string("Segmented");
+ break;
+ case SR_CONF_SAMPLERATE:
+ if (devc->data_source == DATA_SOURCE_LIVE) {
+ samplerate = analog_frame_size(sdi) /
+ (devc->timebase * devc->model->num_horizontal_divs);
+ *data = g_variant_new_uint64(samplerate);
+ } else {
+ return SR_ERR_NA;
}
- return SR_ERR_NA;
+ break;
default:
return SR_ERR_NA;
}
return SR_ERR_DEV_CLOSED;
/* If a probe group is specified, it must be a valid one. */
- if (probe_group) {
- if (probe_group != &devc->analog_groups[0]
- && probe_group != &devc->analog_groups[1]) {
- sr_err("Invalid probe group specified.");
- return SR_ERR;
- }
+ if (probe_group && !g_slist_find(sdi->probe_groups, probe_group)) {
+ sr_err("Invalid probe group specified.");
+ return SR_ERR;
}
ret = SR_OK;
tmp_str = "CHAN1";
else if (!strcmp(devc->trigger_source, "CH2"))
tmp_str = "CHAN2";
+ else if (!strcmp(devc->trigger_source, "CH3"))
+ tmp_str = "CHAN3";
+ else if (!strcmp(devc->trigger_source, "CH4"))
+ tmp_str = "CHAN4";
else
tmp_str = (char *)devc->trigger_source;
ret = set_cfg(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
}
}
return SR_ERR_NA;
+ case SR_CONF_DATA_SOURCE:
+ tmp_str = g_variant_get_string(data, NULL);
+ if (!strcmp(tmp_str, "Live"))
+ devc->data_source = DATA_SOURCE_LIVE;
+ else if (!strcmp(tmp_str, "Memory"))
+ devc->data_source = DATA_SOURCE_MEMORY;
+ else if (devc->model->protocol == PROTOCOL_IEEE488_2
+ && !strcmp(tmp_str, "Segmented"))
+ devc->data_source = DATA_SOURCE_SEGMENTED;
+ else
+ return SR_ERR;
+ break;
default:
ret = SR_ERR_NA;
break;
}
switch (key) {
- break;
case SR_CONF_DEVICE_OPTIONS:
if (!probe_group) {
sr_err("No probe group specified.");
return SR_ERR_PROBE_GROUP;
}
g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
- for (i = 0; i < devc->num_vdivs; i++) {
+ for (i = 0; i < NUM_VDIV; i++) {
rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
tuple = g_variant_new_tuple(rational, 2);
if (!devc)
/* Can't know this until we have the exact model. */
return SR_ERR_ARG;
+ if (devc->num_timebases <= 0)
+ return SR_ERR_NA;
g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
for (i = 0; i < devc->num_timebases; i++) {
rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
*data = g_variant_new_strv(trigger_sources,
devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
break;
+ case SR_CONF_DATA_SOURCE:
+ if (!devc)
+ /* Can't know this until we have the exact model. */
+ return SR_ERR_ARG;
+ /* This needs tweaking by series/model! */
+ if (devc->model->series == RIGOL_DS2000)
+ *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
+ else
+ *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
+ break;
default:
return SR_ERR_NA;
}
static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
{
- struct sr_serial_dev_inst *serial;
+ struct sr_scpi_dev_inst *scpi;
struct dev_context *devc;
struct sr_probe *probe;
GSList *l;
- char cmd[256];
if (sdi->status != SR_ST_ACTIVE)
return SR_ERR_DEV_CLOSED;
- serial = sdi->conn;
+ scpi = sdi->conn;
devc = sdi->priv;
+ devc->num_frames = 0;
+
for (l = sdi->probes; l; l = l->next) {
probe = l->data;
sr_dbg("handling probe %s", probe->name);
devc->enabled_analog_probes, probe);
if (probe->enabled != devc->analog_channels[probe->index]) {
/* Enabled channel is currently disabled, or vice versa. */
- sprintf(cmd, ":CHAN%d:DISP %s", probe->index + 1,
- probe->enabled ? "ON" : "OFF");
- if (rigol_ds_send(sdi, cmd) != SR_OK)
+ if (set_cfg(sdi, ":CHAN%d:DISP %s", probe->index + 1,
+ probe->enabled ? "ON" : "OFF") != SR_OK)
return SR_ERR;
+ devc->analog_channels[probe->index] = probe->enabled;
}
} else if (probe->type == SR_PROBE_LOGIC) {
- if (probe->enabled)
+ if (probe->enabled) {
devc->enabled_digital_probes = g_slist_append(
devc->enabled_digital_probes, probe);
+ /* Turn on LA module if currently off. */
+ if (!devc->la_enabled) {
+ if (set_cfg(sdi, ":LA:DISP ON") != SR_OK)
+ return SR_ERR;
+ devc->la_enabled = TRUE;
+ }
+ }
if (probe->enabled != devc->digital_channels[probe->index]) {
/* Enabled channel is currently disabled, or vice versa. */
- sprintf(cmd, ":DIG%d:TURN %s", probe->index,
- probe->enabled ? "ON" : "OFF");
- if (rigol_ds_send(sdi, cmd) != SR_OK)
+ if (set_cfg(sdi, ":DIG%d:TURN %s", probe->index,
+ probe->enabled ? "ON" : "OFF") != SR_OK)
return SR_ERR;
+ devc->digital_channels[probe->index] = probe->enabled;
}
}
}
+
if (!devc->enabled_analog_probes && !devc->enabled_digital_probes)
return SR_ERR;
- sr_source_add(serial->fd, G_IO_IN, 50, rigol_ds_receive, (void *)sdi);
+ /* Turn off LA module if on and no digital probes selected. */
+ if (devc->la_enabled && !devc->enabled_digital_probes)
+ if (set_cfg(sdi, ":LA:DISP OFF") != SR_OK)
+ return SR_ERR;
+
+ if (devc->data_source == DATA_SOURCE_LIVE) {
+ if (set_cfg(sdi, ":RUN") != SR_OK)
+ return SR_ERR;
+ } else if (devc->data_source == DATA_SOURCE_MEMORY) {
+ if (devc->model->series != RIGOL_DS2000) {
+ sr_err("Data source 'Memory' not supported for this device");
+ return SR_ERR;
+ }
+ } else if (devc->data_source == DATA_SOURCE_SEGMENTED) {
+ sr_err("Data source 'Segmented' not yet supported");
+ return SR_ERR;
+ }
+
+ sr_scpi_source_add(scpi, G_IO_IN, 50, rigol_ds_receive, (void *)sdi);
/* Send header packet to the session bus. */
std_session_send_df_header(cb_data, LOG_PREFIX);
- if (devc->model->series == 1) {
- /* Fetch the first frame. */
- if (devc->enabled_analog_probes) {
- devc->channel_frame = devc->enabled_analog_probes->data;
- if (rigol_ds_send(sdi, ":WAV:DATA? CHAN%d",
- devc->channel_frame->index + 1) != SR_OK)
- return SR_ERR;
- } else {
- devc->channel_frame = devc->enabled_digital_probes->data;
- if (rigol_ds_send(sdi, ":WAV:DATA? DIG") != SR_OK)
- return SR_ERR;
- }
+ if (devc->enabled_analog_probes)
+ devc->channel_entry = devc->enabled_analog_probes;
+ else
+ devc->channel_entry = devc->enabled_digital_probes;
+
+ devc->analog_frame_size = analog_frame_size(sdi);
+ devc->digital_frame_size = digital_frame_size(sdi);
- devc->num_frame_bytes = 0;
+ if (devc->model->protocol == PROTOCOL_LEGACY) {
+ /* Fetch the first frame. */
+ if (rigol_ds_channel_start(sdi) != SR_OK)
+ return SR_ERR;
} else {
if (devc->enabled_analog_probes) {
- /* Assume there already was a trigger event - don't wait */
- if (rigol_ds2xx2_acquisition_start(sdi, FALSE) != SR_OK)
+ if (devc->data_source == DATA_SOURCE_MEMORY) {
+ /* Apparently for the DS2000 the memory
+ * depth can only be set in Running state -
+ * this matches the behaviour of the UI. */
+ if (set_cfg(sdi, ":RUN") != SR_OK)
+ return SR_ERR;
+ if (set_cfg(sdi, "ACQ:MDEP %d", devc->analog_frame_size) != SR_OK)
+ return SR_ERR;
+ if (set_cfg(sdi, ":STOP") != SR_OK)
+ return SR_ERR;
+ }
+ if (rigol_ds_capture_start(sdi) != SR_OK)
return SR_ERR;
}
}
static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
{
struct dev_context *devc;
- struct sr_serial_dev_inst *serial;
+ struct sr_scpi_dev_inst *scpi;
+ struct sr_datafeed_packet packet;
(void)cb_data;
return SR_ERR;
}
+ /* End of last frame. */
+ packet.type = SR_DF_END;
+ sr_session_send(sdi, &packet);
+
g_slist_free(devc->enabled_analog_probes);
g_slist_free(devc->enabled_digital_probes);
devc->enabled_analog_probes = NULL;
devc->enabled_digital_probes = NULL;
- serial = sdi->conn;
- sr_source_remove(serial->fd);
+ scpi = sdi->conn;
+ sr_scpi_source_remove(scpi);
return SR_OK;
}
projects / libsigrok.git / blobdiff