sr: add new analog output module

[libsigrok.git] / hardware / openbench-logic-sniffer / ols.h

diff --git a/hardware/openbench-logic-sniffer/ols.h b/hardware/openbench-logic-sniffer/ols.h
index f452c74846876bb81d5e507b08710fdcb02a3b6f..66a45d5cba11b49481610aeaefd60533091319c9 100644 (file)
--- a/hardware/openbench-logic-sniffer/ols.h
+++ b/hardware/openbench-logic-sniffer/ols.h
@@ -59,12 +59,16 @@
 #define FLAG_CLOCK_INVERTED        0x80
 #define FLAG_RLE                   0x0100
 
+/* Private driver context. */
+struct drv_context {
+       GSList *instances;
+};
+
 /* Private, per-device-instance driver context. */
-struct context {
+struct dev_context {
        uint32_t max_samplerate;
        uint32_t max_samples;
        uint32_t protocol_version;
-       int num_probes;
 
        uint64_t cur_samplerate;
        uint32_t cur_samplerate_divider;