sr: add new analog output module

[libsigrok.git] / hardware / openbench-logic-sniffer / ols.h

diff --git a/hardware/openbench-logic-sniffer/ols.h b/hardware/openbench-logic-sniffer/ols.h
index 0b1a61361c0297618381eb25ab1333073a249f91..66a45d5cba11b49481610aeaefd60533091319c9 100644 (file)
--- a/hardware/openbench-logic-sniffer/ols.h
+++ b/hardware/openbench-logic-sniffer/ols.h
@@ -1,7 +1,7 @@
 /*
  * This file is part of the sigrok project.
  *
- * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
+ * Copyright (C) 2010-2012 Bert Vermeulen <bert@biot.com>
  *
  * This program is free software: you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -59,11 +59,16 @@
 #define FLAG_CLOCK_INVERTED        0x80
 #define FLAG_RLE                   0x0100
 
-struct ols_device {
+/* Private driver context. */
+struct drv_context {
+       GSList *instances;
+};
+
+/* Private, per-device-instance driver context. */
+struct dev_context {
        uint32_t max_samplerate;
        uint32_t max_samples;
        uint32_t protocol_version;
-       int num_probes;
 
        uint64_t cur_samplerate;
        uint32_t cur_samplerate_divider;
@@ -88,7 +93,7 @@ struct ols_device {
        unsigned char tmp_sample[4];
        unsigned char *raw_sample_buf;
 
-       struct sr_serial_device_instance *serial;
+       struct sr_serial_dev_inst *serial;
 };
 
 #endif