SR_PRIV struct sr_dev_driver ols_driver_info;
static struct sr_dev_driver *di = &ols_driver_info;
-static int dev_clear(void)
-{
- return std_dev_clear(di, NULL);
-}
-
static int init(struct sr_context *sr_ctx)
{
return std_init(sr_ctx, di, LOG_PREFIX);
static int cleanup(void)
{
- return dev_clear();
+ return std_dev_clear(di, NULL);
}
static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
- const struct sr_probe_group *probe_group)
+ const struct sr_channel_group *cg)
{
struct dev_context *devc;
- (void)probe_group;
+ (void)cg;
if (!sdi)
return SR_ERR_ARG;
}
static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi,
- const struct sr_probe_group *probe_group)
+ const struct sr_channel_group *cg)
{
struct dev_context *devc;
uint16_t flag;
int ret;
const char *stropt;
- (void)probe_group;
+ (void)cg;
if (sdi->status != SR_ST_ACTIVE)
return SR_ERR_DEV_CLOSED;
}
static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
- const struct sr_probe_group *probe_group)
+ const struct sr_channel_group *cg)
{
struct dev_context *devc;
GVariant *gvar, *grange[2];
GVariantBuilder gvb;
int num_channels, i;
- (void)probe_group;
+ (void)cg;
switch (key) {
case SR_CONF_SCAN_OPTIONS:
return SR_OK;
}
+static int set_trigger(const struct sr_dev_inst *sdi, int stage)
+{
+ struct dev_context *devc;
+ struct sr_serial_dev_inst *serial;
+ uint8_t cmd, arg[4];
+
+ devc = sdi->priv;
+ serial = sdi->conn;
+
+ cmd = CMD_SET_TRIGGER_MASK + stage * 4;
+ arg[0] = devc->trigger_mask[stage] & 0xff;
+ arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
+ arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
+ arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
+ if (send_longcommand(serial, cmd, arg) != SR_OK)
+ return SR_ERR;
+
+ cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
+ arg[0] = devc->trigger_value[stage] & 0xff;
+ arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
+ arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
+ arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
+ if (send_longcommand(serial, cmd, arg) != SR_OK)
+ return SR_ERR;
+
+ cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
+ arg[0] = arg[1] = arg[3] = 0x00;
+ arg[2] = stage;
+ if (stage == devc->num_stages)
+ /* Last stage, fire when this one matches. */
+ arg[3] |= TRIGGER_START;
+ if (send_longcommand(serial, cmd, arg) != SR_OK)
+ return SR_ERR;
+
+ return SR_OK;
+}
+
static int dev_acquisition_start(const struct sr_dev_inst *sdi,
void *cb_data)
{
struct dev_context *devc;
struct sr_serial_dev_inst *serial;
- uint32_t trigger_config[4];
- uint32_t data;
- uint16_t readcount, delaycount;
- uint8_t changrp_mask;
+ uint16_t samplecount, readcount, delaycount;
+ uint8_t changrp_mask, arg[4];
int num_channels;
- int i;
+ int ret, i;
if (sdi->status != SR_ST_ACTIVE)
return SR_ERR_DEV_CLOSED;
* Limit readcount to prevent reading past the end of the hardware
* buffer.
*/
- readcount = MIN(devc->max_samples / num_channels, devc->limit_samples) / 4;
+ samplecount = MIN(devc->max_samples / num_channels, devc->limit_samples);
+ readcount = samplecount / 4;
+
+ /* Rather read too many samples than too few. */
+ if (samplecount % 4 != 0)
+ readcount++;
- memset(trigger_config, 0, 16);
- trigger_config[devc->num_stages] |= 0x08;
- if (devc->trigger_mask[0]) {
+ /* Basic triggers. */
+ if (devc->trigger_mask[0] != 0x00000000) {
+ /* At least one probe has a trigger on it. */
delaycount = readcount * (1 - devc->capture_ratio / 100.0);
devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
-
- if (send_longcommand(serial, CMD_SET_TRIGGER_MASK_0,
- reverse32(devc->trigger_mask[0])) != SR_OK)
- return SR_ERR;
- if (send_longcommand(serial, CMD_SET_TRIGGER_VALUE_0,
- reverse32(devc->trigger_value[0])) != SR_OK)
- return SR_ERR;
- if (send_longcommand(serial, CMD_SET_TRIGGER_CONFIG_0,
- trigger_config[0]) != SR_OK)
- return SR_ERR;
-
- if (send_longcommand(serial, CMD_SET_TRIGGER_MASK_1,
- reverse32(devc->trigger_mask[1])) != SR_OK)
- return SR_ERR;
- if (send_longcommand(serial, CMD_SET_TRIGGER_VALUE_1,
- reverse32(devc->trigger_value[1])) != SR_OK)
- return SR_ERR;
- if (send_longcommand(serial, CMD_SET_TRIGGER_CONFIG_1,
- trigger_config[1]) != SR_OK)
- return SR_ERR;
-
- if (send_longcommand(serial, CMD_SET_TRIGGER_MASK_2,
- reverse32(devc->trigger_mask[2])) != SR_OK)
- return SR_ERR;
- if (send_longcommand(serial, CMD_SET_TRIGGER_VALUE_2,
- reverse32(devc->trigger_value[2])) != SR_OK)
- return SR_ERR;
- if (send_longcommand(serial, CMD_SET_TRIGGER_CONFIG_2,
- trigger_config[2]) != SR_OK)
- return SR_ERR;
-
- if (send_longcommand(serial, CMD_SET_TRIGGER_MASK_3,
- reverse32(devc->trigger_mask[3])) != SR_OK)
- return SR_ERR;
- if (send_longcommand(serial, CMD_SET_TRIGGER_VALUE_3,
- reverse32(devc->trigger_value[3])) != SR_OK)
- return SR_ERR;
- if (send_longcommand(serial, CMD_SET_TRIGGER_CONFIG_3,
- trigger_config[3]) != SR_OK)
- return SR_ERR;
+ for (i = 0; i <= devc->num_stages; i++) {
+ sr_dbg("Setting stage %d trigger.", i);
+ if ((ret = set_trigger(sdi, i)) != SR_OK)
+ return ret;
+ }
} else {
- if (send_longcommand(serial, CMD_SET_TRIGGER_MASK_0,
- devc->trigger_mask[0]) != SR_OK)
- return SR_ERR;
- if (send_longcommand(serial, CMD_SET_TRIGGER_VALUE_0,
- devc->trigger_value[0]) != SR_OK)
- return SR_ERR;
- if (send_longcommand(serial, CMD_SET_TRIGGER_CONFIG_0,
- 0x00000008) != SR_OK)
- return SR_ERR;
+ /* No triggers configured, force trigger on first stage. */
+ sr_dbg("Forcing trigger at stage 0.");
+ if ((ret = set_trigger(sdi, 0)) != SR_OK)
+ return ret;
delaycount = readcount;
}
/* Samplerate. */
- sr_info("Setting samplerate to %" PRIu64 "Hz (divider %u)",
+ sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
devc->cur_samplerate, devc->cur_samplerate_divider);
- if (send_longcommand(serial, CMD_SET_DIVIDER,
- reverse32(devc->cur_samplerate_divider)) != SR_OK)
+ arg[0] = devc->cur_samplerate_divider & 0xff;
+ arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
+ arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
+ arg[3] = 0x00;
+ if (send_longcommand(serial, CMD_SET_DIVIDER, arg) != SR_OK)
return SR_ERR;
/* Send sample limit and pre/post-trigger capture ratio. */
- sr_info("Setting sample limit %d, trigger point at %d",
+ sr_dbg("Setting sample limit %d, trigger point at %d",
(readcount - 1) * 4, (delaycount - 1) * 4);
- data = ((readcount - 1) & 0xffff) << 16;
- data |= (delaycount - 1) & 0xffff;
- if (send_longcommand(serial, CMD_CAPTURE_SIZE, reverse16(data)) != SR_OK)
+ arg[0] = ((readcount - 1) & 0xff);
+ arg[1] = ((readcount - 1) & 0xff00) >> 8;
+ arg[2] = ((delaycount - 1) & 0xff);
+ arg[3] = ((delaycount - 1) & 0xff00) >> 8;
+ if (send_longcommand(serial, CMD_CAPTURE_SIZE, arg) != SR_OK)
return SR_ERR;
/* Flag register. */
- sr_info("Setting demux %s, noise_filter %s, extpat %s, intpat %s",
- devc->flag_reg & FLAG_DEMUX ? "on" : "off",
- devc->flag_reg & FLAG_FILTER ? "on": "off",
+ sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
+ devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
- devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off");
+ devc->flag_reg & FLAG_RLE ? "on" : "off",
+ devc->flag_reg & FLAG_FILTER ? "on": "off",
+ devc->flag_reg & FLAG_DEMUX ? "on" : "off");
/* 1 means "disable channel". */
devc->flag_reg |= ~(changrp_mask << 2) & 0x3c;
- data = (devc->flag_reg << 24) | ((devc->flag_reg << 8) & 0xff0000);
- if (send_longcommand(serial, CMD_SET_FLAGS, data) != SR_OK)
+ arg[0] = devc->flag_reg & 0xff;
+ arg[1] = devc->flag_reg >> 8;
+ arg[2] = arg[3] = 0x00;
+ if (send_longcommand(serial, CMD_SET_FLAGS, arg) != SR_OK)
return SR_ERR;
/* Start acquisition on the device. */
/* Reset all operational states. */
devc->rle_count = devc->num_transfers = 0;
devc->num_samples = devc->num_bytes = 0;
+ devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
memset(devc->sample, 0, 4);
/* Send header packet to the session bus. */
.cleanup = cleanup,
.scan = scan,
.dev_list = dev_list,
- .dev_clear = dev_clear,
+ .dev_clear = NULL,
.config_get = config_get,
.config_set = config_set,
.config_list = config_list,
projects / libsigrok.git / blobdiff